July 2008 Rev 4 1/12
12
STW55NM60N
N-channel 600 V, 0.047 Ω, 51 A, MDmesh™ II Power MOSFET
TO-247
Features
■100% avalanche tested
■Low input capacitance and gate charge
■Low gate input resistance
Application
■Switching applications
Description
This series of devices is designed using the
second generation of MDmesh™ technology. This
revolutionary Power MOSFET associates a new
vertical structure to the company’s strip layout to
yield one of the world’s lowest on-resistance and
gate charge. It is therefore suitable for the most
demanding high efficiency converters.
Figure 1. Internal schematic diagram
Type VDSS
(@Tjmax)
RDS(on)
max ID
STW55NM60N 650 V < 0.060 Ω51 A
TO-247
123
Table 1. Device summary
Order code Marking Package Packaging
STW55NM60N W55NM60N TO-247 Tube
www.st.com
Contents STW55NM60N
2/12
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3 Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
STW55NM60N Electrical ratings
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1 Electrical ratings
Table 2. Absolute maximum ratings
Symbol Parameter Value Unit
VDS Drain-source voltage (VGS = 0) 600 V
VGS Gate- source voltage ±25 V
IDDrain current (continuous) at TC = 25°C 51 A
IDDrain current (continuous) at TC = 100°C 32 A
IDM (1)
1. Pulse width limited by safe operating area
Drain current (pulsed) 204 A
PTOT Total dissipation at TC = 25°C 350 W
dv/dt (2)
2. ISD ≤ 51 A, di/dt ≤ 400 A/µs, VDD = 80% V(BR)DSS
Peak diode recovery voltage slope 15 V/ns
Tstg Storage temperature –55 to 150 °C
TjMax. operating junction temperature 150 °C
Table 3. Thermal data
Symbol Parameter Value Unit
Rthj-case Thermal resistance junction-case max 0.36 °C/W
Rthj-amb Thermal resistance junction-ambient max 50 °C/W
Tl
Maximum lead temperature for soldering
purpose 300 °C
Table 4. Avalanche characteristics
Symbol Parameter Value Unit
IAS
Avalanche current, repetitive or not-repetitive
(pulse width limited by Tj max) 15 A
EAS
Single pulse avalanche energy
(starting Tj = 25 °C, ID= IAS, VDD = 50 V) 1600 mJ
Electrical characteristics STW55NM60N
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2 Electrical characteristics
(TCASE=25°C unless otherwise specified)
Table 5. On/off states
Symbol Parameter Test conditions Min. Typ. Max. Unit
V(BR)DSS
Drain-source
breakdown voltage ID = 1mA, VGS = 0 600 V
dv/dt (1)
1. Characteristic value at turn off on inductive load
Drain source voltage slope VDD= 480 V, ID = 51 A,
VGS =10 V 30 V/ns
IDSS
Zero gate voltage
drain current (VGS = 0)
VDS = Max rating
VDS = Max rating, @125 °C
1
100
µA
µA
IGSS
Gate-body leakage
current (VDS = 0) VGS = ± 20 V 100 nA
VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA 2 3 4 V
RDS(on)
Static drain-source on
resistance VGS = 10 V, ID = 25.5 A 0.047 0.060 Ω
Table 6. Dynamic
Symbol Parameter Test conditions Min. Typ. Max. Unit
gfs (1)
1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
Forward transconductance VDS=15 V, ID = 25.5 A 45 S
Ciss
Coss
Crss
Input capacitance
Output capacitance
Reverse transfer
capacitance
VDS = 50 V, f = 1 MHz,
VGS = 0
5800
300
30
pF
pF
pF
Coss eq. (2)
2. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS
increases from 0 to 80% VDS
Equivalent output
capacitance VGS = 0, VDS = 0 to 480 V 900 pF
Qg
Qgs
Qgd
Total gate charge
Gate-source charge
Gate-drain charge
VDD = 480 V, ID = 51 A,
VGS = 10 V,
(see Figure 15)
190
30
90
nC
nC
nC
RgGate input resistance
f=1 MHz gate DC bias=0
Test signal level = 20 mV
open drain
2.5 Ω
STW55NM60N Electrical characteristics
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Table 7. Switching times
Symbol Parameter Test conditions Min. Typ. Max. Unit
td(on)
tr
td(off)
tf
Turn-on delay time
Rise time
Turn-off delay time
Fall time
VDD = 300 V, ID = 25.5 A
RG=4.7 Ω VGS = 10 V
(see Figure 14)
40
30
225
70
ns
ns
ns
ns
Table 8. Source drain diode
Symbol Parameter Test conditions Min Typ. Max Unit
ISD
ISDM (1)
1. Pulse width limited by safe operating area
Source-drain current
Source-drain current (pulsed)
51
204
A
A
VSD (2)
2. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
Forward on voltage ISD = 25.5 A, VGS = 0 1.3 V
trr
Qrr
IRRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD = 51 A, di/dt = 100 A/µs
VDD = 100 V
(see Figure 16)
600
15
51
ns
µC
A
trr
Qrr
IRRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD = 51 A, di/dt = 100 A/µs
VDD = 100 V, Tj = 150 °C
(see Figure 16)
750
18
51
ns
µC
A
Electrical characteristics STW55NM60N
6/12
2.1 Electrical characteristics (curves)
Figure 2. Safe operating area Figure 3. Thermal impedance
Figure 4. Output characteristics Figure 5. Transfer characteristics
Figure 6. Transconductance Figure 7. Static drain-source on resistance
STW55NM60N Electrical characteristics
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Figure 8. Gate charge vs gate-source voltage Figure 9. Capacitance variations
Figure 10. Normalized gate threshold voltage
vs temperature
Figure 11. Normalized on resistance vs
temperature
Figure 12. Source-drain diode forward
characteristics
Figure 13. Normalized BVDSS vs temperature
Test circuit STW55NM60N
8/12
3 Test circuit
Figure 14. Switching times test circuit for
resistive load
Figure 15. Gate charge test circuit
Figure 16. Test circuit for inductive load
switching and diode recovery times
Figure 17. Unclamped inductive load test
circuit
Figure 18. Unclamped inductive waveform Figure 19. Switching time waveform
STW55NM60N Package mechanical data
9/12
4 Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect. The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com
Package mechanical data STW55NM60N
10/12
Dim. mm.
Min. Typ Max.
A4.855.15
A1 2.20 2.60
b1.0 1.40
b1 2.0 2.40
b23.0 3.40
c0.40 0.80
D19.85 20.15
E 15.45 15.75
e5.45
L 14.20 14.80
L1 3.70 4.30
L2 18.50
øP 3.55 3.65
øR 4.50 5.50
S5.50
TO-247 Mechanical data
STW55NM60N Revision history
11/12
5 Revision history
Table 9. Document revision history
Date Revision Changes
06-Nov-2007 1 Initial release
19-Dec-2007 2 Figure 9: Capacitance variations has been updated
16-Jan-2008 3 Document status promoted from preliminary data to datasheet.
31-Jul-2008 4 EAS value has been updated in Table 4
STW55NM60N
12/12
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