MIC2111B
High-Performance, Multi-Mode,
Step-Down Controller
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
October
13, 2015
Revision 2.1
General Description
Micrel’s MIC2111B is a programmable-frequency, valley-
current/voltage-mode PWM controller that provides the
control and protection features necessary for power
devices and drivers that use current sensing across the
inductor. The MIC2111B can provide single tri-state PWM
logic signal to work with either power-stage modules or
discrete driver and MOSFETs. The device has precision
enable and power-good (PG) functions for sequencing of
multiple power supplies. In addition, the solution is
compatible with intelligent power stages in a high-current,
step-down DC/DC converter.
To optimize system size and system efficiency, the
MIC2111B frequency can be pro grammed from 200kH z to
2MHz. The device operates in power-saving mode at light
loads b y reducing f requency. Option al outside audio range
operation is possible when the power-stage is configured
in light load mode. The solution uses differential current
sensing for better current-limit accuracy and a dedicated
differ ential am plifier for r emote outp ut sensing f or accu rate
output voltage control. The MIC2111B has a high-gain
transconductance amplifier for loop compensation.
External slope compensation can be added through a
resistor to avoid sub-harmonic oscillations. Other features
include programmable OCP, output OVP, and thermal
OTP protect ions . The MIC2111B offers Mic rel ’s proprietary
bi-directional, single wire fault communication for total
system protection.
The MIC2111B is availa ble in a 20-pin 3mm × 3mm TQFN
pack age and h as a j unct ion temper atur e ran ge of –40°C to
+125°C.
Datasheets and support documentation are available on
Micrel’s web site at: www.micrel.com.
Features
• Single 3. 3V or 5V supply
• Supports load currents up to 40A
• Programmable valley-current/voltage-mode PWM
architecture
• 3.3V logic PWM output compatible with power-stage
modules and DrMOS modules
• Single tri-state PWM output
• Programmable switching frequency: 200kHz to 2MHz.
• Differential remote sensing for output voltage and
inductor current
• 0.6V reference voltage with total ±1% accuracy for
output
• Adjustable soft-start/soft-stop and pre-biased safe
startup.
• Supports light load and outside audio modes
• Programmable slope compensation and loop
compensation
• Enable input, power-good (PG) output for sequencing
• Programmable OCP, output OVP, thermal OTP, and
dedicated FAULTb pin for system safe startup/stop
• Internal thermal shutdown and UVLO
• –40°C to +125°C junction temperature range
• Available in 20-pin 3mm × 3 mm TQFN package
Applications
• Servers and work stations
• Routers, switches, networking/telecom infrastructure
• Printers, scanners, graphics and video cards
• High current, high-performance POLs
Micrel, Inc.
MIC2111B
October
13, 2015 2 Revision 2.1
Typical Applic ation
MIC2111B and DrMOS for a 25A Synchronous Buck Converter
Micrel, Inc.
MIC2111B
October
13, 2015 3 Revision 2.1
Ordering Information
Part Number Switching
Frequency
Junction
Temperature
Range
Current-Sense
Gain Power
Stage Package Lead
Finish
MIC2111BYMT 200kHz to 2MHz −40°C to +125°C 30V/V DrMOS 20-Pin
3mm × 3mm TQFN Pb-Free
Pin Configuration
20-Pin 3mm × 3mm TQFN (MT)
(Top View)
Pin Description
Pin Number I/O Pin Name Pin Name
1 I SLOPE Valley Current Mode: Slope compensation can be adjusted by adding a resistor from this pin to
VIN (input power supply).
Voltage Mode: Artificial ramp controlled by SLOPE resistor
2 I EN Enable (Input): A logic signal to enable or disable the controller. The EN pin is CMOS
compatible. Logic high = enable, logic low = disable or shutdown. Do not leave floating.
3 I SEL Control-Mode Selection Pin: Connect this pin to AGND for valley current-mode operation.
Leave this pin open for voltage mode control operation.
4 I OVP Output OVP programming pin. Connect a resistive divider to set OVP.OVP pin has 0.6V
reference (see Functional Description for more details).
5 I FREQ Switching Frequency Adjust (Input): Connect a resistor from this pin to GND to set the
switching frequency.
6 I TJ Power Module Temperature Sense Pin. Connect resistor divider to progr am TJ. TJ comparator
has 0.6V reference (see Functional D esc ription for more deta ils).
7 O PG Power Good (Output): Open drain output, an external resistor to VOUT is required for pull-up.
8 I SS Soft-start pin for limiting inrush current. A resistor from this pin to ground sets the soft-start
time. If enabled, soft-stop time is same as soft-start. Contact factory for soft stop.
Micrel, Inc.
MIC2111B
October
13, 2015 4 Revision 2.1
Pin Description (Continued)
Pin Number I/O Pin Name Pin Name
9 I/O LS Low-Side Logic Output. Connect this pin to module-mode pin for outside audio operation.
Leave this pin open if outside audio (>25kHz) operation is not required. Current limit can be
adjusted by connecting a resistor from LS to AGND (see Table 1 for details).
10 O HS High-Side Logic of Power Module Top FET . Conn ect thi s pin to the PWM pin of power module.
This pin has tri-state capability.
11 P VCC 5V Supply Input. A 1μF ceramic capacitor from VCC to AGND is required for decoupling.
12 P AGND Analog Ground.
13 I ISEN− Negative pin of the inductor cu rrent-sense input.
14 I ISEN+ Positive pin of the inductor current-sense input.
15 I/O FAULTb Bi-Directional Pin. This pin goes low if controller or module is not ready. This pin goes low if
VCC is less than UVLO, or if a TJ or OVP fault is triggered . Either VCC cycling or EN cycling is
required to clear the fau lt . Thi s pin has an internal 100kΩ pull-up resistor to VCC
16 I RS+ The non-inverting input of the remote sensing amplifier. Remote sense for output voltage.
17 I RS- The inverting input of the remote sensing amplifier. Remote sense for GND.
18 O VDIFF Output of differential amplifier. Connect a resistor divider from VDIFF to set output voltage
19 I FB The inverting input of the error amplifier.
20 I/O COMP Transconductance Amplifier Output. Connect compensation network from COMP node for
frequency response.
Micrel, Inc.
MIC2111B
October
13, 2015 5 Revision 2.1
Absolute Maximum Ratings(1)
VCC to AGND ................................................ −0.3V to +6.0V
VEN/SS, VFREQ to AGND......................... −0.3V to (VCC +0.3V)
VOVP, VTJ, VFAULTb to AGND ................ −0.3V to (VCC + 0.3V)
VRS±, VHS/LS, VISEN±, VFB to AGND ....... −0.3V to (VCC + 0.3V)
VSLOPE to AGND ............................................... −0.3V to 20V
Junction Temperature .............................................. +150°C
Storage Temperature (TS) ......................... −65°C to +150°C
Lead Temperature (soldering, 10s) ............................ 260°C
ESD
Human Body Model(3) .............................................. 2kV
Machine Mod el ...................................................... 200V
Operating Ratings(2)
Supply Voltage (VCC) .................................... 3.135V to 5.5V
Enable Input (VEN) ................................................. 0V to VCC
Junction Temperature (TJ) ........................ −40°C to +125°C
Junction Thermal Resistance
20-Pin 3mm × 3mm TQFN (θJA) ....................... 60°C/W
20-Pin 3mm × 3mm TQFN (θJC) ....................... 10°C/W
Electrical Characteristics(4)
VCC = 5V; TA = 25°C, unless noted. Bold values indi cat e −40°C ≤ TJ ≤ +125°C.
Parameter Condition Min. Typ. Max. Units
Power Supply Input (VCC)
VCC Input Voltage Range Valley current mode, voltage mode 3.135 5.5 V
VCC UVLO Threshold VCC rising 2.75 2.85 2.95 V
VCC UVLO Hystere sis 100 mV
Quiescent Supply Current No switching, VFB >0.8V 2.1 mA
Shutdown Supply Current VEN = 0V 10 µA
Output Voltage
Output Voltage 0.6 3.46 V
Minimum VCC-to-Output Set Point Minimum VCC − VOUT headroom required 1.3 V
Voltage Accuracy (RS+) - (RS-)
0.594
0.6
0.606
V
Remote Sense Amplifier Gain
V
DIFF
/[(V
RS+
)
−
(V
RS−
)], VRS− = 0V ; VRS+ = 3.6V
0.997 1.000 1.003 V/V
Remote Sense Amplifier
Source/Sink Current 550 µA
RS+ Input Impedance 175 kΩ
RS− Input Impedance 87 kΩ
RS+/RS− Common-Mode Voltage 100 mV
FB Bias Current VFB = 0.6V 5 100 nA
Transconductance Error Amplifier
Error Amplifier Transconductance FB-to-COMP gm 2 mS
Error Amplifier Source/Sink Current 175 220 µA
Notes:
1. Exceeding the absolute maximum rating may damage the device.
2. The device is not guarant eed to function outside operat i ng range
3. Devices are ESD sensitive. Handling prec aut i ons recommended. Human body model is 1.5kΩ in series with 100pF.
4. Specific at i on for pack aged product only.
Micrel, Inc.
MIC2111B
October
13, 2015 6 Revision 2.1
Electrical Characteristics(4) (Continued)
VCC = 5V; TA = 25°C, unless noted. Bold values indi cat e −40°C ≤ TJ ≤ +125°C.
Parameter Condition Min. Typ. Max. Units
Enable/Soft-Start/Soft-Stop
EN Threshold Voltage EN rising, point at w hich the output is enab led 1.0 1.2 1.3 V
EN Hysteresis 50 mV
Soft-Start time RSS = Floating 2 ms
Soft-Stop Time(5) RSS = Floating 2 ms
Oscillator and PWM
Switching Frequency
RFREQ = 49.9kΩ 1.6 2 2.4
MHz RFREQ = 100kΩ 0.85 1 1.15
RFREQ = 499kΩ 0.16 0.2 0.24
Minimum Duty Cycle VFB = 0.8V 0 %
Minimum Off-Time CCM 100 ns
Minimum On-Time CCM 40 ns
HS, LS Logic High Voltage ILOAD = 50mA 4 V
HS, LS Logic Low Voltag e ILOAD = 50m A 0.8 V
HS Tri-State Leakage Current VHS = 1.5V -1 1 µA
LS Tri-State Leakage Current VLS = 1.5V -1 1 µA
HS, LS Rise/Fall Time CLOAD= 20pF 1 ns
Outside Audio DCM time No Load 32 µs
Current-Sense Amplifier
Current Amplifier Gain 30 V/V
Current Amplifier Bandwidth 3dB bandwidth 10 MHz
Current-Limit Threshold LS = 0.5V 15 18.3 22.5 mV
LS = 0.7V 20 23.3 27.5
ISEN+ISEN-Input Bias Current 0.01 0.1 µA
Slope Compensation
VSLOPE Common-Mode Range 0.6 3.46 V
SLOPE Sink Current Valley Current Mode 280 µA
Power Good (PG)
Power Good Threshold Voltage FB rising 90 92 95 %VOUT
Power Good Hysteresis 2 %VOUT
Power Good Delay FB rising, delay from FB high to PG high 200 µs
Power Good Low Voltage VFB < 90% × VNOM, IPG = 1mA 12 200 mV
Note:
5. Soft-stop is disabled by default. Contact factory to enable soft-stop.
Micrel, Inc.
MIC2111B
October
13, 2015 7 Revision 2.1
Electrical Characteristics(4) (Continued)
VCC = 5V; TA = 25°C, unless noted. Bold values indi cat e −40°C ≤ TJ ≤ +125°C
Parameter Condition Min. Typ. Max. Units
FAULTb
FAULTb Threshold Voltage FAULTb rising 2 3.1 V
FAULTb Hysteresis 1.1 V
FAULTb Low Voltage ILOAD = 500μA 10 50 mV
FAULTb Leakage Current 1 µA
OVP
OVP Threshold Voltage OVP rising 0.585 0.6 0.615 V
OVP Hysteresis 20 mV
Thermal Shutdown
TJThreshold Voltage TJJ rising 0.585 0.6 0.615 V
TJ Hysteresis 50 mV
Internal Thermal Shutdown Temperature rising 155 °C
Internal Thermal Shutdown
Hysteresis 20 °C
Micrel, Inc.
MIC2111B
October
13, 2015 8 Revision 2.1
Functional Block Diagram
Micrel, Inc.
MIC2111B
October
13, 2015 9 Revision 2.1
Typical Characteris tics
Refer to Typical Application Schematic.
0
10
20
30
40
50
60
70
80
90
100
0 5 10 15 20 25
EFFICIENCY (%)
OUTPUT CURRENT (A)
Efficie nc y vs. Output Cur rent
(V
OUT
= 1.2V)
8V
IN
12V
IN
16V
IN
0
10
20
30
40
50
60
70
80
90
100
0 5 10 15 20 25
EFFICIENCY (%)
OUTPUT CURRENT (A)
Efficie nc y vs. Output Cur rent
(V
IN
= 12V)
2.5V V
OUT
1.5V V
OUT
1.0V V
OUT
1.2V V
OUT
0
0.2
0.4
0.6
0.8
1
1.2
1.4
3 4 5 6
ENABLE THRESHOLD (V)
V
CC
(V)
EN Threshold
vs. V
CC
Change
EN THRESHOLD
0
0.2
0.4
0.6
0.8
1
1.2
1.4
-50 050 100 150
ENABLE THRESHOLD (V)
TEMPERATURE (˚C)
EN Threshold
vs. Temperature
EN THRESHOLD
10
12
14
16
18
20
22
24
26
28
30
3 4 5 6
ISNS AMPLIFIER GAIN (V/V)
VCC (V)
ISEN A mplifier Gain
vs. VCC (MIC2111B)
ISEN AMPLIFIER G AIN
10
15
20
25
30
35
-50 050 100 150
ISNS AMPLIFIER GAIN (V/V)
TEMPERATURE (˚C)
ISEN A mplifier Gain
vs. Temperature (MIC2111B)
ISEN AMPLIFIER G AIN
1
1.2
1.4
1.6
1.8
2
2.2
2.4
2.6
2.8
3
3 4 5 6
ERROR AMPLIFIER
TRANSCONDUCTANCE (mMho)
VCC (V)
Error Amplifier T ransconductance
vs. V
CC
(T = 25°C)
1
1.2
1.4
1.6
1.8
2
2.2
2.4
2.6
2.8
3
-50 050 100 150
ERROR AMPLIFIER
TRANSCONDUCTANCE (mMho)
TEMPERATURE (˚C)
Error Amplifier T ransconductance
vs. Temp erature (V
CC
= 5V)
0.5
0.55
0.6
0.65
0.7
33.5 44.5 55.5 6
FEEDBACK VOLTAGE (V)
VCC (V)
Feedback Voltage
vs. V
CC
Micrel, Inc.
MIC2111B
October
13, 2015 10 Revision 2.1
Typical Characteristics (Continued)
0.594
0.596
0.598
0.600
0.602
0.604
0.606
-50 050 100 150
FEEDBACK VOLTAGE(V)
TEMPERATURE(C)
Feedback Voltage
vs. Temperature
0
10
20
30
40
50
60
70
80
00.5 11.5 22.5
VCC SUPPLY CURRENT (mA)
SWITCHING FREQUENCY (MHz)
V
CC
Supply Current
vs. Switching Frequency
V
CC
= 5V
1.50
1.55
1.60
1.65
1.70
1.75
-50 050 100 150
V
CC
SUPPLY CURRENT (mA)
TEMPERATURE (˚C)
VCC Supply Current
vs. Temperature
2.75
2.8
2.85
2.9
2.95
3
-50 050 100 150
VCC UVLO (V)
TEMPERATURE (˚C)
V
CC
UVLO
vs. Temperature
1.5
1.6
1.7
1.8
1.9
2
2.1
2.2
2.3
33.5 44.5 55.5
VCC SUPPLY CURRENT (mA)
VCC (V)
V
CC
Quiescent Current
vs. V
CC
Voltage
2.05
2.1
2.15
2.2
2.25
2.3
2.35
2.4
2.45
0.0 0.5 1.0 1.5 2.0 2.5
V
CC
SUPPLY CURRENT (mA)
FREQUENCY (MHz)
VCC Quiescent Current
vs. Frequency
0.0
0.5
1.0
1.5
2.0
2.5
-50 050 100 150
SWITCHING FREQUENCY (MHz)
TEMPERATURE (˚C)
Switching Frequency
vs. Temperature
f
sw
= 1MHz
f
sw
= 500KHz
f
sw
= 2MHz
0
0.1
0.2
0.3
0.4
0.5
0.6
-50 050 100
PG THRESHOLD (V)
TEMPERATURE (˚C)
PG Threshold
vs. Temperature
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
33.5 44.5 55.5 6
PG THRESHOLD (V)
V
CC
(V)
PG Threshold
vs. V
CC
Micrel, Inc.
MIC2111B
October
13, 2015 11 Revision 2.1
Typical Characteristics (Continued)
-0.25
-0.2
-0.15
-0.1
-0.05
0
0.05
0510 15 20 25
LOAD REGULATION (%)
OUTPUT CURRENT (A)
Load Regulati on
vs. Output Current
8V
IN
12V
IN
16V
IN
-0.25
-0.20
-0.15
-0.10
-0.05
0.00
2.5 3.5 4.5 5.5
LINE REGULATION (%)
V
CC
(V)
Line Regulation vs. V
CC
(V
IN
= 12V, V
OUT
= 1.2V, 5A Load)
LINE REGULAT IO N
Micrel, Inc.
MIC2111B
October
13, 2015 14 Revision 2.1
Functional Description
The MIC2111B is a pin-programmable control-mode,
single-ph ase PW M buck control ler. T he contro l m ode can
be programmed to either valley current mode or voltage
mode through a single pin. The device provides the
control and protection features necessary for driving
intelligent power stages in high-current, step-down,
DC/DC converters. The MIC2111B is also compatible
with DrMOS power stages and drivers that use current
sensing across the inductor. The MIC2111B provides a
single tri-state, PWM logic signal that works with either
power-stag e modules or di screte-driver MO SFETs. It has
precision enable and power good (PG) functions for
sequencing of multiple power supplies and its frequency
can be programmed from 200kHz to 2MHz thereby
optimizing system size and system efficiency.
The device supports power-saving mode at light loads
when the MODE pin of the power stage is connected to
GND. Optional outside audio range operation is also
possible when the power stage is configured in light load
mode. The MIC2111B uses differential current sensing
for better current-limit accuracy. It also uses a dedicated
differential am plifier for remote output sensing t o achieve
accurate output voltage control. The MIC2111B has a
high-gain transconductance amplifier for easier loop
compensation. External slope compensation can be
added through a resistor to avoid sub-harmonic
oscillations. The MIC2111B has programmable OCP,
output OVP and thermal OTP protections and offers
Micrel’s proprietary bi-directional, single-wire fault
communication for total system protection.
Control Architecture
The MIC2111B is a pin-programmable multi-mode,
single-phase PWM buck controller that can be operated
under valley-current-mode and voltage-mode control
architectures.
Valley Current Mode
When MIC2111B is programmed to a fixed-frequency,
valley current mode control architecture, the inductor
current is sensed by the voltage drop measured across
the DCR of the inductor (MIC2111B). The current is
sensed dur ing the off period of the s witching c ycle and is
conditioned with the internal current sense amplifier. The
gain of the current sense amplifier is 30 V/V. The output
signal of the curr ent sense amplif ier is com pared with the
current programmed by the error amplifier to determine
the correc t dut y c ycle. Slope compens atio n is add ed v i a a
resistor between VIN and the SLOPE pin. The MIC2111B
generates a (VIN –VOUT) proportional current and passes it
through a capacitor to generate the slope compensation
ramp.
This slope compensation ramp is then added to comp
signal to avoid sub-harmonic oscillations for duty cycles
of less than 50%.
Calculation of RSLOPE can be found in the Application
Information section.
Voltage Mode
The MIC2111B can also be configured as voltage-mode
control scheme for noise sensitive applications. Control-
loop compensation is external for providing maximum
flexibility in choosing the operating frequency and output
LC filter c ompone nts. R amp is g ener a ted by conn ec ting a
resistor between VIN and SLOPE. An internal
transconductance error amplifier produces an integrated
error voltage at COMP that helps to provide higher DC
accurac y. The v oltage at CO MP sets th e duty c ycle us ing
a PWM comparator and a ramp generator. On the rising
edge of an internal clock, the PWM turns on. During this
ON time, inductor current ramps up. Internal comparator
turn OFF PWM once appropriate duty cycle is reached.
During this time inductor releases the stored energy as
the inductor current ramps down, providing current to the
output.
Oscillator Frequency
The MIC2111B has an internal oscillator wherein the
frequency can be set through an external resistor at the
FREQ pin. The switching frequency can be programmed
from 200kHz to 2MHz using Equation 1:
RFREQ = 1011/FSW [Ω] Eq. 1
Where:
FSW = Desired switching frequency in Hz.
PWM Mo des and Logic Levels
There are multiple versions of power stages currently on
the market that support different load currents. These
include DrMOS and other intelligent power-stages. All
these power stages contain a MOSFET driver, high-side
and low-side MOSFETs. These power stages require a
single tri-stated PWM control signal for control and
protection (Table 1).
Micrel, Inc.
MIC2111B
October
13, 2015 15 Revision 2.1
Table 1. PWM Truth Table
LS HS High-Side
FET Low-Side
FET Switch
Node
0 0 OFF ON to OFF Diode
Emulation
0 1 ON OFF High
X Tri-State OFF OFF
Tri-State
(Pre-Bias/
Fault
Shutdown)
1 0 OFF ON Low
1 1 ON OFF High
The MIC2111B will output a PWM signal on the HS pin
with levels of 0 (turn on the low-side driver) and 1 (turn on
the high-side driver). HS will be turned high-impedance
(tri-state) when a fault condition exists which should be
interpreted by the power stage to turn-off both the high-
side driver and low-side driver. MIC2111B supports 3.3V
logic-compatible PWM thresholds on HS. These levels
can found in the “Oscillator and PWM” section within the
Electrical Characteristics.
Programmable Current-Limit and Hiccup Mode
MIC2111B has a dedicated current-sense amplifier and
can supp ort high load currents up to 40A in single-phase
configuration. The MIC2111B also features differential
current sense input pins (ISEN+ and ISEN−).
W ith the MIC2111B, it is p os sible to s ense cur re nt acr oss
inductor DCRs for low-cost applications. As the DCR of
the inductor will be less than 1mΩ for a high-current
application, the MIC2111B features a current-sense
amplifier with a gain of 30V/V. This amplified signal is
used for control and cycle-by-cycle current limit. These
high-current applications need thermal compensation
from the current-sense signal because of DCR variation
with temperature. External thermal compensation could
be provided using a NTC resistor in series with the RC
across the inductor. See Appl ication Inform ation for more
details about thermal compensation and filter
calculations.
Current limit can be programmed through an external
resistor connecte d at the L S pin. The MIC2111B provides
two selectable current-limit thresholds. Duri ng start -up, a
current s ource of 8µA is injec ted into the ex ternal r esistor
connected between the LS pin and GND. The voltage
developed across the resistor is measured as part of the
power-up seq uence a nd the c urrent thr eshold deter m ined
as illustrated in Table 2.
Once the voltag e has been measured, the c urrent s ource
is turned off. If LS is connected to the MODE pin of
DrMOS, current-limit setting resistance must be adjusted
for the input resistance of the MODE pin.
Many high-current applications require hiccup mode
protection for current limit because they can see peak
load currents for a very short duration. The MIC2111B
uses a proprietary hiccup current-limit algorithm to avoid
inductor saturation. An internal counter increments by
two in each cycle over current is detected, and
decrements by one each cycle when the current is not
over the limit. When the counter reaches 16, the part will
shut down and wait for 8ms before restarting again
(Figure 2 and Figur e 3).
E24 Range Resistance MIC2111B Current-Limit
Threshold
88kΩ 23.3mV
63kΩ 18.3mV
Micrel, Inc.
MIC2111B
October
13, 2015 16 Revision 2.1
Table 2. Fault Handling
Parameter Fault Flag Action While Flagged with
Intelligent Power Stage Release
TJ When TJ pin goes above 0.6V
flag FAULTb immediately. Turn off high- and low-side
FETs, i.e., tri-state.
Release Fault when
TJ falls below 0.6V
(50mV hystere si s)
Internal TSD When 155°C is detected, flag
FAULTb immediately. Turn off high- and low-side
FETs, i.e., tri-state.
Release FAULTb when
temperature falls below
130°C.
OVP When OVP pin goes above 0.6V
flag FAULTb immediately. Turn off high- and low-side
FETs, i.e., tri-state. Enable or VCC cycling.
UVLO When UVLO, FAULTb is flagged. Turn off high- and low-side
FETs, i.e., tri-state. Release when not UVLO.
Current Limit FAULTb is not flagged.
Enter into hiccup current mode.
8 consecutive current-limit
cycles will enter hiccup mode.
Wait for 8ms before retry. No Flag/No release.
Pre-Bias Above Nominal VOUT Flag FAULTb immediately Turn off high- and low-side
FETs, i.e., tri-state. Enable or VCC cycling.
Figure 1. PWM Timing Diagram (all delays shown are assumed as a part of power stage operation)
Micrel, Inc.
MIC2111B
October
13, 2015 17 Revision 2.1
Figure 2. Cycle-by-Cycle Current Limit (MIC2111B)
Figure 3. Hiccup Limit Flow Chart
Micrel, Inc.
MIC2111B
October
13, 2015 18 Revision 2.1
VCC Undervoltag e Lockout (UVLO)
The MIC2111B operates from a single 3.3V or 5V supply
and has only 2mA of quiescent current. When bias
voltage at VCC is less than the under-voltage lockout
(UVLO) level of 2.85V, HS will be high impedance to
drive both MOSFETs to tri-state. UVLO has 100mV
hysteresis to avoid an undesirable turn-on. If the same
supply voltage is used for the power module and the
MIC2111B, it is recommended to use a series RC filter
(1Ω and 1µF) for MIC2111B bypassing.
Enable/Disable (EN) Control
The precision EN pin is used to enable or disable the
MIC2111B. The typical threshold is 1.2V. When the
voltage at EN rises above the threshold, the controller is
enabled and starts normal operation after initialization of
the internal oscillator, references, current-limit settings,
and the soft-start period. The MIC2111B has initialization
delay of 250µs before the PWM output starts.
When the voltage at EN drops 100mV or more
(hysteres is) below th e threshold voltage, the n the internal
controller circuits in the MIC2111B are turned off. It is
possible to us e the EN pi n for sequencing m ultiple power
supplies a long with power-good ( PG) pin. Do no t float the
EN pin. An external RC delay may be added to achieve
sequencing.
Power Good (PG)
The power-good (PG) pin is an open-drain output.
External pull-up resistance is required between PG and
an external voltage. When the feedback voltage, VFB,
rises abo ve the PG t hr es ho ld the PG o utp ut is p ul led h igh
after a delay of 200μs (contact Micrel for other PG
delays).
Bi-Directional Fault Communication (FAULTb)
The MIC2111B adopts Micrel’s proprietary fault
(FAULTb) communication protocol. There are multiple
system f aults pos sible in a high-cur rent environm ent. T he
MIC2111B features int ernal pul l-up of 100kΩ bet ween the
VCC and FAULTb pin.
Soft-Start/Soft-Stop (SS)
The MIC2111B has digital soft-start/soft-stop (SS) to
avoid high inrush current in the input supply lines. Soft-
start time can be programmed with an external resistor
connected from the SS pin to GND. Table 3 illustrates
resistor values and soft start time. Soft-stop time is the
same as the programmed soft-start time (contact Micrel
for instructions on enabling soft-stop).
Table 3. Soft-Start Programming
E96
Range
Resistance Soft-Start E96
Range
Resistance Soft-Start
6.19kΩ 64µs 105kΩ 3072µs
19.1kΩ 128µs 118kΩ 4096µs
30.9kΩ 256µs 130kΩ 6144µs
44.2kΩ 512µs 143kΩ 8192µs
56.2kΩ 768µs 154kΩ 16384µs
68.1kΩ 1024µs 169kΩ 24576µs
80.6kΩ 1536µs 182kΩ 32768µs
93.1kΩ 2048µs Open 2048µs
Micrel, Inc.
MIC2111B
October
13, 2015 19 Revision 2.1
Figure 4. Typical System Soft-Start
Figure 5. Typical Soft-Stop
Micrel, Inc.
MIC2111B
October
13, 2015 20 Revision 2.1
Light Load Operation (DCM)
The MIC2111B supports pulse-skip mode for good light
efficiency. Connecting the MODE or SMOD# pin of the
power m odule to GND is requir ed to en able the lig ht-load
mode. To avoid discharging the output during light-load
mode, the power module zero current detector disables
the low-side FET once in du c tor cur rent reac hes zero. The
MIC2111B generates the next PWM signal based on
COMP voltage. This will cause discontinuous conduction
mode at the switch node as shown below.
Figure 6. Light Load Operation (DCM)
Outside Audio Operation
Some systems require outside audio operation during
light-load mode. When the system load reduces during
light-load mode, the system will change from CCM to
DCM and, as the load reduces further, the switching
frequency reduces as well. If the effective switching
frequency reduces below a certain threshold, the
MIC2111B will enter outside audio mode, attempting to
maintain the effective switching frequency above the
audio band. For the outside audio mode to function, the
LS output of the MIC2111B must be connected to the
MODE pin of the DrMOS. While in this mode, if the
MIC2111B detects that the period between HS pulses is
longer tha n 32µs it f or ces LS a lo gic-1, which tur ns on the
low-side driver. This results in current flowing from the
output capacitor through the inductor and low-side
MOSFET. This can cause the output voltage to fall and
initiate a PWM cycle with HS going high and LS going
low.
Figure 7. Outside Audio Waveform
Output Overvoltage Protection (OVP)
The MIC2111B has a dedicated pin for overvoltage
protecti on (OV P). T he OVP pin sens es the output voltage
through a v oltag e divider . If this voltage is higher than the
reference voltage, the overvoltage protection engages
and FAULTb is pulled low.
This OVP function typically protects against open
feedback loop or VFB short-to-GND. This will protect the
costly load from being damaged by the DC/DC converter.
The OVP level can be programmed through a resistive
divider at the OVP pin as follows. Select R4 same as
lower feedback resistor. R1 can be calculated based
upon required OVP level as illustrated in Equation 1 and
Figure 8.
−
×= V6.0 V6.0V
RR
OUT
41
Eq. 1
Figure 8. OVP Programming
After the OVP fault is triggered, the system will be shut
down and latched off . It is requ ired t o cycl e either VCC or
EN for enabling the converter.
Micrel, Inc.
MIC2111B
October
13, 2015 21 Revision 2.1
Temperature Sense Input
The MIC2111B has a dedicated input for thermal sense
from intell igent power stag es. The tem perature sense pin
(TJ) senses the voltage divided from thermal sense
signal and sends it to the comparator. If this voltage is
higher than the reference voltage, the thermal shutdown
engages and FAULTb is pulled low. Thermal shutdown
threshold can be programmed through a resistive divider
from TJ.
−
×= V6.0 V6.0V
RR
TSENSE
41
Eq. 2
Figure 9. Thermal-Shutdown Progr am ming
Output will be turned off by pulling FAULTb low after TJ
fault is triggered. The fault will be released after
hysteresis of 50mV is achieved.
Micrel, Inc.
MIC2111B
October
13, 2015 22 Revision 2.1
Application Information
Programmi n g Outpu t Voltage with RS Amplifier
Diagram
The output voltage is set using a resistive voltage divider
from the output of differential amplifier to FB (Figure 10).
For R1, use a 1kΩ to 10kΩ resistor. Choose R4 to set the
output voltage by using Equation 3.
−
×=
FBOUT
FB
14
VV V
RR
Eq. 3
Where VFB = 0.6 V.
Figure 10. Programming Output Voltage
Current Sensing and Current Limit
MIC2111B has differential current-sense input with a
dedicated current-sense amplifier. MIC2111BThe
MIC2111B has current-sense amplifier gain of 30V/V and
uses lossless inductor current sensing. This offers the
advantage of lo wer p o wer l os s and lo w er c os t o ver us i ng a
discrete resistor in series with the inductor.
The inductor s ense c irc u it i s shown in F igure 11. It ex tracts
the voltage drop across the inductor’s DC winding
resistance.
Figure 11. MIC2111B Current Sensing
Micrel, Inc.
MIC2111B
October
13, 2015 23 Revision 2.1
The voltage across capacitor C1 is illustrated in Equation
4:
+×
+
×
=17R1sC
1
R
sL
R
IV L
LLS
Eq. 4
If the R7 x C1 time constant is equal to the L/RL time
constant, th en the vo ltage acros s capac itor C1 equ als R L x
IL. Figure 12 is a plot of Equation 4. It assumes an
inductanc e of 1.5µH , RL = 0.01Ω (−40dB), C 1 = 0.1µF and
R7 = 1.5kΩ. The time constants are equal and diverge at
the same rate. The overall impedance, H(s), equals RL for
all frequencies.
Figure 12. Current -Sense Gain/Phase Plot
For a system employing the MIC2111B with inductor
current sensing, the absolute current-limit threshold is:
DCR
THRESH
LIM R
V
I=
Eq. 7
Here, RDCR is the inductor DC resistance. For RDCR = 1mΩ
and a 23.3mV current-limit voltage threshold, the absolute
current limit would be:
A3.23)m1/(V0233.0
R
V
IDCR
THRESH
LIM =Ω==
Eq. 8
For compensating the inductor’s DCR variation with
temperature, an NTC is placed in parallel with the resistor
(R7) in Figure 11.
Slope Com pensation
Slope compensation is required in most conditions for
current-mode PWM controllers. The MIC2111B applies
slope compensation dependent on the system input
voltage, o utpu t v olt age and ind uc tanc e b y a sing le resi stor .
The resistor is connected between VIN and the SLOPE
pin.
In VCM, 1x slope compensation is implemented by
selecting the following resistor value:
RSLOPE = KSLOPE × L / [(AISENAMP × RSENSE)]
KSLOPE = 1.33 × 1010Ω/s
L = Induc tor value
AISENAMP = Inter na l current amplif ier gai n
(30 in MIC2111B)
RSENSE = External current-sense gain
For low-frequency applications (less than 500kHz) and
noisy systems, increasing the slope compensation by a
factor of 2 is recommended.
Micrel, Inc.
MIC2111B
October
13, 2015 24 Revision 2.1
Because slope compensation is not needed in voltage
mode, the SLOPE pin is used to generate the sawtooth
ramp. A 1V peak-to-peak ramp at the PWM comparator
input is implemented by selecting the following resistor
value:
RSLOPE = KSLOPE × T × (VIN − VOUT)
KSLOPE = 1.33 × 1010 Ω/s
T = Switching period (1/switching frequency)
VIN = System input voltage
VOUT = Output volta ge
Figure 13. Valley Current Mode Compensation
Figure 14. Voltage Mode Ramp Generation
Loop Compensation
Current Mode (Type II Method)
The MIC2111B uses an internal transconductance error
amplifier wherein the outpu t com pens ates the c ontr ol loop.
The external inductor, output capacitor, slope
compensation resistor and compensation network all
determine the loop stability. The inductor and output
capacitors are chosen based on performance, size, and
cost. T he MIC2111B is configured in a valley current-mode
control scheme when the SEL pin is connected to AGND.
In this mode, the MIC2111B regulates the output voltage
by forcing the required current through the external
inductor. Current-m ode control el iminates the double pole
in the feedback loop which is caused by the inductor and
output capacitor. This will result in a smaller phase shift
and requires less elaborate error-amplifier compensation
than voltage-mode control. A simple series RC and CC is all
that is needed to have a stable, high-bandwidth loop in
applications where ceramic capacitors are used for output
filtering. For other types of capacitors, due to the higher
capacitance and ESR, the frequency of the zero created
by the capacitance and ESR is lower than the desired
closed-loop crossover frequency. To stabilize a non-
ceramic output-capacitor loop, one would need to add
another compensation capacitor from COMP to GND as it
cancels this ESR to zero. The basic regulator loop is
modeled as a p o wer modul ator, an output f eed bac k divider
and an error am plif ier.
The po wer m odulator has DC gain (AMOD(DC)), is s et b y RL,
(output load, equivalent resistance) with a pole and zero
pair set by RL, the output capacitor (COUT) and its
equivale nt series r esistanc e (RESR). Equation 9 define s the
power modulator (Figure 16)
SLOPE
L
L
CS
)DC(MOD
RR
1
R
A1
A+
=
Eq. 9
ACS = AISENAMP × RSENSE
As curr ent-mode c ontrol se parates the com plex LC do uble
pole, a pole is formed by load resistance and output
capacitance.
OUT
ZO
OUT L
PO
C ESR 2 1
ƒ
C R 2 1
ƒ
××π
=
××π
=
Eq. 10
Micrel, Inc.
MIC2111B
October
13, 2015 25 Revision 2.1
The f eedback voltage-di vider has a gain of AFB = VFB/VOUT,
where VFB is equal to 0.6V.The transconductance error
amplif ier has a DC gain, AEA(DC) = gmEA × RO, where gmEA is
the error-amplifier transconductance, which is equal to
2ms, and RO is the outp ut resistance of the error amplif ier,
which is 50MΩ. A dominant pole (ƒpdEA) is set by the
compensation capacitor (CC), the amplifier output
resistance (RO), and the compensation resistor (RC); a
zero (ƒzEA) is set by the compensation resistor (RC) and the
compensation capacitor (CC). There is an optional pole
(ƒpEA) set by CCƒ and RC to cancel the output capacitor
ESR zero if it occurs near the crossover frequency (ƒC):
( )
Cƒ
C
pEA
CC
zEA
CCO
pdEA
C
R
21
ƒ
C
R
2 1
ƒ
C
R R 2 1
ƒ
××
π
=
××
π
=
×+×π
=
Eq. 11
ƒpdEA =
CCO
C)RR(2 1
×+×π
The crossover frequency, ƒO, should be much higher than
the power-modulator pole ƒPO. Also, ƒC should be less than
or equal to 1/5 the switching frequency:
5
ƒ
ƒ ƒ SW
OPO ≤<<
Eq. 12
Choosing a lo wer cr os s -over frequency reduces the ef f ec ts
of noise pick up into the feedback loop, such as jittery dut y
cycle.
At the crossover frequenc y, the total loop gain must equal
1, and is expressed as:
AMOD(ƒo) × AEA(ƒo) × AFB = 1 Eq. 13
Mid-band gain is decided by the gm and RC:
AEA(ƒo) = gm × RC Eq. 14
Where gm = 2ms.
AMOD(ƒo) = AMOD(DC) ×
O
PO
ƒ
ƒ
Eq. 15
Then RC and CC can be calculated as:
)ƒ(MODm
FB
CO
Ag A
R×
=
Eq. 16
POC
CƒR
21
C××π
=
Eq. 17
For high-current applications, it is recommended to place
CCƒ to cancel the effect of ESR zero:
POC
Cƒ
ƒ R
2 1
C ××π
=
Eq. 18
Micrel, Inc.
MIC2111B
October
13, 2015 26 Revision 2.1
Figure 15. Valley Current Mode Loop Compensation
Figure 16. Voltage Mode Loop Compensation
Micrel, Inc.
MIC2111B
October
13, 2015 27 Revision 2.1
Equation 22 assumes crossover frequency to be much
less than half of the switching frequency. There is a
sampling effect at the half switching frequency which
introduces the double pole. For high crossover
applications, it is recommended to run a bode plot to
optimi ze the transi ent resp ons e.
Voltage Mode (Type III Method)
The MIC2111B provides an internal transconductance
amplifier with the inverting input (FB) and the output
(COMP) available for external frequency compensation.
The flexibility of external compensation allows for a wide
selection of output filtering components, especially the
output capacitor. The use of high-ESR aluminum
electrolytic capacitors is recommended for cost sensitive
applications. Use low-ESR POSCAPs or ceramic
capacitors at th e outpu t f or si ze sensit ive appl ications . T he
high switching frequency of the MIC2111B allows the use
of ceramic capacitors at the output. Choose all passive
power components to meet the output ripple, component
size, and component cost requirements. Choose the
compensation components for the error amplifier to
achieve the desired closed-loop bandwidth and phase
margin.
To choose the appropriate compensation network type, the
power supply poles and zeroes, the zero crossover
frequency, and the type of the output capacitor must be
determined first.
In a buck converter, the LC filter in the output stage
introduces a pair of complex poles at the following
frequency:
OUT
PO
C L 2 1
ƒ ××π
=
Eq. 19
The output capacitor introduces a zero at:
OUTESR
ZO CR 2 1
ƒ ××π
=
Eq. 20
where RESR is the equivalent series resistance of the
output capacitor.
The loop-gain crossover frequency (fO), where the loop
gain equals 1 (0dB) should be set below 1/10th of the
switching frequency as in:
ƒO ≤
10
ƒ
SW
Eq. 21
Choosing a lo wer c ross-over f requency reduces t he ef f ec ts
of noise pick-up into the feedback loop, such as jitter duty
cycle.
In order to maintain a stable system, two stability criteria
must be met:
1. The phas e shift at the cross -over frequency (ƒO,) m ust
be less than 180 °. In oth er w ords, th e phas e m ar gin of
the loop must be greater than zero.
2. The gain at the frequency where the phase shift is
−180° (gain margin) must be less than 1.
Maintain a p has e margin of ar oun d 6 0° t o ac h ie ve a ro bus t
loop stability and well-behaved transient response.
When using an electrolytic or large-ESR POSCAP output
capacitor the capacitor ESR zero (ƒZO) typically occurs
between t he LC po les an d t he c ros s over f r equency ƒO (ƒPO
< ƒZO < ƒO). Choose Type II Proportional and Integral (PI)
compensation network as previously specified.
When using a ceramic or low-ESR tantalum output
capacitor the capacitor ESR zero typically occurs above
the desired crossover frequency ƒO (ƒPO < ƒZO < ƒO).
Choose T ype III proportio nal, int egral, and d erivativ e (PID)
compensation network.
Figure 17. Type III Compensation Pole and Zero Locations
Micrel, Inc.
MIC2111B
October
13, 2015 28 Revision 2.1
Ensure that R2 >/gm and the parallel resistance of R1, R3,
and R4 is greater than 1/gM. Otherwise, a 180° phase shift
is introduced to the response making the loop unstable.
Use the following compensation procedures:
1. With R9 ≥ 10kΩ, place the first zero (ƒZ1) at 0.8 × ƒPO:
POZ1
ƒ8.0
C2 R9 2 1
ƒ ×=
××π
=
Eq. 22
So,
PO
2ƒ8
.0
9
R2 1
C×
××π
=
Eq. 23
2. The gain of the modulat or (AMOD), c omprises the puls e
width modulator, LC filter, feedback divider, and
associated circuitry at cross-over frequency is:
( )
OUT
OUT
2
O
RAMP
IN
MOD C
Lƒ
21
VV
A××
×
π
×
=
Eq. 24
The gain of the error amplifier (AEA) in mid-band
frequenc ies is :
AEA = 2π × ƒO × C3 × R9 Eq. 25
The total loop gain as the product of the modulator
gain and the error amplifier gain at ƒO is 1:
AMOD × AEA = 1 Eq. 26
So,
( )
1 R9 C ƒ2
LCƒ2 1
VV
3O
OUT
2
O
RAMP
IN
=××π×
×××π
×
Eq. 27
Solving for C3:
( )
9IN
OUTORAMP
3RV CLƒ2V
C×
×××π×
=
Eq. 28
3. Use the second pole (fP2) to cancel ƒZO when ƒPO < ƒO <
ƒZO < ƒSW/2. The frequency response of the loop gain
does not flatten out soon af ter the 0dB crossover, and
maintains −20dB/decade slope up to 1/2 of the
switchin g freque nc y. This is lik ely to occur if the outpu t
capacitor is a low-ESR tantalum. Set ƒP2 = ƒZO.
When using a ceramic capacitor the capacitor ESR
zero fZO is likely to be located even above one half of
the switch ing frequenc y, ƒPO < ƒO < ƒSW/2 < ƒZO. In this
case, place the frequency of the second pole (ƒP2)
high enough in order not to erode significantly the
phase margin at the crossover frequency. For
example, set fP2 at 5 × ƒO so that the contribution to
phase los s at the cr ossover f requenc y ƒO is onl y about
11°:
ƒP2 = 5 × ƒO Eq. 29
Once fP2 is known, calculate R1:
3P2
8C ƒ2 1
R××π
=
Eq. 30
4. Place the second zero (ƒZ2) at 0.2 × ƒO or at ƒPO,
whichever is lo wer and ca lc ulate R 1 us ing t he f ollow i ng
equation:
8
3Z2
5
R
C ƒ2 1
R−
××π
=
Eq. 31
5. Place the third pole (ƒP3) at 1/2 the switching
frequency and calculate CCF:
( )
1CRƒ5.02 C
4
C2
9SW
2−××××π
=
Eq. 32
6. Calculate R2 as:
5
FBOUT
FB
6R
VV V
R−
−
=
Eq. 33
Micrel, Inc.
MIC2111B
October
13, 2015 29 Revision 2.1
Design and Layout Checklist
• Ceram ic capacitor plac ed bet ween the VIN and PGND
close to power module input.
• Output ceramic capacitors should be placed next to
inductor output node for high-frequency decoupl ing .
• The signal and power ground planes must be
separated to prevent high current and fast switching
signals from interfering with the low level, noise
sensitive analog signals. These planes should be
connecte d at onl y 1 point.
• The following signals and their components should be
decoupled or referenced to the power ground plane:
− VIN, VCC, PGND
• These analog signals should be referenced or
decoupled to the analog ground plane:
− VCC, SS, PG, COMP, F B, VO UT, and AGND
• Place the current-sense lines in differential way. The
trace com ing from the switch node to this resistor has
high dv/dt an d shou ld be routed a wa y from other noise
sensitive components and traces.
• The remote sense traces must be routed close
together or on adjacent layers to minimize noise
pickup. The traces should be routed away from the
switch node, inductors, and other high dv/dt or di/dt
sources.
Micrel, Inc.
MIC2111B
October
13, 2015 30 Revision 2.1
Typical Application Schematic
Bill of Materials
Item Part Number Manufacturer Description Qty.
C1 C1608X7R1C684K080AC TDK(6) 0.68µF Ceramic Capacitor, X7R, 0603 Size,
16V 1
C2, C21, C24, C30 C1608C0G1H100D TDK 10pF Ceramic Capacitor, COG, 0603 Size, 50V 4
C3, C7, C16, C17, C23,
C31, R2, R6, R13, R15,
R16, R17, R22, R26 OPEN
C4, C9, C18, C19, C27,
C32, C33, C34 C1608X5R1E105K TDK 1µF Ceramic Capacitor, X5R, 0603 Size, 25V 8
C5 C1608C0G1H820J TDK 82pF Ceramic Capacitor, COG, 0603 Size, 50V 1
C6, C22 C1608C0G1H102J TDK 1nF Ceramic Capacitor, COG, 0603 Size, 50V 2
Note:
6. TDK: www.tdk.com.
Micrel, Inc.
MIC2111B
October
13, 2015 31 Revision 2.1
Bill of Materials (Continued)
Item Part Number Manufacturer Description Qty.
C8, C10 C3225X5R0J226M/1.60 TDK 22µF Ceramic Capacitor, X5R,1210 Size,6.3V 2
C11, C13 C3225X5R0J107M TDK 100µF Ceramic C apacitor, X5R,1210 Size,6.3V 2
C12, C20 C1608X7R1E104K TDK 100nF Ceramic Capacitor, X7R,0603 Size,25V 2
C15 6SVP470MX Panasonic(7) 470µF OS-CON Capacitor, 6.3V 1
C25, C28, C29 C3225X5R1E106M TDK 10µF Ceramic Capacitor, X5R,1210 Size, 25V 2
C26 EEEFP1E471AP Panasonic 470µF Aluminum Capacitor, 25V 1
L1 744325040 Wurth Electri c(8) 0.4µH Inductor, 37A Saturation Current 1
R1, R2, R3, R10 CRCW060310R0FKEA Vishay Dale
(9)
10Ω Resistor, 0603 Size, 1% 4
R4, R5, R7, R9, R29,
R30 CRCW060310K0FKEA Vishay Dale 10kΩ Resistor, 0603 Size, 1% 4
R8 CRCW0603866RFKEA Vishay Dale 866Ω Resistor, 0603 Size, 1% 1
R11, R14 CRCW06034K99FKEA Vishay Dale 4.99kΩ Resistor, 0603 Size, 1% 2
R12, R31, RSW CRCW06030000Z0EA Vishay Dale 0Ω Resistor, 0603 Size, 1% 3
R18, R23 CRCW06031R21FKEA Vishay Dale 1.21Ω Resistor, 0603 Size, 1% 2
R19 CRCW060311K0FKEA Vishay Dale 11kΩ Resistor, 0603 Size, 1% 1
R20 CRCW06031K00FKEA Vishay Dale 1kΩ Resistor, 0603 Size, 1% 1
R21 CRCW0603147KFKEA Vishay Dale 147kΩ Resistor, 0603 Size, 1% 1
R24 CRCW06035K49FKEA Vishay Dale 5.5kΩ Resistor, 0603 Size, 1% 1
R25 CRCW0603200KFKEA Vishay Dale 200kΩ Resistor, 0603 Size, 1% 1
R27 CRCW0603118KFKEA Vishay Dale 118kΩ Resistor, 0603 Size, 1% 1
R28 CRCW0603188KFKEA Vishay Dale 188kΩ Resistor, 0603 Size, 1% 1
U1 MIC2111B Micrel, Inc.(10) High-Performance, Multi-Mode, Step-Down
Controller 1
U2 SiC769ACD Vishay Dale 35A, DrMOS Module 1
U3 MIC5209-5.0YS Micrel Inc. 500mA, Low-Noise LDO Regulator 1
Notes:
7. Panasonic: www.industrial.panasonic.com.
8. Wurt h Elec tr i c: www.we-online.com.
9. Vis hay Dale: www.vishay.com.
10. Micrel, Inc.: www.micrel.com.
Micrel, Inc.
MIC2111B
October
13, 2015 32 Revision 2.1
PCB Layout Recommendations
Top Layer
Mid Layer 1
Micrel, Inc.
MIC2111B
October
13, 2015 33 Revision 2.1
PCB Layout Recommendations (Continued)
Mid Layer 2
Bottom Layer 1
Micrel, Inc.
MIC2111B
October
13, 2015 35 Revision 2.1
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com
Micrel, Inc. is a leading global m anufacturer of IC solutions for the worldwide high
-
perform ance linear and po wer, LAN, and tim ing & communications
markets. The Company’s products include advanced
mixed-signal, analog & power semiconductors; high-
performance communication, clock
management,
MEMs-based clock oscillators & crystal-less clock generators, Ethernet switches, and physical layer transceiver ICs.
Company
customers include leading manufact
urers of enterprise, consumer, industrial, mobile, telecommunications, automotive, and computer products.
Corporation headquarters and state
-of-the-
art wafer fabrication facilities are located in San Jose, CA, with regional sales and support offices and
advanced technol ogy design centers situated throughout the Americas, Europe, and Asia.
Additionally, the Company maintains an extensive network
of distribut ors and reps worldwide.
Micrel makes no representations or warranties with respect to the accuracy
or completeness of the information furnished in this data
sheet. This
information is not intended as a warranty and Micrel does not assume responsibility for its use.
Micrel reserves the right to change circuitry,
specifications and descriptions at any ti
me without notice.
No license, whether express, implied, arising by estoppel or otherwise, to any intellectual
property rights
is granted by this docum ent. Except as provided in Micrel’s t erms and condit ions of sale for such produc ts, Micrel assumes no li
ability
whatsoever, and Micrel disclaims any express or implied warranty relating to the sale and/or use of Micrel products including
liability or warranties
relating to fitness for a partic ular purpose, merchant abi lit y, or inf ri ngem ent of any patent, copy
right, or other intellectual property right.
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where mal
function of a product
can reasonably be expected to result in personal injury. Life s
upport devices or systems are devices or systems that (a) are intended for surgical
implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a signific ant inj ury to the user. A
Purchaser’s u
se or sale of Micrel Products for use in life support appliances, devices or syst ems is a Purchaser’s own risk and Purchaser
agrees to fully
indemnify Mic rel for any damages resulting from such use or sale.
© 2015 Micrel, Incorporated.
