GaN Bias Controller/Sequencer Module
Dual Supply: -8 to -3 V, +5 V
Rev. V2
MABC-001000-DPS00L
1
1
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Features
Robust GaN Protection at Any Power Up/Power
Down Sequence
Fixed Gate with Pulsed Drain Bias Voltage. Add-
On Module Allows for Gate Pulsing
Open Drain Output Current of ≤200 mA for
External MOSFET Switch Drive
30 dB EMI/RFI Rejection at All I/O Ports
6.60 x 22.48 mm2 Package with 1 mm Pitch SMT
Leads
Target ≤500 ns Total Switch Transition Time
Low Power Dissipation <100 mW
Gate Bias Output Current ≤50 mA for Heavy RF
Compression
RoHS* Compliant and 260°C Reflow Compatible
Description
The MABC-001000-DPS00L is a Low Power
Dissipation bias controller that provides proper gate
voltage and pulsed drain voltage biasing for a device
under test (DUT). Applicable DUT’s include
depletion-mode GaN (Gallium Nitride) or GaAs
(Gallium Arsenide) power amplifiers or HEMT
devices.
The module also provides bias sequencing so that
pulsed drain voltage cannot be applied to a DUT
unless the negative gate bias voltage is present.
The applications section of this datasheet will show
how the module can be implemented for the
following two applications:
Application Option 1: Fixed negative gate
biasing with pulsed drain biasing.
Application Option 2: Pulsed negative gate
biasing with pulsed drain biasing.
Both of these application options will recommend the
external circuitry and p-Channel Power MOSFET.
The MABC-001000-DP000L module can also be
installed onto an MABC-001000-PB2PPR evaluation
board for evaluation, test, and characterization
purposes.
Ordering Information
Part Number Packaging
MABC-001000-DPS00L Tray
MABC-001000-DPS0TL Tape & Reel2
MABC-001000-PB2PPR Gate and Drain Pulsing
Evaluation Board3
* Restrictions on Hazardous Substances,
European Union Directive 2011/65/EU.
Pin No. Label Function
1 GFB Gate Voltage (-) Feedback
2,6,8,10 NC No Connection
3 GCO Gate Voltage (-) Control Output
4 GCI Gate Voltage (-) Control Input
5 VGS Gate (-) Supply Voltage
7,13,14 GND Ground
9 SWG Driver Output to MOS Switch Gate
11 P4V +5 V VCC Input
12 ENS MOS Switch Enable TTL
Pin Configuration1
2. Reference Application Note M513 for reel size information.
3. Specify eval. board configuration when ordering: Application
Option 1 or 2. See Applications Section for option details.
1. This Configuration is for Fixed Gate Bias. Unused package
pins must be left open and not connected to ground.
Functional Schematic
1
2
3
4
5
12
11
10
9
8
76
1314
+
-
+
-
GFB
NC
GCO
GCI
VGS
ENS
P4V
NC
SWG
NC
NC GND
GND GND
GaN Bias Controller/Sequencer Module
Dual Supply: -8 to -3 V, +5 V
Rev. V2
MABC-001000-DPS00L
2
2
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DC-0008521
2
Electrical Characteristics: TA = 25°C
Absolute Maximum Ratings4,5 Recommended Operating Conditions
Symbol Parameter Conditions Min Typ Max Unit
VCC Supply Voltage, Positive 4.3 5 5.5 V
ICC Supply Current, Positive - 13 - mA
VGS Supply Voltage, Negative -8 -6 0 V
IGS Supply Current, Negative - -3 - mA
VENL Input Voltage, Logic 0, Pulse Enable 0 0 0.3 V
VENH Input Voltage, Logic 1, Pulse Enable 2 3.3 4.3 V
IEN Input Current, Pulse Enable - 40 - uA
VGTH Input, Gate Feedback Threshold to VGS - 2.7 - V
VDTH Input, Drain Feedback Threshold - 65% SWG - V
VGC Output Voltage, Pulsed/Fixed Gate -8 -3.5 -0.7 V
VGCR Output Voltage, Pulsed/Fixed Gate Ripple - 50 - mVp-p
IGC Output Gate Current, Peak - 50 - mA
ROFF Output Drive, Open Drain, OFF State
VDS = 50 V
Temp. = +85°C
- 4M -
RON Output Drive, Open Drain, ON State - 1.2 -
ION Output Drive, Current, ON State - 100 200 mA
Parameter Typical
Supply (+) Voltage, VCC +4.8 V to +5 V
Supply (-) Voltage, VGS -8 V to -2 V
Logic Voltage, ENS, GSE 0 V to +4.3 V
Analog (-) Voltage, GCI, GFB -8 V to 0.7V
Switch Driver Sink Current, SWG -1 mA to -200 mA
Operating Temperature -40°C to +85°C
Parameter Absolute Maximum
Supply (+) Voltage, VCC +4.3 V to +5.5 V
Supply (-) Voltage, VGS -10 V to 0 V
Logic Voltage, ENS, GSE -0.3 V to +4.5 V
Analog (-) Voltage, GCI, GFB -10 V to 0 V
Switch Driver Voltage, SWG 0 V to +60 V
Switch Driver Sink Current, SWG -200 mA
Lead Soldering Temp (10 s) +260°C
Operating Temperature -40°C to +85°C
Storage Temperature -65°C to +150°C
4. Exceeding any one or combination of these limits may cause
permanent damage to this device.
5. MACOM does not recommend sustained operation near these
survivability limits.
GaN Bias Controller/Sequencer Module
Dual Supply: -8 to -3 V, +5 V
Rev. V2
MABC-001000-DPS00L
3
3
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DC-0008521
3
TTL
VDS
VGS
RF
+5V
+50V
-3V
-8V
0
0
90%
PULSE ENABLE FOR
tD1 D2
D3
D4
RISE1 FALL1
t
t
t
tt
FALL2
t
10%
90%
10%
RISE2
t
10%
90%
90%
10%
0
+50V
VOD
GATE & DRAIN SWITCH
OPEN DRAIN OUTPUT
MOSFET SWITCH OUTPUT
PULSED GATE OUTPUT
RF OUTPUT
Timing Diagrams
Symbol Parameter Conditions Min Typ Max Unit
tD1 Open Drain ON Propagation Delay6
RPULL-UP = 700 Ω
VDD = 50 V
IR = 71 mA avg.
Switch Disconnected
- 100 150 ns
tD3 Open Drain OFF Propagation Delay6 - 70 100 ns
tRISE1 Open Drain Rise Time7 - 116 150 ns
tFALL1 Open Drain Fall Time7 - 58 100 ns
tD1 MOS Switch ON Propagation Delay6 - 200 - ns
RLOAD = 1200 Ω
VDD = 50 V
ILOAD = 42 mA avg.
MOS CISS = 760 pF
RDS,ON = 205 mΩ
tD3 MOS Switch OFF Propagation Delay6 - 1100 - ns
tRISE1 MOS Switch Rise Time7 - 126 - ns
tFALL1 MOS Switch Fall Time7 - 820 - ns
tD2 Gate Bias ON Propagation Delay6 - 156 200 ns
tD4 Gate Bias OFF Propagation Delay6 - 148 200 ns
tRISE2 Gate Bias Rise Time7 - 55 100 ns
tFALL2 Gate Bias Fall Time7 - 44 100 ns
6. Propagation delay is measured from 90% of the TTL signal to 10% of the signal of interest.
7. Rise and fall times are measured between 10% and 90% of the steady state signal.
Timing Characteristics: TA = 25°C
ENS
SWG
GCO
RF
8. Q1 refers to an external p-Channel MOSFET that pulses the drain of the DUT. See Applications Section for more information.
Vcc
+5V EXTERNAL +5V TO
ENABLE LOGIC
VDD (Q1)8
GaN Bias Controller/Sequencer Module
Dual Supply: -8 to -3 V, +5 V
Rev. V2
MABC-001000-DPS00L
4
4
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For further information and support please visit:
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DC-0008521
4
Applications Section
Functional Description
The MABC-001000-DPS00L GaN Bias Controller/
Sequencer Module circuitry provides proper
sequencing and generation of the gate voltage and
pulsed drain voltage for a device under test (DUT).
Reference the Product View and Pin Configuration
table on page 1. The basic functions of the circuits
within the module are described as follows:
Overhead Voltages for the Circuits within the
MABC-001000-DPS00L Module
Pin 11 (P4V) is the +5V Vcc Input that
supplies the positive voltage for the circuits
within the module.
Pin 5 (VGS) is the Gate (-) Supply Voltage
that is also used to supply the negative
voltage for the circuits within the module.
Negative Gate Voltage for the Device Under
Test (DUT)
A voltage follower op-amp circuit provides a
low impedance output to Pin 3 (GCO) Gate
Voltage (-) Control Output. Pin 3 (GCO)
output is connected to the gate terminal of a
DUT as shown in Figure 1 on page 5.
The reference voltage for the voltage
follower is provided by the Pin 4 (GCI) Gate
Voltage (-) Analog Input. This input
reference voltage is developed by an
external potentiometer/ resistive divider
circuit as shown in Figure 1 on page 5. It is
recommended to use the -8 V to -3 V
voltage that is also applied to Pin 5 (VGS).
Reference: The external potentiometer is
adjusted to set the gate voltage Pin 3 (GCO)
to the DUT. Alternative voltage inputs such
as a temperature compensation circuit or a
Digital-to-Analog (DAC) converter could also
be supplied to Pin 4 (GCI).
Pin 9 (SWG) MOS Switch Driver Output
An N-Channel MOSFET develops the
pulsed signal (SWG) to drive the
resistive divider network for the gate of an
external p-Channel HEXFET as shown in
Figure 1 on page 5. The input signal for the
internal MOSFET is provided by the output
from the sequencing circuits.
Sequencing Circuits
A voltage comparator circuit senses if the
negative gate voltage is present as an input
on Pin 1 (GFB) - Gate Voltage (-) Feedback.
A logic circuit provides the switched input
enable signal for the N-Channel MOSFET.
The following 3 signals must be at correct
levels to generate the enable logic
signal:
Pin 12 (ENS) MOS Switch Enable TTL
Negative gate voltage (GFB) is present
P4V voltage is present.
GaN Bias Controller/Sequencer Module
Dual Supply: -8 to -3 V, +5 V
Rev. V2
MABC-001000-DPS00L
5
5
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DC-0008521
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Applications Section
Part
Value MFG
MFG P/N
R1 2.7 kΩ Panasonic ERJ-2GEJ272X
R2,R3 1.02 kΩ Vishay CRCW25121K02FKEGHP
R4,R5 402 Ω Vishay CRCW2512402RFKEG
VR1 10 kΩ Bourns 3224W-1-103E
Q1 P-Channel
MOSFET IR IRF5210SPBF
Application Option 1:
Fixed Gate with Pulsed Drain Biasing
Figure 1 shows a block diagram of the
MABC-001000-DPS00L module with the
recommended external components to support this
application option. See Table 1 for component
recommendations and values.
Figure 1. Fixed Gate/Pulsed Drain Biasing
Module Layout Guidelines
Reference the Product View, Pin Configuration
Table on page 1, and the Recommended Landing
Pattern on page 7.
The following recommendations should be followed
when the MABC-001000-DPS00L module is used to
bias a high-power RF device or amplifier. The input
and output locations were determined so that the
layout and signal routing could be optimized when
interfacing with a high-power amplifier
assembly.
The negative gate voltage input and outputs are
located on the left side of the module and should
be located as close as possible to the gate bias
pads on t he high-power amplif ier
assembly.
The positive pulsed voltages are located on the
right side of the module and should be located
as close as possible to the external MOSFET
switch. The MOSFET switch drain should be
located as close as possible to the drain bias
pads on the high-power amplifier assembly. The
charge storage capacitors should be
located as close as possible to the MOSFET
switch source terminal pads.
The module ground pads are located at Pins 7,
13, and 14.
Route all signal lines and ground returns to be
as short as possible and implement a ground
plane on the back of the printed wiring board
(PWB) if that option is available to the
designer. Following these layout criteria will
minimize circuit parasitics that degrade the
performance of the pulsed signal.
Table 1. Recommended Parts List for Fixed
Gate/Pulsed Drain Biasing
RFIN RFOUT
MABC-001000-
DPS00L
DUT
+50 V
-8 V
TTL
3
9
5
4
6
1
R1
R2
VR1
COUT
CIN
R4
R3
R5
CSTORAGE
Q1
+5 V
11
GaN Bias Controller/Sequencer Module
Dual Supply: -8 to -3 V, +5 V
Rev. V2
MABC-001000-DPS00L
6
6
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DC-0008521
6
MABC-001000-000DPM
GaN
-8VDC
50VDC
2
4
5
6
10
9
8
PWM
IN OUT
GaN
IN OUT
VPOT
VTEMP
DAC
Applications Section
Figure 2. Pulsed Gate/Pulsed Drain Biasing:
(a) North Biasing; (b) South Biasing
Figure 3. Populated MABC-001000-PB2PPR
Evaluation Board
Figure 4. MABC-001000-PB2PPR with
MABC-001000-DPS00L Mounted
(a) (b)
Application Option 2:
Pulsed Gate and Pulsed Drain Biasing
A block diagram showing a typical application of
the MABC-001000-PB2PPR sample board is
shown in Figure 2 below. Figures 3 and 4 show
layouts of the MABC-001000-PB2PPR sample
board with/without the MABC-001000-DPS00L
module installed.
The additional external circuitry on the
MABC-001000-PB2 PPR sam ple boar d
provides the added capability of pulsed gate
biasing. It is important to note that the
evaluation boards can be configured for either
Option 1 or 2. A Full schematic, assembly
layout, and Bill of Materials are available upon
request.
Typical Application Circuits
Single GaN Device Control
MABC-001000-000DPM
GaN
VPOT
VTEMP
DAC
-8VDC
50VDC
2
4
5
6
10
9
8
PWM
IN OUT
MABC-001000-DPS00L
+5V 11
Multiple GaN Device Control (No RF redundancy)
MABC-001000-DPS00L
+5V
11
3 3
RFIN RFOUT
MABC-001000-
PB2PPR
DUT
+50 V -8 V
TTL
VD_PULSED
VG_B
VDD TTL -8V RFIN RFOUT
MABC-001000-
PB2PPR
DUT
+50 V-8 V TTL
VD_PULSEDVG_A
VDDTTL
-8V
P4V
P4V
+5 V
+5 V
GaN Bias Controller/Sequencer Module
Dual Supply: -8 to -3 V, +5 V
Rev. V2
MABC-001000-DPS00L
7
7
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DC-0008521
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Physical Dimensions10,11,12
Recommended Landing Pattern7 Handling Procedures
Please observe the following precautions to avoid
damage:
Static Sensitivity
This module is sensitive to electrostatic discharge
(ESD) and can be damaged by static electricity.
Proper ESD control techniques should be used
when handling these HBM class 1B devices.
10. All dimensions are in inches [mm].
11. Reference Application Note M538 for lead-free solder reflow
recommendations.
12. Plating is 100% Sn over BeCu.
GaN Bias Controller/Sequencer Module
Dual Supply: -8 to -3 V, +5 V
Rev. V2
MABC-001000-DPS00L
8
8
MACOM Technology Solutions Inc. (MACOM) and its affiliates reserve the right to make changes to the product(s) or information contained herein without notice.
Visit www.macom.com for additional data sheets and product information.
For further information and support please visit:
https://www.macom.com/support
DC-0008521
8
MACOM Technology Solutions Inc. All rights reserved.
Information in this document is provided in connection with MACOM Technology Solutions Inc ("MACOM")
products. These materials are provided by MACOM as a service to its customers and may be used for
informational purposes only. Except as provided in MACOM's Terms and Conditions of Sale for such products or
in any separate agreement related to this document, MACOM assumes no liability whatsoever. MACOM
assumes no responsibility for errors or omissions in these materials. MACOM may make changes to
specifications and product descriptions at any time, without notice. MACOM makes no commitment to update
the information and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future
changes to its specifications and product descriptions. No license, express or implied, by estoppels or otherwise,
to any intellectual property rights is granted by this document.
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IMPLIED, RELATING TO SALE AND/OR USE OF MACOM PRODUCTS INCLUDING LIABILITY OR
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