TC4040BP/BF
2014-03-01
1
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC4040BP, TC4040BF
TC4040B 12 Stage Ripple-Carry Binary Counter/Dividers
TC4040B is 12 stage ripple carry binary counter having
asynchronous clear function. This counter advances its counting
stage by falling edge of CLOCK input. When RESET input is
placed “H”, all the circuits are reset regardless of CLOCK input
making all the outputs (Q1 through Q12) to be “L”.
This is most suitable for frequency dividers, control circuits
and timing circuits.
Pin Assignment
Truth Table
CLOCK Δ RESET Output State
* H All Outputs = “L”
L No Change
L Advance to Next State
Δ: Level change
*: Don’t care
TC4040BP
TC4040BF
Weight
DIP16-P-300-2.54A : 1.00 g (typ.)
SOP16-P-300-1.27A : 0.18 g (typ.)
Start of commercial production
1978-09
TC4040BP/BF
2014-03-01
2
Logic Diagram
Absolute Maximum Ratings (Note)
Characteristics Symbol Rating Unit
DC supply voltage VDD V
SS − 0.5 to VSS + 20 V
Input voltage VIN V
SS − 0.5 to VDD + 0.5 V
Output voltage VOUT V
SS − 0.5 to VDD + 0.5 V
DC input current IIN ±10 mA
Power dissipation PD 300 (DIP)/180 (SOIC) mW
Operating temperature range Topr −40 to 85 °C
Storage temperature range Tstg −65 to 150 °C
Note: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or
even destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly
even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute
maximum ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Operating ranges (VSS = 0 V) (Note)
Characteristics Symbol Test Condition Min Typ. Max Unit
DC supply voltage VDD ⎯ 3 ⎯ 18 V
Input voltage VIN ⎯ 0 ⎯ V
DD V
Note: The operating ranges must be maintained to ensure the normal operation of the device.
Unused inputs must be tied to either VDD or VSS.
TC4040BP/BF
2014-03-01
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Static Electrical Characteristics (VSS = 0 V)
Test Condition −40°C 25°C 85°C
Characteristics Sym-
bol VDD
(V) Min Max Min Typ. Max Min Max
Unit
High-level output
voltage VOH ⎪IOUT⎪ < 1 μA
VIN = VSS, VDD
5
10
15
4.95
9.95
14.95
⎯
⎯
⎯
4.95
9.95
14.95
5.00
10.00
15.00
⎯
⎯
⎯
4.95
9.95
14.95
⎯
⎯
⎯
V
Low-level output
voltage VOL ⎪IOUT⎪ < 1 μA
VIN = VSS, VDD
5
10
15
⎯
⎯
⎯
0.05
0.05
0.05
⎯
⎯
⎯
0.00
0.00
0.00
0.05
0.05
0.05
⎯
⎯
⎯
0.05
0.05
0.05
V
VOH = 4.6 V
VOH = 2.5 V
VOH = 9.5 V
VOH = 13.5 V
5
5
10
15
−0.61
−2.50
−1.50
−4.00
⎯
⎯
⎯
⎯
−0.51
−2.10
−1.30
−3.40
−1.0
−4.0
−2.2
−9.0
⎯
⎯
⎯
⎯
−0.42
−1.70
−1.10
−2.80
⎯
⎯
⎯
⎯
Output high current IOH
VIN = VSS, VDD
mA
VOL = 0.4 V
VOL = 0.5 V
VOL = 1.5 V
5
10
15
0.61
1.50
4.00
⎯
⎯
⎯
0.51
1.30
3.40
1.5
3.2
12.0
⎯
⎯
⎯
0.42
1.10
2.80
⎯
⎯
⎯
Output low current IOL
VIN = VSS, VDD
mA
VOUT = 0.5 V, 4.5 V
VOUT = 1.0 V, 9.0 V
VOUT = 1.5 V, 13.5 V
5
10
15
3.5
7.0
11.0
⎯
⎯
⎯
3.5
7.0
11.0
2.75
5.50
8.25
⎯
⎯
⎯
3.5
7.0
11.0
⎯
⎯
⎯
Input high voltage VIH
⎪IOUT⎪ < 1 μA
V
VOUT = 0.5 V, 4.5 V
VOUT = 1.0 V, 9.0 V
VOUT = 1.5 V, 13.5 V
5
10
15
⎯
⎯
⎯
1.5
3.0
4.0
⎯
⎯
⎯
2.25
4.50
6.75
1.5
3.0
4.0
⎯
⎯
⎯
1.5
3.0
4.0
Input low voltage VIL
⎪IOUT⎪ < 1 μA
V
“H” level IIH V
IH = 18 V 18 ⎯ 0.1 ⎯ 10−50.1 ⎯ 1.0
Input
current “L” level IIL V
IL = 0 V 18 ⎯ −0.1 ⎯ −10−5−0.1 ⎯ −1.0
μA
Quiescent supply
current IDD VIN = VSS, VDD
(Note)
5
10
15
⎯
⎯
⎯
5
10
20
⎯
⎯
⎯
0.005
0.010
0.015
5
10
20
⎯
⎯
⎯
150
300
600
μA
Note: All valid input combinations.
TC4040BP/BF
2014-03-01
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Dynamic Electrical Characteristics (Ta = 25°C, VSS = 0 V, CL = 50 pF)
Test Condition
Characteristics Symbol
V
DD (V)
Min Typ. Max Unit
Output transition time
(low to high)
tTLH ⎯
5
10
15
⎯
⎯
⎯
70
35
30
200
100
80
ns
Output transition time
(high to low)
tTHL ⎯
5
10
15
⎯
⎯
⎯
70
35
30
200
100
80
ns
Propagation delay time
(CLOCK -Q1)
tpLH ⎯
5
10
15
⎯
⎯
⎯
160
80
65
360
160
130
ns
Propagation delay time
(CLOCK -Q1) tpHL ⎯
5
10
15
⎯
⎯
⎯
160
80
65
360
160
130
ns
Propagation delay time
(CLOCK -Q12) tpLH ⎯
5
10
15
⎯
⎯
⎯
900
450
360
1800
900
720
ns
Propagation delay time
(CLOCK -Q12) tpHL ⎯
5
10
15
⎯
⎯
⎯
900
450
360
1800
900
720
ns
Propagation delay time
(RESET-Q) tpHL ⎯
5
10
15
⎯
⎯
⎯
150
70
50
280
120
100
ns
Max clock frequency fCL ⎯
5
10
15
3.5
8.0
12.0
10
20
25
⎯
⎯
⎯
MHz
Min clock pulse width tW ⎯
5
10
15
⎯
⎯
⎯
50
20
15
140
60
40
ns
Min pulse width
(RESET) tW ⎯
5
10
15
⎯
⎯
⎯
100
40
30
200
80
60
ns
Min removal time
(RESET- CLOCK ) trem ⎯
5
10
15
⎯
⎯
⎯
⎯
⎯
⎯
350
150
100
ns
Max clock input rise time
Max clock input fall time
trCL
tfCL
⎯
5
10
15
No limit μs
Input capacitance CIN ⎯ ⎯ 5 7.5 pF
TC4040BP/BF
2014-03-01
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Waveforms for Measurement of Dynamic Characteristics
Waveform 1
Waveform 2
TC4040BP/BF
2014-03-01
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Package Dimensions
Weight: 1.00 g (typ.)
TC4040BP/BF
2014-03-01
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Package Dimensions
Weight: 0.18 g (typ.)
TC4040BP/BF
2014-03-01
8
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