Digital Delay Units 10 Taps (32 pins DIP) TL interfaced series: DDU-5J Features: = Completely interfaced for TTL and DTL applications. @ No external components required. @ 10 Taps equally spaced. m@ P. C. board space economy achieved. Specifications: M@ Delay tolerance: + 5% or better, or 2 ns whichever is greater. @ Rise-time: 2 ns typically. HM Temperature coefficient: 100 PPM/*C. MH Temperature range: 0C to 70C standard. (-55C to + 125C on request)" @ Supply voltage: 5 Vdc + 5%. @ Power dissipation: 780 mw max. @ DC Parameters: See Fast-TTL Schottky Logic Table on Page 6. Add M after Part No. Example ODU-5J-1010M 320 Max. for M" Units ew e | tal 1 oh uax #0 tat =I wre 150 6 po ad we] rie Pl see +200 + = Se Total Delay Part No. Delay Per fap (ns) (ns) DOU-SJ- 10050 50 5 DOU-5J-10100 160 10 DDU-SJ- 10150 150 15 ODU-5J-10200 200 26 DDU-5d-10250 250 25 DDU-5J-10300 300 30 DOU-5J-10400 400 40 DBU-5J-10500 500 50 DOU-5J-101000 1000 100 BOU-6-101500 1500 150 DDU-5d-102000 2000 206 3 Mt. Prospect Avenue, Clifton, New Jersey 07013 m (201) 773-2299 = FAX (201) 773-9672 11