U2741B - Atmel Corporation

Features

•

Very High Transmitting Frequency Accuracy Compared to SAW Solutions

(Enables Receivers at Lower Bandwidth than with SAW Resonators)

•

Lower Cost than the Usual Discrete Solutions Using SAW and Transistors

•

Supply Voltage 2.0V to 5.5V in the Temperature Range –20°C to +70°C

Supply Voltage 2.2 V to 5.5 V in the Temperature Range –40°C to +85°C

•

XTO Output for Clocking the Microcontroller, Thereby Together with

the ATAR090 or ATAR890 Results in the Optimum System

Cost-effectiveness

•

One-chip Solution with Minimum External Circuitry

•

Very Small SSO16 Package, Pitch 0.635, 150 mil

•

“Single-ended Open-collector” Output (Same Antennas as in Discrete Solutions Can

Be Used, Simpler Adaptation of Magnetic Loop Antennas)

•

Very Large FSK Frequency Deviation Achievable by ±100 ppm Pulling of the Reference

Crystal

•

Enables Receivers at Lower Bandwidth than with SAW Resonators

•

ESD Protection According to MIL-STD.883 (4 KV HBM) Except Pins XTO1/ 2,

ANT and LF

Electrostatic sensitive device.

Observe precautions for handling.

1. Description

The U2741B is a PLL transmitter IC which has been especially developed for the

demands of RF low-cost data transmission systems at data rates up to 20 kBaud.

The transmitting frequency range is 300 MHz to 450 MHz. The device can be used in

both FSK and ASK systems.

UHF ASK/FSK

Transmitter

U2741B

Rev. 4733B–RKE–09/05

4733B–RKE–09/05

U2741B

Figure 1-1. System Block Diagram

Figure 1-2. Block Diagram

Demod.

IF Amp

LNA VCO

PLL XTO

Control

U3741BM

1...3

Micro-

controller

Power

amp.

XTO VCO

PLL

U2741B

Antenna Antenna

UHF ASK/FSK

Remote control transmitter UHF ASK/FSK

Remote control receiver

Encoder

ATARx9x

1 Li cell

Keys

Power

VCO

XTO

ASK

FSK

VCC

CLK

GND

LFVCC

LFGND

DIVC

PWRSET

PWRVCC

ANT

PWRGND1

PWRGND2

XTO1

XTO2

U2741B

4733B–RKE–09/05

U2741B

2. Pin Configuration

Figure 2-1. Pinning SSO16

VCC

CLK

GND

LFVCC

LFGND

ASK

FSK

PWRVCC

ANT

PWRGND1

PWRGND2

XTO1

XTO2

DIVIC

PWRSET

U2741B

Table 2-1. Pin Description

Pin Symbol Function

1 ASK Modulation input ASK

2 FSK Modulation input FSK

3 VCC Supply voltage

4 CLK Clock output

5 GND Ground

6 LFVCC Supply voltage VCO

7 LFGND VCO ground

8 LF Circuit PLL loop

9 XTO2 FM modulation output

10 XTO1 Connection for crystal

11 PWRGND2 Power GND2

12 PWRGND1 Power GND1

13 ANT RF output

14 PWRVCC Supply voltage power amplifier

15 PWRSET Applied to VCC

16 DIVIC

Pitch factor setting for crystal

L: high crystal frequency

H: low crystal frequency

4733B–RKE–09/05

U2741B

3. General Description

The fully integrated VCO and the “single-ended open-collector” output allow particularly simple,

low-cost RF miniature transmitters to be assembled. The single-ended output enables a consid-

erably simplified adaptation of both a magnetic loop antenna of any form or a λ/4 antenna. This

is because the load impedance must not be balanced as would be the case with a differential

output.

The XTO’s frequency can be selected at either 13.56 MHz (USA 9.844 MHz) or 6.78 MHz (USA

4.9219 MHz). Thus, it is possible to use not only exceptionally small SMD crystals at 13.56 MHz

but also very low-cost 6.78 MHz crystals in a wired metal package (e.g., in the HC49S housing).

The frequency is selected by connecting pin 16 (DIVC) to either GND or VS.

At high frequencies, crystals have a very fast start-up time (< 1.5 ms at 13.56 MHz, < 3 ms at

6.78 MHz), whereby a wait time of 5 to 10 ms is required until the transmitter IC is locked. This

means that the processor does not need to poll a lock detect output.

4. Functional Description

The IC can be switched on at both the FSK and the ASK input. The IC's ChipSelect is performed

by the logical OR operation of ASK and FSK input. In the case of VFSK, VASK ≤ 0.3V, the power-

down supply current is ISoff < 0.35 µA. The ASK input activates the power amplifier and the PLL.

The FSK input only activates the PLL and, if capacitor C3 is installed, pulls the crystal to the

lower frequency, whereby the transmitter is FSK modulated. After switching on at FSK, the VCO

locks onto the 32 or 64 times higher frequency of the crystal oscillator.

4.1 FSK Transmission

The U2741B is switched on by VFSK = VS. 5 ms later, VS is applied to VASK. The output can then

be modulated by means of pin FSK. This is done by connecting capacitor C3 in parallel to the

load capacitor C4.

4.2 ASK Transmission

The U2741B is activated by VFSK = VS. VASK remains 0V for 5 ms, then the output power can be

modulated by means of pin ASK. In this case, VFSK remains = VS during the message, the

capacitor C3 is not mounted.

4.3 Take-over of the Clock Pulse in the Microcontroller

The clock of the crystal oscillator can be used for clocking the microcontroller. The ATAR090

and ATAR890 have the special feature of starting with an integrated RC oscillator to switch on

the U2741B with VFSK = VS. 5 ms later, the 3.39-MHz clock frequency is present, so that the

message can be sent with crystal accuracy.

4733B–RKE–09/05

U2741B

5. Application Circuit

The following component values are recommendations for a typical application. C5, C6, and C7

are block capacitors. The values of these capacitors depend on the board layout. C5 = 1 nF,

C6 = 1 nF, and C7 = 22 nF are typically used here. For C5, the impedance between f = 100 MHz

and f = 1 GHz should be as low as possible.

C3 is not needed in ASK transmitter applications. In the case of FSK, C3 is selected in such a

way that the desired transmission frequency deviation is achieved (typical ±30 kHz). The capac-

itance here depends upon the crystal's load capacity (C4) recommended by the manufacturer of

the crystal. C2 = 3.9 nF, C1 = 15 nF, and R4 = 220Ω.

CLoop1 and CLoop2 are selected so that the antenna oscillates in resonance and the adaptation to

the appropriate impedance transformation is possible.

LFeed is an inductor for the antenna's DC current supply. A typical value is LFeed = 220 nH. LFeed

can be either printed on the PC board or be a discrete component.

5.1 Output Power Measurement

The output network [as shown in Figure 5-1] can be used for output power evaluation, the exact

values of L10 and C10 depend on the layout.

L10 and C10 form the transformation network to adopt the output impedance of the IC to 50Ω.

Table 5-1 shows the values for an output power of 2 mW and an RPWRSET = 1.2 kΩ.

Figure 5-1. Measurement Output Network

Table 5-1. Transformation Network

f/MHz C10/pF L10/nH ZLoad_opt/Ω

315 2.7 56 260 + j330

433.92 1.8 33 185 + j268

PWRVCC

ANT

50 Ω

Load-opt

4733B–RKE–09/05

U2741B

Figure 5-2. Application Circuit

161

Power

VCO

XTO

ASK

FSK

VCC

CLK

GND

LFVCC

LFGND

DIVC

PWRSET

PWRVCC

ANT

PWRGND1

PWRGND2

XTO1

XTO2

PWRSET

Feed

Loop1

13.56 MHz

+VS = 2.0 ... 5.5 V

Loop2

ASK

FSK

CLK

3.39 MHz

U2741B

Antenna

4733B–RKE–09/05

U2741B

6. Absolute Maximum Ratings

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating

only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this

specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

Parameters Symbol Min. Max. Unit

Supply voltage VS6V

Power dissipation Ptot 250 mW

Junction temperature Tj150 °C

Storage temperature Tstg –55 125 °C

Ambient temperature Tamb –40 105 °C

7. Thermal Resistance

Parameters Symbol Value Unit

Junction ambient RthJA 180 K/W

8. Electrical Characteristics

All parameters are referred to GND (pin 5). The possible operating ranges refer to different circuit conditions:

VS = 2.0V to 5.5V at Tamb = –20°C to +70°C, VS = 2.2V to 5.5V at Tamb = –40°C to +85°C (typically 25°C, 3V)

Parameters Test Conditions Symbol Min. Typ. Max. Unit

Supply current (power down) VASK, VFSK ≤ 0.3V, VS < 3.6V ISoff 0.35 µA

Supply current (power up, output OFF) VASK = GND, VFSK = VS, Vs = 3V ISon 4.7 6.2 mA

Supply current (power up, output ON) VASK = VS, VS = 3V, RPWRSET = 1.2 kΩIStransmit 10 12.5 mA

Output power

VS = 3V, Tamb = 25°C, f = 433.92 MHz

RPWRSET = 1.2 kΩ

RPWRSET = 1.8 kΩPRef

PRef

1.5

–0.5

dBm

Output power variation for the full

temperature range

Tamb = –40°C to +85°C, f = 433.92 MHz,

VS = 3.0V

VS = 2.4V

Tamb = –20°C to +85°C, f = 433.92 MHz,

VS = 2.0V

Pout = PRef + ∆PRef

∆PRef

–1.5

–4.0

–5.5

Output power variation for

f = 315 MHz compared to

f = 433.92 MHz

f = 315 MHz

Pout = PRef + ∆PRef

∆PRef 1.5 dB

Maximum peak output

antenna voltage

at Pout = 2.0 mW,

the load impedance must be selected to

meet the Vout maximum requirement

the supply current is not dependent on

the load impedance tolerance

Voutmax VS – 0.7V V(peak)

Spurious emission

at Tamb = 25°C

fo ±(n × fPC) where fPC = 6.78 MHz

Load capacitance at CLK ≤ 3 pF

f = 230 MHz to 470 MHz

f < 230 MHz, f > 470 MHz

–40

–58

dBC

4733B–RKE–09/05

U2741B

Oscillator frequency XTO

M-version: at Tamb = 25°C

N-version: full temperature range

(monitoring)

Crystal frequency = 13.56 MHz

Crystal frequency = 6.78 MHz

Load capacity of the crystal must be

selected accordingly

fXTO

13.56 –

30 ppm

6.78 –

30 ppm

13.56

6.78

13.56 +

30 ppm

6.78 +

30 ppm

MHz

Loop bandwidth

For best LO noise

Loop filter components:

C2 = 3.9 nF, C1 = 15 nF, R4 = 220ΩBLoop 100 kHz

Phase noise PLL Referring to the phase comparator

fPC = 6.78 MHz PNPLL –111 –105 dBC/Hz

Phase noise VCO at 1 MHz

at 36 MHz

PNVCO

–91

–123

–87

–119 dBC/Hz

Frequency range of the VCO fVCO 300 450 MHz

Clock output

(CMOS microcontroller compatible) Clkout fout/128 MHz

Load capacitance at CLK CCLK 10 pF

Series resonance R of the crystal

fXTO = 13.56 MHz

fXTO = 9.84 MHz

fXTO = 6.78 MHz

fXTO = 4.90 MHz

100

150

225

Ω

FSK modulation frequency rate Duty cycle of the

modulation signal = 50% fmodFSK 020kHz

ASK modulation frequency rate Duty cycle of the

modulation signal = 50% fmodASK 020kHz

CLK output

- Output current Low

- Output current High

VCLK = 0.2 × VS

VCLK = 0.3 × VS

VCLK = 0.8 × VS

VCLK = 0.7 × VS

Iol

Ioh

150

200

–150

–200 +100

µA

ASK input

- Low level input voltage

- High level input voltage

- Input current High

VASKl

VASKh

IASKh

1.7

0.3

140

µA

FSK input

- Low level input voltage

- High level input voltage

- Input current High

VFSKl

VFSKh

IFSKh

1.7

0.3

140

µA

8. Electrical Characteristics (Continued)

All parameters are referred to GND (pin 5). The possible operating ranges refer to different circuit conditions:

VS = 2.0V to 5.5V at Tamb = –20°C to +70°C, VS = 2.2V to 5.5V at Tamb = –40°C to +85°C (typically 25°C, 3V)

Parameters Test Conditions Symbol Min. Typ. Max. Unit

4733B–RKE–09/05

U2741B

10. Package Information

9. Ordering Information

Extended Type Number Package Remarks

U2741B-NFBY SSO16 Tube, optimized power-supply rejection, value of C4

differs from M-version, enhanced XTO stability, Pb-free

U2741B-NFBG3Y SSO16 Taped and reeled, see above, Pb-free

Dimensions in mm

specifications

according to DIN

technical drawings

916

Issue: 2; 05.02.99

Drawing-No.: 6.543-5060.01-4

Package acc. JEDEC MO 137 AB

Drawing refers to following types: SSO16

6±0.2

5±0.2

3.95 max.

4.9±0.1

5 max.

0.25

0.635 nom.

7 x 0.635 = 4.445 nom.

1.7 max.

1.4

0.6

0.2

0.1+0.15

4733B–RKE–09/05

U2741B

11. Revision History

Please note that the following page numbers referred to in this section refer to the specific revision

mentioned, not to this document.

Revision No. History

4733B-RKE-09/05

• Put datasheet in a new template

• Pb-free Logo on page 1 added

• Ordering Information on page 9 changed

Printed on recycled paper.

4733B–RKE–09/05

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