2001-2016 Microchip Technology Inc. DS20001667G-page 1
MCP2551
Features
• Supports 1 Mb/s operation
• Implements ISO-11898 standard physical layer
requirements
• Suitable for 12V and 24V systems
• Externally-controlled slope for reduced RFI
emissions
• Detection of ground fault (permanent Dominant)
on TXD input
• Power-on Reset and voltage brown-out protection
• An unpowered node or brown-out event will not
disturb the CAN bus
• Low current standby operation
• Protection against damage due to short-circuit
conditions (positive or negative battery voltage)
• Protection against high-voltage transients
• Automatic thermal shutdown protection
• Up to 112 nodes can be connected
• High-noise immunity due to differential bus
implementation
• Temperature ranges:
- Industrial (I): -40°C to +85°C
- Extended (E): -40°C to +125°C
Package Types
Block Diagram
RS
CANH
CANL
VREF
TXD
VSS
VDD
RXD
1
2
3
4
8
7
6
5
PDIP/SOIC
MCP2551
Thermal
Shutdown
VDD
VSS
CANH
CANL
TXD
RS
RXD
VREF
VDD
Slope
Control Power-On
Reset
Reference
Voltage Receiver
GND
0.5 VDD
TXD
Dominant
Detect
Driver
Control
High-Speed CAN Transceiver
Not Recommended for New Designs
Please use MCP2561
MCP2551
DS20001667G-page 2 2001-2016 Microchip Technology Inc.
NOTES:
2001-2016 Microchip Technology Inc. DS20001667G-page 3
MCP2551
1.0 DEVICE OVERVIEW
The MCP2551 is a high-speed CAN, fault-tolerant
device that serves as the interface between a CAN
proto col controller and the ph ysical bus. The MCP2551
device provides differential transmit and receive
capability for the CAN protocol controller, and is fully
comp atible with the I SO-11898 s tandard , includ ing 24V
requirements. It will operate at speeds of up to 1 Mb/s.
Typically, each node in a CAN system must have a
device to convert the digital signals generated by a
CAN co ntroller to si gnals suit able for t ransmissio n over
the bus cabling (differential output). It also provides a
buff er between the CA N controller and the hi gh-voltag e
spikes that can be generated on the CAN bus by
outside sources (EMI, ESD, electrical transients, etc.).
1.1 Transmitter Function
The CAN bus has two states: Dominant and
Recessive. A Dominant state occurs when the
differential voltage between CANH and CANL is
great er than a defined v oltag e (e.g.,1.2 V). A Rece ssive
state occurs wh en the differen tia l v ol t ag e i s less than a
defined voltage (typically 0V). The Dominant and
Reces sive sta tes correspon d to the Low and High state
of the TXD input pin, respectively. However, a
Dominant state initiated by another CAN node will
override a Recessive state on the CAN bus.
1.1.1 MAXIMUM NUMBER OF NODES
The MCP2551 CAN outputs will drive a minimum load
of 45, allowing a maximum of 112 nodes to be
connected (given a minimum differential input
resistance of 20 k and a nominal termination resistor
value of 120
1.2 Receiver Function
The RXD outp ut pin refle ct s the dif feren tia l bus volt ag e
between CA NH and CANL. The Low and Hi gh states of
the RXD output pin correspond to the Dominant and
Recessiv e states of the CAN bus, respectively.
1.3 Internal Protection
CANH and CANL are protected against battery short
circuits and electrical transients that can occur on the
CAN bus. This feature prevents destruction of the
transmi tter out put stage during such a fault condition.
The device is further protected from excessive current
loading by thermal shutdown circuitry that disables the
outp ut dri vers w hen th e junc tion te mpera ture e xceeds
a nominal limit of 165°C. All other parts of the chip
remain operational, and the chip temperature is low-
ered due to the decreased power dissipation in the
transmitter outputs. This protection is essential to
protect against bus line short-circuit-induced damage.
1.4 Operating Modes
The RS pin allows three modes of operation to be
selected:
•High-Speed
• Slope-Control
• Standby
These mode s are sum m ariz ed in Table 1-1.
When in High-Speed or Slope-Control mode, the
drivers for the CANH and CANL signals are internally
regulated to provide controlled symmetry in order to
minimize EMI emissions.
Additionally, the slope of the signal transitions on
CANH and CANL can be controlled with a resistor
connected from pin 8 (RS) to ground. The slope must
be proportional to the current output at RS, which will
further reduce EMI emissions.
1.4.1 HIGH-SPEED
High-Speed mode is selec ted by co nnecti ng the RS pin
to VSS. In this mode, the transmitter ou tput drivers have
fast output rise and fall times to support high-speed
CAN bus rates.
1.4.2 SLOPE-CONTROL
Slope-C ontrol mode further red uces EMI by limiting the
rise and fall times of CANH and CANL. The slope, or
slew rate (SR), is controlled by connecting an external
resistor (REXT) between RS and VOL (usually ground).
The slope is proportional to th e current outpu t at the RS
pin. Since the current is primarily determined by the
slope-c ontrol resis tance va lue REXT, a ce rtain sle w rate
is achieved by applying a specific resistance.
Figure 1-1 illustrates typical slew rate values as a
function of the slope-control resistance value.
1.4.3 STANDBY MODE
The device may be placed in Standby or SLEEP mode
by applyi ng a high-leve l to the RS pin. In SL EEP mode,
the transmitter is switched off and the receiver operates
at a lower current. The receive pin on the controller side
(RXD) is still functional, but will operate at a slower
rate. The att ach ed microcont roller can mo nitor RXD for
CAN bus activity and place the transceiver into normal
operation via the RS pin (at higher bus rates, the first
CAN message ma y be lost).
MCP2551
DS20001667G-page 4 2001-2016 Microchip Technology Inc.
TABLE 1-1: MODES OF OPERATION
TABLE 1-2: TRANSCEIVER TRUTH TABLE
FIGURE 1-1: SLEW RATE VS. SLOPE-CONTROL RESISTANCE VALUE
Mode Current at Rs Pin Resulting Voltage at RS Pin
Standby -IRS < 10 µA VRS > 0.75 VDD
Slope-Control 10 µA < -IRS < 200 µA 0.4 VDD < VRS < 0.6 VDD
High-Speed -IRS < 610 µA 0 < VRS < 0.3VDD
VDD VRS TXD CANH CANL Bus State( 1)RXD( 1)
4.5V VDD 5.5V VRS < 0.75 VDD 0HIGH LOW Dominant 0
1 or floating Not Driven Not Driven Recessive 1
VRS > 0.75 VDD XNot Driven Not Driven Recessive 1
VPOR < VDD < 4.5V
(See Note 3)VRS < 0.75 VDD 0HIGH LOW Dominant 0
1 or floating Not Driven Not Driven Recessive 1
VRS > 0.75 VDD XNot Driven Not Driven Recessive 1
0 < VDD < VPOR X X Not Driven/
No Load Not Driven/
No Load High Impedance X
Note 1: If another bus node is transmitting a Dominant bit on the CAN bus, then RXD is a logic ‘0’.
2: X = “don’t care”.
3: Device drivers will function, although outputs are not ensured to meet the ISO-11898 specification.
0
5
10
15
20
25
10 20 30 40 49 60 70 76 90 100 110 120
Resistance (k)
Slew Rate V/μs
2001-2016 Microchip Technology Inc. DS20001667G-page 5
MCP2551
1.5 TXD Permanent Dominant
Detection
If the MCP2551 detects an extended Low state on the
TXD input, it will disable the CANH and CANL output
drivers in orde r to prevent th e c orrup tio n o f data on th e
CAN bus. The drivers are disabled if TXD is Low for
more than 1.25 ms (minimum). This implies a
maximum bit time of 62.5 µs (16 kb/s bus rate),
allowing up to 20 consecutive transmitted Dominant
bits during a m ultiple bit e rror and error f rame scenari o.
The drivers remain disabled as long as TXD remains
Low. A rising edge on TXD will res et the tim er logic an d
enable the C AN H and CANL outp ut driv ers .
1.6 Power-on Reset
When the device is powered on, CANH and CANL
remain in a hig h-impedance state u ntil VDD reaches th e
voltage level VPORH. In addition, CANH and CANL will
remain in a high-impedance state if TXD is Low when
VDD reaches VPORH. CANH and CANL will become
activ e on ly a fter TXD i s as ser ted Hig h. O nce powe red
on, CA NH and CANL will e nter a high-imp edanc e st ate
if the voltage level at VDD falls below VPORL, providing
voltage brown-out protection during normal operation.
1.7 Pin Descriptions
The 8-pin pinout is listed in Table 1-3.
TABLE 1-3: MCP2551 PINOUT
1.7.1 TRANSMITTER DATA INPUT (TXD)
TXD is a TTL-comp atible in put pin . The dat a on this pin
is driven out on the CANH and CANL differential output
pins. It is usually connected to the transmitter data
output of the CAN controller device. When TXD is low,
CANH and CANL are in the Dominant state. When TXD
is high, CANH and CANL are in the Recessive state,
provi ded th at ano ther C AN no de is no t d riving the CA N
bus w ith a D omi nan t s t ate . TXD has a n i ntern al pu ll-up
resistor (nominal 25 k to VDD).
1.7.2 GROUND SUPPLY (VSS)
Ground sup ply pin.
1.7.3 SUPPLY VOLTAGE (VDD)
Positive supply voltage pin.
1.7. 4 RECEIVER DATA OUTPUT (RXD)
RXD i s a C MOS-com patibl e outpu t th at dri ves hi gh or
low depending on the differential signals on the CANH
and CANL pins and is usua lly connected to the receiver
data input of the CAN controller device. RXD is High
when the CAN bus is Recessive and Low in the
Dominant state.
1.7. 5 REFERENCE VOLTAGE (VREF)
Reference Volta ge Output (defined as VDD/2).
1.7.6 CAN LOW (CANL)
The CANL output drives the low side of the CAN
differential bus. This pin is also tied internally to the
receive input comparator.
1.7.7 CAN HIGH (CANH)
The CANH output drives the high side of the CAN
differential bus. This pin is also tied internally to the
receive input comparator.
1.7.8 SLOPE RESISTOR INPUT (RS)
The RS pin is used to s elect High- S peed, Slo pe-Control
or Standby modes via an external biasing resistor.
Pin
Number Pin
Name Pin Function
1TXD Transm it Data Input
2 VSS Ground
3 VDD Supply Voltage
4RXD Receive Data Output
5 VREF Reference Output Vol t ag e
6CANL CAN Low-Level Voltage I/O
7CANH CAN High-Level Voltage I/ O
8 RSSlope-Control Input
MCP2551
DS20001667G-page 6 2001-2016 Microchip Technology Inc.
NOTES:
2001-2016 Microchip Technology Inc. DS20001667G-page 7
MCP2551
2.0 ELECTRICAL
CHARACTERISTICS
2.1 Terms and Definitions
A number of terms are defined in ISO-11898 that are
used to d escri be the e lectri cal ch aracteris tics o f a CAN
transceiver device. These terms and definitions are
summarized in this section.
2.1.1 BUS VOLTAGE
VCANL and VCANH denote the voltages of the bus line
wires CANL and CANH relative to ground of each
individual CAN node.
2.1.2 COMMON MO DE BUS VOLTAGE
RANGE
Boundary voltage levels of VCANL and VCANH with
respect to ground, for wh ich proper operation will occur ,
if up to the maximum number of CAN nodes are
connec ted to the bus.
2.1.3 DIFFERENTIAL INTERNAL
CAPACITANCE, CDIFF
(OF A CAN NODE)
Capacitance seen between CANL and CANH during
the Recessive state when the CAN node is
disconnected from the bus (see Figure 2-1).
2.1.4 DIFFERENTIAL INTERNAL
RESISTANCE, RDIFF
(OF A CAN NODE)
Resis ta nce see n betwe en CANL an d CANH du ring the
Recessive state when the CAN node is disconnected
from the bus (see Figure 2-1).
2.1.5 DIFFERENTIAL VOLTAGE, VDIFF
(OF CAN BU S)
Differential voltage of the two-wire CAN bus, value
VDIFF = VCANH – VCANL.
2.1.6 INTERNAL CAPACITANCE, CIN
(OF A CAN NODE)
Capacitance seen between CANL (or CANH) and
groun d during the Reces sive st ate wh en the CA N node
is disconnected from the bus (see Figure 2-1).
2.1.7 INTERNAL RESISTANCE, RIN
(OF A CAN NODE)
Resistance seen between CANL (or CANH) and
groun d during the Reces sive st ate wh en the CA N node
is disconnected from the bus (see Figure 2-1).
FIGURE 2-1: PHYSICAL LAYER
DEFINITIONS
RIN
RIN RDIFF
CIN CIN
CDIFF
CANL
CANH
GROUND
ECU
MCP2551
DS20001667G-page 8 2001-2016 Microchip Technology Inc.
Absolute Maximum Ratings†
VDD.............................................................................................................................................................................7.0V
DC Voltage at TXD, RXD, VREF and VS............................................................................................ -0.3V to VDD + 0.3V
DC Voltage at CANH, CANL (Note 1)..........................................................................................................-42V to +42V
Transient Voltage on Pins 6 and 7 (Note 2).............................................................................................-250V to +250V
Storage temperature ...............................................................................................................................-55°C to +150°C
Operati ng amb ie nt temp era ture........................... ..... ...... ...... ..... ................................................. ............-40°C to +125°C
Virtual Junction Temperature, TVJ (Note 3).............................................................................................-40°C to +150°C
Soldering temperature of leads (10 seconds) .......................................................................................................+300°C
ESD protection on CANH and CANL pins (Note 4) ...................................................................................................6 kV
ESD protection on all other pins (Note 4) ..................................................................................................................4 kV
Note 1:Short-circuit applied when TXD is High and Low.
2: In accordance with ISO-7637.
3: In accordance with IEC 60747-1.
4: Classification A: Human Body Model.
† NOTICE: Stresses above those listed under “Maximum ratings” may cause permanent damage to the device. This
is a s tres s rati ng o nl y a nd fun cti ona l operatio n o f th e d ev ic e a t tho se or any other co ndi tio ns ab ove th os e i ndi cated in
the operati onal listings of this specificat ion is not implied. Exposure to maximum rating conditions for extend ed periods
may affect device reliabi lity.
2001-2016 Microchip Technology Inc. DS20001667G-page 9
MCP2551
2.2 DC Characteristics
DC Specifications Elect ri cal Char ac ter is tics :
Industrial (I): TAMB = -40°C to +85°C VDD = 4.5V to 5.5V
Extended (E): TAMB = -40°C to +125°C VDD = 4.5V to 5.5V
Param
No. Sym Characteristic Min Max Units Conditions
Supply
D1
IDD Supply Current
—75 mA Dominant; VTXD = 0.8V; VDD
D2 —10 mA Recessive; VTXD = +2V;
RS = 47 kW
D3 —365 µA -40°C TAMB +85°C, S tandby;
(Note 2)
—465 µA -40°C TAMB +125°C,
Standby; (Note 2)
D4 VPORH High-level of the Power-o n
Reset comparator 3.8 4.3 VCANH, CANL output s are active
when VDD > VPORH
D5 VPORL Low-level of the Power-on
Reset comparator 3.4 4.0 VCANH, CANL outputs are not
active when VDD < VPORL
D6 VPORD Hysteresis of Power-on
Reset comparator 0.3 0.8 VNote 1
Bus Line (CANH; CANL) Transmitter
D7 VCANH(r);
VCANL(r)
CANH, CANL Recessive
bus voltage 2.0 3.0 V VTXD = VDD; no load.
D8 IO(CANH)(reces)
IO(CANL)(reces) Recessive output current -2 +2 mA -2V < V(CAHL,CANH) < +7V,
0V <VDD < 5.5V
D9 -10 +10 mA -5V < V(CANL,CANH) < +40V,
0V <VDD < 5.5V
D10 VO(CANH)CANH Domin a n t
output voltage 2.75 4.5 V VTXD = 0.8V
D11 VO(CANL)CANL Dominant
output voltage 0.5 2.25 V VTXD = 0.8V
D12 VDIFF(r)(o) Recessive differential
output voltage -500 +50 mV VTXD = 2V; no load
D13 VDIFF(d)(o) Dominant differential
output voltage 1.5 3.0 VVTXD = 0.8V; VDD = 5V
40W < RL < 60W (Note 2)
D14 IO(SC)(CANH)CANH short-circuit
output cur rent
—-200 mA VCANH = -5V
D15 —-100
(typical) mA VCANH = -40V, +40V. (Note 1)
D16 IO(SC)(CANL)l CANL short-circuit
output cur rent —200 mA VCANL = -40V, +40V. (Note 1)
D17 VDIFF(r)(i) Rec essi v e differential
input voltage
-1.0 +0.5 V-2V < V(CANL, CANH) < +7V
(Note 3)
-1.0 +0.4 V-12V < V(CANL, CANH) < +12V
(Note 3)
Note 1: This parameter is periodically sampled and not 100% tested.
2: ITXD = IRXD = IVREF = 0 mA; 0V < VCANL < VDD; 0V < VCANH < VDD; VRS = VDD.
3: This is valid for the receiver in all modes; High-speed, Slope-control and Standby.
MCP2551
DS20001667G-page 10 2001-2016 Microchip Technology Inc.
Bus Line (CANH; CANL) Receiver: [TXD = 2V; pins 6 and 7 externally driven]
D18 VDIFF(d)(i) Dominant differential
input voltage
0.9 5.0 V -2V < V(CANL, CANH) < +7V
(Note 3)
1.0 5.0 V -12V < V(CANL, CANH) < +12V
(Note 3)
D19 VDIFF(h)(i) Differential input hysteresis 100 200 mV See Figure 2-3 (Note 1)
D20 RIN CANH, CANL Common-
mode input resistance 550 kW
D21 RIN(d) Deviation between CANH
and CANL Common-mode
input resistance -3 +3 % VCANH = VCANL
Bus Line (CANH; CANL) Receiver: [TXD = 2V; pins 6 and 7 externally driven]
D22 RDIFF Differential input resistance 20 100 kW
D24 ILI CANH, CANL input leakage
current —150 µA VDD < VPOR;
VCANH = VCANL = +5V
Transmitter Data Input (TXD)
D25 VIH High-level input voltage 2.0 VDD VOutput Recess iv e
D26 VIL Low-level input voltage VSS +0.8 VOutput Do mi na nt
D27 IIH High-level input current -1 +1 µA VTXD = VDD
D28 IIL Low-level input current -100 -400 µA VTXD = 0V
Receiver Data Output (RXD)
D31 VOH High-level output voltage 0.7 VD
D— V IOH = 8 mA
D32 VOL Low-level output voltage —0.8 V IOL = 8 mA
Volta ge Re feren ce Output (VREF)
D33 VREF Reference output voltage 0.45 V
DD 0.55 VD
DV-50 µA < IVREF < 50 µA
Standby/Slope-Control (RS pin)
D34 VSTB Input voltage for standby
mode 0.75 V
DD — V
D35 ISLOPE Slope-cont rol mo de curre nt -10 -200 µA
D36 VSLOPE Slope-cont rol mo de vol t ag e 0.4 VD
D0.6 VDD V
Thermal Shutdown
D37 TJ(sd) Shutdown junction
temperature 155 180 oCNote 1
D38 TJ(h) Shutdown temperature
hysteresis 20 30 oC -12V < V(CANL, CANH) < +12V
(Note 3)
2.2 DC Characteristics (Continued)
DC Specifications (Continued) Electrical Ch arac ter is tics :
Industrial (I): TAMB = -40°C to +85°C VDD = 4.5V to 5.5V
Extended (E): TAMB = -40°C to +125°C VDD = 4.5V to 5.5V
Param
No. Sym Characteristic Min Max Units Conditions
Note 1: This parameter is periodically sampled and not 100% tested.
2: ITXD = IRXD = IVREF = 0 mA; 0V < VCANL < V DD; 0V < VCANH < VDD; VRS = VDD.
3: This is valid for the receiver in all modes; High-speed, Slope-control and Standby.
2001-2016 Microchip Technology Inc. DS20001667G-page 11
MCP2551
FIGURE 2-1: TEST CIRCUIT FOR ELECTRICAL CHARACTERISTICS
FIGURE 2-2: TEST CIRCUIT FOR AUTOMOTIVE TRANSIENTS
FIGURE 2-3: HYSTERES IS OF THE RECEIVE R
RS
Rext
GND
RXD
VREF
TXD
60 100 pF
30 pF
CANH
CANL
CAN
Transceiver
Note: RS may be connected to VDD or GND via a load resistor depending on desired
operating mode as describe d in Section 1.7.3 “Supply Voltage (VDD)”.
0.1µF
VDD
RS
Rext
GND
RXD
VREF
TXD
60
500 pF
500 pF
Note: RS may be connected to VDD or
GND via a load resistor depending
on desired operating mode as
described in Section 1.7.8 “Slope
Resistor Input (Rs)”.
CANH
CANL
CAN
Transceiver
Schaffner
Generator
The wave forms of the applied transients shall be in accordance with “ISO-7637, Part 1”, test pulses 1, 2, 3a and 3b.
VOH
VOL
0.5 0.9
hysteresis
D19
VDIFF (V)
RXD (receive data
output voltage) VDIFF (r)(i) VDIFF (d)(i)
MCP2551
DS20001667G-page 12 2001-2016 Microchip Technology Inc.
2.3 AC Characteristics
AC Specifications Electrical Character istics:
Industrial (I): TAMB = -40°C to +85°C VDD = 4.5V to 5.5V
Extended (E): TAMB = -40°C to +125°C VDD = 4.5V to 5.5V
Param
No. Sym Characteristic Min Max Units Conditions
1 tBIT Bit time 162.5 µs VRS = 0V
2 fBIT Bit frequency 16 1000 kHz VRS = 0V
3TtxL2bus(d) Delay TXD to bus active —70 ns -40°C TAMB +125°C,
VRS = 0V
4TtxH2bus(r) Delay TXD to bus inactive —125 ns -40°C TAMB +85°C,
VRS = 0V
—170 ns -40°C TAMB +125°C,
VRS = 0V
5TtxL2rx(d) Delay TXD to receive active —130 ns -40°C TAMB +125°C,
VRS = 0V
—250 ns -40°C TAMB +125°C,
RS = 47 k
6TtxH2rx(r) Delay TXD to receiver
inactive
—175 ns -40°C TAMB +85°C,
VRS = 0V
—225 ns -40°C TAMB +85°C,
RS = 47 k
—235 ns -40°C TAMB +125°C,
VRS = 0V
—400 ns -40°C TAMB +125°C,
RS = 47 k
7SR CANH, CANL slew rate 5.5 8.5 V/µs Refer to Figure 2-1;
RS = 47 kNote 1)
10 tWAKE Wake-up time from standby
(Rs pin) — 5 µs See Figure 2-5
11 TbusD2rx(s) Bus Dominant to RXD Low
(Standby mode) —550 ns VRS = +4V; (See Figure 2-6)
12 CIN(CANH)
CIN(CANL)CANH; CANL input
capacitance —20
(typical) pF 1 Mb/s data rate;
VTXD = VDD, (Note 1)
13 CDIFF Differential input
capacitance —10
(typical) pF 1 Mb/s data rate
(Note 1)
14 TtxL2busZ TX Permanent Dominant
Timer Disable Time 1.25 4ms
15 TtxR2pdt(res) TX Permanent Dominant
Timer Reset Tim e — 1 µs Rising edge on TXD while
device is in permanent
Dominant state
Note 1: This parameter is periodically sampled and not 100% tested.
2001-2016 Microchip Technology Inc. DS20001667G-page 13
MCP2551
2.4 Timing Diagrams and Specifications
FIGURE 2-4: TIMING DIAGRAM FOR AC CHARACTERISTICS
FIGURE 2-5: TIMING DIAGRAM FOR WAKE-UP FROM STANDBY
FIGURE 2-6: TIMING DIAGRAM FOR BUS DOMINANT TO RXD LOW (STANDBY MODE)
3
546
0.9V 0.5V
0V
VDD
TXD (transmit data
input voltage)
VDIFF (CANH,
CANL differential
voltage)
RXD (receive dat a
output voltage) 0.3 VDD 0.7 VDD
VTXD = 0.8V 10
0V
VDD
VRS Slope resistor
input voltage
VRXD Receive data
output voltage
0.6 VDD
0.3 VDD
VRS = 4V; VTXD = 2V
1.5V
0V
11
VDIFF, Differential
voltage
Receive data
output vol t ag e
0.9V
0.3 VDD
MCP2551
DS20001667G-page 14 2001-2016 Microchip Technology Inc.
NOTES:
2001-2016 Microchip Technology Inc. DS20001667G-page 15
MCP2551
3.0 PACKAGING INFORMATION
3.1 Package Marking Information
8-Lead PDIP (300 mil)
8-Lead SOIC (150 mil) Example:
NNN
MCP2551E
SN^^^1642
256
3
e
Example:
MCP2551
E/P^^^256
1642
3
e
Legend: XX...X Customer-specific information
Y Year code (last digit of calendar year)
YY Year code (last 2 digits of calendar year)
WW Week code (week of January 1 is week ‘01’)
NNN Alphanumeric traceability code
Pb-free JEDEC® designator for Matte Tin (Sn)
*This package is Pb-free. The Pb-free JEDEC designator ( )
can be found on the outer packaging for this package.
Note: In the eve nt the ful l Micro chip p art num ber can not be ma rked on o ne line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
3
e
3
e
MCP2551
DS20001667G-page 16 2001-2016 Microchip Technology Inc.
B
A
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Note:
Microchip Technology Drawing No. C04-018D Sheet 1 of 2
8-Lead Plastic Dual In-Line (P) - 300 mil Body [PDIP]
eB
E
A
A1
A2
L
8X b
8X b1
D
E1
c
C
PLANE
.010 C
12
N
NOTE 1
TOP VIEW
END VIEWSIDE VIEW
e
2001-2016 Microchip Technology Inc. DS20001667G-page 17
MCP2551
Microchip Technology Drawing No. C04-018D Sheet 2 of 2
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Note:
8-Lead Plastic Dual In-Line (P) - 300 mil Body [PDIP]
Units INCHES
Dimension Limits MIN NOM MAX
Number of Pins N 8
Pitch e.100 BSC
Top to Seating Plane A - - .210
Molded Package Thickness A2 .115 .130 .195
Base to Seating Plane A1 .015
Shoulder to Shoulder Width E .290 .310 .325
Molded Package Width E1 .240 .250 .280
Overall Length D .348 .365 .400
Tip to Seating Plane L .115 .130 .150
Lead Thickness c.008 .010 .015
Upper Lead Width b1 .040 .060 .070
Lower Lead Width b.014 .018 .022
Overall Row Spacing eB - - .430
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
3.
1.
protrusions shall not exceed .010" per side.
2.
4.
Notes:
§
--
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or
Pin 1 visual index feature may vary, but must be located within the hatched area.
§ Significant Characteristic
Dimensioning and tolerancing per ASME Y14.5M
e
DATUM A DATUM A
e
b
e
2
b
e
2
ALTERNATE LEAD DESIGN
(VENDOR DEPENDENT)
MCP2551
DS20001667G-page 18 2001-2016 Microchip Technology Inc.
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2001-2016 Microchip Technology Inc. DS20001667G-page 19
MCP2551
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
MCP2551
DS20001667G-page 20 2001-2016 Microchip Technology Inc.
!"#$%
& !"#$%&"'""($)%
*++&&&!!+$
2001-2016 Microchip Technology Inc. DS20001667G-page 21
MCP2551
APPENDIX A: REVISION HISTORY
Revision G (December 2016)
The following is the list of modifications:
• Added note to p age 1 head er: “Not recom mended
for new designs”.
• Updated Section 3.1 “Package Marking Infor-
mation”.
• Minor typographical corrections.
Revision F (July 2010)
The following is the list of modifications:
• Updates to the packaging diagrams.
Revision E (January 2007)
The following is the list of modifications:
• Updates to the packaging diagrams.
Revision A (June 2001)
• Original Release of th is Do cument.
MCP2551
DS20001667G-page 22 2001-2016 Microchip Technology Inc.
NOTES:
2001-2016 Microchip Technology Inc. DS20001667G-page 23
MCP2551
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO. -X /XX XXX
PatternPackageTemperature
Range
Device
D e vice: MCP2551: High-Speed CAN Transceiver
MCP2551T: High-Speed CAN Transceiver
(Tape and Reel)
Temperature
Range: I = -40°C to +85°C
E = -40°C to +125°C
Package: P = Plastic DIP (300 mil Body) 8-lead
SN = P lastic SOIC (150 mil Bo dy) 8-lead
Examples:
a) MCP2551-I/P: Industrial temperature,
PDIP package.
b) MCP2551-E/P : Ex tended temperat ure,
PDIP package.
c) MCP2551-I/ SN: Industrial temperature,
SOIC package.
d) MCP2551T-I/SN: Tape and Reel,
Industrial Tem perature,
SOIC package.
e) MCP2551T-E/SN: Tape and Reel,
Extended Temperature,
SOIC package.
f) MCP2551-E/SN: Extended Temperature,
SOIC package.
MCP2551
DS20001667G-page 24 2001-2016 Microchip Technology Inc.
NOTES:
2001-2016 Microchip Technology Inc. DS20001667G-page 25
Information contained in this publication regarding device
applications a nd the lik e is provid ed only for your c on ve nience
and may be supers ed ed by u pdates. It is y our responsibil i ty to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights unless otherwise stated.
Trademarks
The Microch ip name and logo, the Microchip logo, AnyRate, A V R,
AVR logo, AVR Freaks, BeaconThings, Bit Cloud, CryptoMemory,
CryptoRF, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KEELOQ,
KEELOQ logo, Kle e r, LANCheck, LI N K MD, m aX Stylus,
maXTouch, MediaLB, megaAVR, MOST, MOST logo, MPLAB,
OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, Prochip
Designer, QTouch, RightTouch, SAM-BA, SpyNIC, SST, SST
Logo, SuperFlash, tin yAVR, UNI/O , and XMEGA are registered
trademarks of Microchip Technology Inc orporated in the U.S.A.
and other c ountries.
ClockWorks, The Embedded Control Sol utions Company,
EtherSynch, Hyper Spe ed Control, HyperLight Load, IntelliMOS,
mTouch, Precision Edge, and Quiet-Wire are regist ered
trademarks of Microchip Technology Inc orporated in the U.S.A.
Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any
Capacitor, AnyIn, AnyOut, BodyCo m, chipK IT, chipKI T logo,
CodeGuard, CryptoAuthentication, CryptoCompanion,
CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average
Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial
Progra mming, ICSP, Inter-Chip Connectivity, JitterBlocker,
KleerNe t, KleerNet logo, Mindi, MiWi, motorBench, MPASM, MPF,
MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach,
Omniscient Code Generation, PICDEM, PICDEM. net, PICkit,
PICtail, PureSilicon, QMatrix, RightTouch logo, REAL ICE, Ripple
Blocker, SAM- IC E, Serial Quad I/O, SMART-I.S., SQI,
SuperSwitcher, Su perSwitcher II, Total Endurance, TSHARC,
USBCheck, V ariSense, ViewS pan, WiperLock, Wireless DNA, and
ZENA are trademarks of Microchip T echnology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated in
the U.S.A.
Silicon S tor age Technology is a regis tered tradema rk of Microchip
Technology Inc. in other countries.
GestIC i s a registered trademark of Microchip Technol ogy
Germany II GmbH & Co. KG, a subsidiary of Microchip T echnology
Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2001-2016, Microchip Technology Incorpo rated, All Rights
Reserved.
ISBN: 978-1-5224-1198-7
Note the following details of the code protection feature on Microchip devices:
• Microchip products meet the specification contained in their particular Microchip Data Sheet.
• Microchip believes that i t s family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
• The re are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
• Microchip is willing to work with the customer who is concerned about the integrity of their code.
• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is c onstantly evolving. We a t Microc hip are co m mitted to continuously improving the code prot ect ion featur es of our
products. Attempts to break Microchip’ s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Microch ip rece ived IS O/T S-16 94 9:20 09 certificat ion for i ts worldwid e
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPI C® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperiph erals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
QUALITY MANAGEMENT S
YSTEM
CERTIFIED BY DNV
== ISO/TS 16949 ==
DS20001667G-page 26 2001-2016 Microchip Technology Inc.
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