LT1997-2 Precision, Wide Voltage Range, Gain Selectable Funnel Amplifier DESCRIPTION FEATURES Precision Attenuation: Gain = 0.1, 0.2, 0.25 nn 255V Common Mode Voltage Range nn 105dB Minimum CMRR (Gain = 0.1) nn 0.006% (60ppm) Maximum Gain Error nn 1ppm/C Maximum Gain Error Drift nn 2ppm Maximum Gain Nonlinearity nn Wide Supply Voltage Range: 3.3V to 50V nn Rail-to-Rail Output nn 350A Supply Current nn 80V Maximum Op Amp Offset Voltage nn 1MHz -3dB Bandwidth (Gain = 0.1) nn Low Power Shutdown: 20A nn Space-Saving MSOP and DFN Packages The LT(R)1997-2 is an attenuating (funnel) difference amplifier that can be used to translate large differential signals to the low voltage range compatible with ADCs. It combines a precision operational amplifier with highly-matched resistors to form a one-chip solution to attenuate and level shift voltages accurately using no external components. It comes with three standard pin-selectable gain options (0.1, 0.2 and 0.25), which can be further combined to form gains from 0.0455 to 0.55 (attenuations of 1.82 to 22) with accuracy of 0.006% (60ppm). The LT1997-2 also works across a very wide input common-mode voltage range (255V), enabling robust operation in demanding industrial environments. Its excellent resistor matching results in a common mode rejection ratio of greater than 105dB. nn APPLICATIONS The resistors maintain their excellent matching over temperature; the matching temperature coefficient is guaranteed less than 1ppm/C. The resistors are extremely linear with voltage, resulting in a gain nonlinearity of less than 2ppm. High Voltage to Low Voltage Level Translation nn ADC Driver nn Bidirectional Wide Common Mode Range Voltage and Current Sensing nn Industrial Data-Acquisition Front-Ends nn Replacement for Isolation Circuits nn Differential to Single-Ended Conversion nn The LT1997-2 is fully specified at 5V and 15V supplies and from -40C to 125C. The device is available in space saving 16-lead MSOP and 4mm x 4mm DFN14 packages. All registered trademarks and trademarks are the property of their respective owners. TYPICAL APPLICATION Interfacing a 20VP-P Ground-Referenced Input Signal to a 5V ADC +10V -10V LT1997-2 Driving LTC2364-16, ADC, fIN = 1kHz, 32768-Point FFT 5V 0 V+ LT1997-2 -INA -INB -INC 25k 4.5V - OUT + 250k 125k 50k 100k +INA +INB +INC 50k SHDN V- 0.5V 200 IN+ 2.5V 1.8V TO 5V VDD 0VDD LTC2364-16 8nF REF2 IN- REF REF1 5V 5.5V TO 40V IN OUT LT6657-5 GND AMPLITUDE (dBFS) 100k 125k 250k VS = 5V VOUT = 4VP-P HD2 = -104.3dBc HD3 = -104.4dBc SFDR = 104.3dB THD = -101dB SNR = 91.8dB SINAD = 89.5dB -20 -40 -60 -80 -100 -120 -140 47F 0 25 50 75 FREQUENCY (kHz) 100 125 19972 TA01b GND 19972 TA01a Rev 0 Document Feedback For more information www.analog.com 1 LT1997-2 ABSOLUTE MAXIMUM RATINGS (Note 1) Supply Voltages (V+ to V-).........................................60V +INA, -INA, +INB, -INB, +INC, -INC (Note 2)..........................................V- 270V REF, REF1, REF2..................... (V- + 60V) to (V- - 0.3V) SHDN...................................... (V+ + 0.3V) to (V- - 0.3V) Output Current (Continuous) (Note 6).....................50mA Output Short-Circuit Duration (Note 3)...........................................Thermally Limited Temperature Range (Notes 4, 5) LT1997I-2.................................................-40 to 85C LT1997H-2.............................................. -40 to 125C Maximum Junction Temperature........................... 150C Storage Temperature Range.......................-65 to 150C MSOP Lead Temperature (Soldering, 10 sec)......... 300C PIN CONFIGURATION TOP VIEW +INA 1 +INB 3 TOP VIEW 14 -INA 15 V- +INA 1 16 -INA 12 -INB +INB 3 14 -INB 11 NC +INC REF1 REF2 V- NC 4 +INC 5 SHDN 6 10 -INC 9 V+ REF 7 8 5 6 7 8 12 11 10 9 -INC V+ SHDN OUT MS PACKAGE VARIATION: MS16 (12) 16-LEAD PLASTIC MSOP OUT TJMAX = 150C, JA = 130C/W DF PACKAGE 14(12)-LEAD (4mm x 4mm) PLASTIC DFN TJMAX = 150C, JA = 45C/W , JC = 3C/W EXPOSED PAD (PIN 15) IS V-, MUST BE SOLDERED TO PCB ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION SPECIFIED TEMPERATURE RANGE LT1997IDF-2#PBF LT1997IDF-2#TRPBF 19972 14-Lead (4mm x 4mm) Plastic DFN -40C to 85C LT1997HDF-2#PBF LT1997HDF-2#TRPBF 19972 14-Lead (4mm x 4mm) Plastic DFN -40C to 125C LT1997IMS-2#PBF LT1997IMS-2#TRPBF 19972 16-Lead Plastic MSOP -40C to 85C LT1997HMS-2#PBF LT1997HMS-2#TRPBF 19972 16-Lead Plastic MSOP -40C to 125C *The temperature grade is identified by a label on the shipping container. Consult ADI Marketing for parts specified with wider operating temperature ranges. Parts ending with PBF are RoHS and WEEE compliant. Tape and reel specifications. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix. Rev 0 2 For more information www.analog.com LT1997-2 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, -40C < TA < 85C for I-grade parts, -40C < TA < 125C for H-grade parts, otherwise specifications are at TA = 25C. Difference Amplifier Configuration, V+ = 15V, V- = -15V, VCM = VOUT = VREF = VREF1 = VREF2 = 0V. VCMOP is the common mode voltage of the internal op amp. SYMBOL PARAMETER CONDITIONS G Gain Error G/T Gain Drift vs Temperature (Note 6) VOUT = 2.8V G = 0.1 VOUT = 5.6V G = 0.2 VOUT = 7V G = 0.25 VOUT = 7V GNL Gain Nonlinearity VOUT = 7V MIN TYP MAX UNITS 0.001 0.006 0.008 0.006 0.008 0.006 0.008 1 % % % % % % ppm/C l 0.001 l 0.001 l 0.2 l 1 l VOS Op Amp Offset Voltage (Note 9) V- < VCMOP < V+ - 1.75V 20 l VOS/T Op Amp Offset Voltage Drift (Note 6) V- < VCMOP < V+ - 1.75V IB Op Amp Input Bias Current V- + 0.25V < VCMOP < V+ - 1.75V RIN CMRR Op Amp Input Offset Current l Input Impedance (Note 8) l l l 115 63 52 137.5 75 62.5 160 87 73 k k k l l l 420 210 168 105 103 101 99 101 98 103 101 103 101 99 97 99 97 99 97 99 97 -255 -140 -115 500 250 200 120 580 290 232 k k k dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB V V V Common Mode Rejection Ratio, Referred to Output, MS16 Package V- + 0.25V < VCMOP < V+ - 1.75V Common Mode G = 0.1 G = 0.2 G = 0.25 Differential G = 0.1 G = 0.2 G = 0.25 G = 0.1, VCM = 28V l G = 0.2, VCM = 28V l G = 0.25, VCM = 28V l CMRR Common Mode Rejection Ratio, Referred to Output, DF14 Package G = 0.1, VCM = 28V l G = 0.1, VCM = 255V, VS = 25V l G = 0.2, VCM = 28V l G = 0.2, VCM = 140V, VS = 25V l G = 0.25, VCM = 28V l G = 0.25, VCM = 115V, VS = 25V l VCM Input Voltage Range (Note 7) +INA/-INA +INB/-INB +INC/-INC l l l 2 ppm ppm V V V/C -5 -15 -3 -10 l IOS 0.5 l 2 3 80 200 1.5 0.5 5 15 3 10 nA nA nA nA 118 118 118 118 116 116 116 116 255 140 115 Rev 0 For more information www.analog.com 3 LT1997-2 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, -40C < TA < 85C for I-grade parts, -40C < TA < 125C for H-grade parts, otherwise specifications are at TA = 25C. Difference Amplifier Configuration, V+ = 15V, V- = -15V, VCM = VOUT = VREF = VREF1 = VREF2 = 0V. VCMOP is the common mode voltage of the internal op amp. SYMBOL PARAMETER CONDITIONS R/R Available in MS16 Package Only Reference Divider Matching Error R R -R = REF1 REF2 R RREF1 + RREF2 2 Power Supply Rejection Ratio (Note 9) VS = 1.65V to 25V, VCM = VOUT = Mid-Supply eni Output Noise Voltage Density f = 1kHz G = 0.1 G = 0.2 G = 0.25 f = 0.1Hz to 10Hz G = 0.1 G = 0.2 G = 0.25 No Load ISINK = 5mA No Load ISOURCE = 5mA 50 to V+ 50 to V- VOUT = 7V VOL ISC Output Voltage Swing Low (Referred to V-) Output Voltage Swing High (Referred to V+) Short-Circuit Output Current SR Slew Rate BW Small Signal -3dB Bandwidth tS Settling Time VOH VS TYP MAX 0.002 0.009 0.011 l PSRR Output Noise Voltage MIN l 114 l l l l l l l 10 10 0.45 G = 0.1 G = 0.2 G = 0.25 G = 0.1 0.1%, VOUT = 10V 0.01%, VOUT = 10V G = 0.2 0.1%, VOUT = 10V 0.01%, VOUT = 10V G = 0.25 0.1%, VOUT = 10V 0.01%, VOUT = 10V Supply Voltage l tON Turn-On Time VIL SHDN Input Logic Low (Referred to V+) l VIH SHDN Input Logic High (Referred to V+) l ISHDN SHDN Pin Current l IS Supply Current dB 37 39 40 nV/Hz nV/Hz nV/Hz 0.9 0.95 1 50 280 50 450 30 32 0.75 150 500 150 900 VP-P VP-P VP-P mV mV mV mV mA mA V/s 1 1.2 1.1 MHz MHz MHz 15 19 s s 16.9 20.6 s s 17.1 20.9 s s V V s 3 3.3 50 50 -2.5 -1.2 V V -10 -15 A 350 400 600 25 70 A A A A l 20 l % % 124 16 Active, VSHDN V+ - 1.2V Active, VSHDN V+ - 1.2V Shutdown, VSHDN V+ - 2.5V Shutdown, VSHDN V+ - 2.5V UNITS Rev 0 4 For more information www.analog.com LT1997-2 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, -40C < TA < 85C for I-grade parts, -40C < TA < 125C for H-grade parts, otherwise specifications are at TA = 25C. Difference Amplifier Configuration, V+ = 5V, V- = 0V, VCM = VOUT = VREF = VREF1 = VREF2 = Mid-Supply. VCMOP is the common mode voltage of the internal op amp. SYMBOL PARAMETER CONDITIONS G VOUT = 1V to 4V G = 0.1 Gain Error MIN TYP 0.001 l 0.001 G = 0.2 l 0.001 G = 0.25 l G/T Gain Drift vs Temperature (Note 6) VOUT = 1V to 4V GNL Gain Nonlinearity VOUT = 1V to 4V Op Amp Offset Voltage (Note 9) V- < V VOS CMOP 0.2 l 20 l Op Amp Offset Voltage Drift (Note 6) V- < VCMOP < V+ - 1.75V IB Op Amp Input Bias Current V- + 0.25V < VCMOP < V+ - 1.75V RIN CMRR Op Amp Input Offset Current 160 87 73 k k k l l l 420 210 168 104 102 100 98 100 98 102 100 98 96 98 96 500 250 200 120 580 290 232 k k k dB dB dB dB dB dB dB dB dB dB dB dB % % l G = 0.1, VCM = -25V to 10.75V l G = 0.2, VCM = -12.5V to 7V l G = 0.25, VCM = -10V to 6.25V l Reference Divider Matching Error R R -R = REF1 REF2 R RREF1 + RREF2 2 Available in MS16 Package Only PSRR Power Supply Rejection Ratio (Note 9) VS = 1.65V to 25V, VCM = VOUT = Mid-Supply eni Output Noise Voltage Density f = 1kHz G = 0.1 G = 0.2 G = 0.25 V V V/C 137.5 75 62.5 G = 0.25, VCM = -10V to 6.25V R/R 80 200 1.5 115 63 52 l 2 ppm l l l Input Impedance (Note 8) Common Mode Rejection Ratio, Referred to Output, DF14 Package % % % % % % ppm/C l l CMRR 0.006 0.008 0.006 0.008 0.006 0.008 1 -5 -15 -3 -10 V- + 0.25V < VCMOP < V+ - 1.75V Common Mode G = 0.1 G = 0.2 G = 0.25 Differential G = 0.1 G = 0.2 G = 0.25 Common Mode Rejection Ratio, Referred to G = 0.1, VCM = -25V to 10.75V Output, MS16 Package G = 0.2, VCM = -12.5V to 7V 0.5 l l IOS UNITS 1 < V+ - 1.75V VOS/T MAX 0.5 118 118 116 116 0.002 114 nA nA nA nA 118 l l 5 15 3 10 0.009 0.011 124 dB 37 39 40 nV/Hz nV/Hz nV/Hz Rev 0 For more information www.analog.com 5 LT1997-2 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, -40C < TA < 85C for I-grade parts, -40C < TA < 125C for H-grade parts, otherwise specifications are at TA = 25C. Difference Amplifier Configuration, V+ = 5V, V- = 0V, VCM = VOUT = VREF = VREF1 = VREF2 = Mid-Supply. VCMOP is the common mode voltage of the internal op amp. SYMBOL PARAMETER CONDITIONS MIN Output Noise Voltage VOL VOH ISC SR BW tS VS f = 0.1Hz to 10Hz G = 0.1 G = 0.2 G = 0.25 Output Voltage Swing Low (Referred to V-) No Load ISINK = 5mA Output Voltage Swing High (Referred to V+) No Load ISOURCE = 5mA Short-Circuit Output Current 50 to V+ 50 to V- Slew Rate VOUT = 3V Small signal -3dB Bandwidth G = 0.1 G = 0.2 G = 0.25 Settling Time G = 0.1 0.1%, VOUT = 2V 0.01%, VOUT = 2V G = 0.2 0.1%, VOUT = 2V 0.01%, VOUT = 2V G = 0.25 0.1%, VOUT = 2V 0.01%, VOUT = 2V Supply Voltage l l l l l l l l tON VIL VIH ISHDN IS Turn-On Time SHDN Input Logic Low (Referred to V+) SHDN Input Logic High (Referred to V+) SHDN Pin Current Supply Current 10 10 0.45 TYP 0.9 0.95 1 15 280 15 450 30 28 0.75 1 1.2 1.1 MAX 50 500 50 800 s s 8.8 13.1 s s 8.7 12.7 s s V V s V V A A A A A 3 3.3 50 50 22 l Active, VSHDN V+ - 1.2V Active, VSHDN V+ -1.2V Shutdown, VSHDN V+ - 2.5V Shutdown, VSHDN V+ - 2.5V -2.5 Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: See Common Mode Voltage Range in the Applications Information section of this data sheet for other considerations when taking +INA/ -INA/+INB/-INB/+INC/-INC pins to 270V. Note 3: A heat sink may be required to keep the junction temperature below absolute maximum. This depends on the power supply, input voltages and the output current. Note 4: The LT1997I-2 is guaranteed functional over the operating temperature range of -40C to 85C. The LT1997H-2 is guaranteed functional over the operating temperature range of -40C to 125C. Note 5: The LT1997I-2 is guaranteed to meet specified performance from -40C to 85C. The LT1997H-2 is guaranteed to meet specified performance from -40C to 125C. -1.2 -10 330 l 15 l VP-P VP-P VP-P mV mV mV mV mA mA V/s MHz MHz MHz 7.5 11.7 l l UNITS -15 370 525 20 40 Note 6: This parameter is not 100% tested. Note 7: The input voltage range is guaranteed by the 25V CMRR tests. The Input Voltage Range numbers specified in the table guarantee that the internal op amp operates in its normal operating region. The Input voltage range can be higher if the internal op amp operates in its Over-The-Top(R) operating region. See Common Mode Voltage Range in the Applications Information section to determine the valid input voltage range under various operating conditions. Note 8: Input impedance is tested by a combination of direct measurements and correlation to the CMRR and gain error tests. Note 9: Offset voltage, offset voltage drift and PSRR are defined as referred to the internal op amp. The following shows the calculation of output offset: In the case of balanced source resistance, VOS,OUT = (VOS * NOISEGAIN) + (IOS * 25k) + (IB * 25k * (1- RP/RN)) where RP and RN are the total resistance at the op amp positive and negative terminal, respectively. Rev 0 6 For more information www.analog.com LT1997-2 TYPICAL PERFORMANCE CHARACTERISTICS TA = 25C, VS = 15V, Difference Amplifier configuration, unless otherwise noted. Typical Distribution of CMRR, Referred to Output (G = 0.1) 693 UNITS FROM 2 RUNS DF14(12) 100 75 50 25 0 714 UNITS FROM 2 RUNS DF14(12) 125 NUMBER OF UNITS NUMBER OF UNITS 125 150 VS = 25V VCM = 255V Typical Distribution of CMRR, Referred to Output (G = 0.1) 75 50 25 -6 -5 -4 -3 -2 -1 0 1 2 3 CMRR (V/V = ppm) 4 5 0 6 -6 -5 -4 -3 -2 -1 0 1 2 3 CMRR (V/V = ppm) 4 5 75 50 150 125 25 714 UNITS FROM 2 RUNS DF14(12) 100 75 50 8 125 6 8 125 50 25 8 10 19972 G07 VS = 15V VCM = 28V 50 6 714 UNITS FROM 2 RUNS DF14(12) 10 19972 G06 150 VS = 15V VCM = 28V 100 75 50 0 -10 -8 -6 -4 -2 0 2 4 CMRR (V/V = ppm) 8 Typical Distribution of CMRR, Referred to Output (G = 0.25) 25 6 6 75 0 -10 -8 -6 -4 -2 0 2 4 CMRR (V/V = ppm) 10 125 NUMBER OF UNITS 150 NUMBER OF UNITS 75 715 UNITS FROM 2 RUNS MS16(12) 19972 G05 VS = 25V VCM = 115V 5 100 Typical Distribution of CMRR, Referred to Output (G = 0.25) 100 4 25 0 -10 -8 -6 -4 -2 0 2 4 CMRR (V/V = ppm) 10 Typical Distribution of CMRR, Referred to Output (G = 0.25) NUMBER OF UNITS 150 VS = 15V VCM = 28V 19972 G04 0 -10 -8 -6 -4 -2 0 2 4 CMRR (V/V = ppm) -6 -5 -4 -3 -2 -1 0 1 2 3 CMRR (V/V = ppm) Typical Distribution of CMRR, Referred to Output (G = 0.2) 25 693 UNITS FROM 2 RUNS 125 DF14(12) 50 19972 G03 NUMBER OF UNITS 100 6 75 Typical Distribution of CMRR, Referred to Output (G = 0.2) VS = 25V VCM = 140V 0 -10 -8 -6 -4 -2 0 2 4 CMRR (V/V = ppm) 100 0 6 19972 G02 NUMBER OF UNITS NUMBER OF UNITS 693 UNITS FROM 2 RUNS 125 DF14(12) VS = 15V VCM = 28V 25 Typical Distribution of CMRR, Referred to Output (G = 0.2) 150 715 UNITS FROM 2 RUNS MS16(12) 125 100 19972 G01 150 150 VS = 15V VCM = 28V NUMBER OF UNITS 150 Typical Distribution of CMRR, Referred to Output (G = 0.1) 715 UNITS FROM 2 RUNS MS16(12) VS = 15V VCM = 28V 100 75 50 25 6 8 10 19972 G08 0 -10 -8 -6 -4 -2 0 2 4 CMRR (V/V = ppm) 6 8 10 19972 G09 Rev 0 For more information www.analog.com 7 LT1997-2 TYPICAL PERFORMANCE CHARACTERISTICS TA = 25C, VS = 15V, Difference Amplifier configuration, unless otherwise noted. Typical Distribution of Gain Error (G = 0.2) Typical Distribution of Gain Error (G = 0.1) 200 VS = 15V VOUT = 2.8V 1459 UNITS 175 FROM 4 RUNS BOTH PACKAGES 150 NUMBER OF UNITS NUMBER OF UNITS 1459 UNITS FROM 4 RUNS 250 BOTH PACKAGES 200 150 100 250 1459 UNITS 225 FROM 4 RUNS BOTH PACKAGES 200 VS = 15V VOUT = 5.6V NUMBER OF UNITS 300 Typical Distribution of Gain Error (G = 0.25) 125 100 75 175 150 125 100 75 50 50 50 25 0 -60 -40 -20 0 20 GAIN ERROR (ppm) 40 25 0 -60 60 -40 19972 G10 0 -60 60 Typical Distribution of Op Amp Offset Voltage 500 450 400 150 150 125 100 75 125 100 75 50 50 0 -20 0 20 GAIN ERROR (ppm) 40 Typical Distribution of Op Amp PSRR 1459 UNITS FROM 4 RUNS BOTH PACKAGES VS = 1.65V to 25V 300 250 200 150 100 50 0 -60 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 GAIN NONLINEARITY (ppm) -40 -20 0 20 OFFSET VOLTAGE (V) 40 19972 G13 0 -1.5 60 -1 -0.5 0 0.5 PSRR (V/V) 19972 G14 1 1.5 19972 G15 Typical Gain Error for RL = 10k, (G = 0.25) (Curves Offset for Clarity) CMRR vs Frequency, Referred to Output 60 350 25 25 -40 19972 G12 1459 UNITS FROM 4 RUNS 175 BOTH PACKAGES NUMBER OF UNITS NUMBER OF UNITS 200 VS = 15V VOUT = 7V G = 0.25 175 0 40 19972 G11 Typical Distribution of Gain Nonlinearity 1459 UNITS 225 FROM 4 RUNS BOTH PACKAGES 200 -20 0 20 GAIN ERROR (ppm) NUMBER OF UNITS 250 VS = 15V VOUT = 7V Typical Gain Error for RL = 5k, (G = 0.25) (Curves Offset for Clarity) 80 60 40 G = 0.1 G = 0.2 G = 0.25 20 0 10 100 1k 10k 100k FREQUENCY (Hz) 1M 10M OUTPUT ERROR (2mV/DIV) 100 OUTPUT ERROR (2mV/DIV) COMMON-MODE REJECTION RATIO (dB) 120 VS = 18V VS = 15V VS = 12V VS = 10V VS = 15V VS = 12V VS = 10V -20 -16 -12 -8 -4 0 4 8 12 16 20 OUTPUT VOLTAGE (V) 19972 G17 19972 G16 VS = 18V -20 -16 -12 -8 -4 0 4 8 12 16 20 OUTPUT VOLTAGE (V) 19972 G18 Rev 0 8 For more information www.analog.com LT1997-2 TYPICAL PERFORMANCE CHARACTERISTICS TA = 25C, VS = 15V, Difference Amplifier configuration, unless otherwise noted. Typical Gain Error for Low Supply Voltages (G = 0.25) (Curves Offset for Clarity) Typical Gain Error for RL = 2k (G = 0.25) (Curves Offset for Clarity) Gain Error vs Temperature VS = 15V VS = 12V 80 VS = 5V, RL = 2k 40 60 GAIN ERROR (ppm) OUTPUT ERROR (2mV/DIV) VS = 18V VS = 5V, RL = 10k VS = 5V, RL = 1k VS = 2.5V, RL = 1k VS = 10V -20 -16 -12 -8 -4 0 4 8 12 16 20 OUTPUT VOLTAGE (V) -6 -5 -4 -3 -2 -1 0 1 2 3 OUTPUT VOLTAGE (V) 19972 G19 15 4 OUTPUT VOLTAGE (V) CMRR (V/V = ppm) 6 2 0 -2 -4 VS = 15V 10 UNITS G = 0.25 10 5 130C 85C 25C -45C 0 -5 -10 -20 -60 -6 -80 -8 -100 -75 -50 -25 0 -5 5 10 15 20 25 OUTPUT CURRENT (mA) -10 GAIN (dB) G = 0.1 -25 30 3 2 1 19972 G24 Frequency Response vs Capacitive Load (G = 0.2) 10 0 -5 -25 -35 -35 2 5 -20 -30 1 20pF 220pF 390pF 560pF -15 -30 0.01 0.1 FREQUENCY (MHz) DF14(12) JA = 45C/W 4 MS16(12) JA = 130C/W 0 -60 -40 -20 0 20 40 60 80 100 120 140 160 AMBIENT TEMPERATURE (C) GAIN (dB) G = 0.25 G = 0.2 -10 0 25 50 75 100 125 150 TEMPERATURE (C) 19972 G21 0 -5 GAIN (dB) -4 Frequency Response vs Capacitive Load (G = 0.1) 0 -40 0.001 -2 -40 19972 G23 Gain vs Frequency -20 0 5 19972 G22 -15 2 Maximum Power Dissipation vs Temperature -15 -10 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C) 4 -20 MAXIMUM POWER DISSIPATION (W) 20 8 -10 6 6 0 Output Voltage vs Load Current 10 -8 5 8 20 19972 G20 CMRR vs Temperature, Referred to Output -6 4 10 VS = 15V VOUT = 7V RL = 10k 10 UNITS G = 0.25 -40 0.001 20pF 220pF 390pF 560pF -10 -15 -20 -25 -30 -35 0.01 0.1 1 FREQUENCY (MHz) 19972 G25 10 19972 G26 -40 0.001 0.01 0.1 1 FREQUENCY (MHz) 10 19972 G27 Rev 0 For more information www.analog.com GAIN ERROR (m%) OUTPUT ERROR (2mV/DIV) 100 9 LT1997-2 TYPICAL PERFORMANCE CHARACTERISTICS TA = 25C, VS = 15V, Difference Amplifier configuration, unless otherwise noted. Frequency Response vs Capacitive Load (G = 0.25) -5 VOLTAGE NOISE DENSITY (nV/Hz) 0 GAIN (dB) 80 20pF 220pF 390pF 560pF 5 -10 -15 -20 -25 -30 -35 -40 0.001 0.01 0.1 1 FREQUENCY (MHz) 70 60 50 40 30 20 10 0 10 1 10 100 1k FREQUENCY (Hz) 19972 G28 80 60 40 20 100 1k 10k FREQUENCY (Hz) 19972 G30 G = 0.1 G = 0.2 G = 0.25 120 100 80 60 40 1.8 1.4 1.0 0.8 0.2 10 100 1k 10k FREQUENCY (Hz) 0 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C) 100k 19972 G33 Small-Signal Step Response Settling Time 4.0 140 G = 0.25 RL = 10k CL = 560pF G = 0.25 120 R =10k L 100 3.0 ERROR VOLTAGE (mV) VOLTAGE (mV) 40 20 -20 CL = 390pF -40 CL = 270pF -60 -100 0 5 10 15 20 25 TIME (s) 30 35 40 19972 G35 2 OUTPUT VOLTAGE 0 -2 1.5 -4 1.0 -6 0.5 -8 ERROR VOLTAGE -10 -0.5 -12 -1.0 -14 TIME (10s/DIV) 19972 G36 Rev 0 10 For more information www.analog.com 4 2.0 0 CL = 20pF -80 2.5 6 OUTPUT VOLTAGE (V) 60 0 G = 0.25 3.5 CL = 560pF 80 VOLTAGE (5V/DIV) FALLLING EDGE 0.6 19972 G32 Large-Signal Step Response 19972 G34 RISING EDGE 1.2 0.4 19972 G31 TIME (20s/DIV) RL = 10k 1.6 20 0 100k Slew Rate vs Temperature 2.0 SLEW RATE (V/s) 100 10 TIME (10s/DIV) 140 POWER SUPPLY REJECTION RATIO (dB) POWER SUPPLY REJECTION RATIO (dB) 120 0 100k Negative PSRR vs Frequency G = 0.1 G = 0.2 G = 0.25 140 10k 19972 G29 Positive PSRR vs Frequency 160 Output 0.1Hz to 10Hz Noise (G = 0.25) NOISE VOLTAGE (200nV/DIV) 10 Output Noise Density vs Frequency (G = 0.25) LT1997-2 TYPICAL PERFORMANCE CHARACTERISTICS TA = 25C, VS = 15V, Difference Amplifier configuration, unless otherwise noted. Op Amp Offset Voltage vs Temperature Settling Time 0.5 4 0 -0.5 -2 -1.0 -4 -1.5 -6 -2.0 -8 OUTPUT VOLTAGE -2.5 OUTPUT VOLTAGE (V) 0 -10 10 UNITS 20 UNITS 500 100 50 0 -50 -100 450 400 350 300 -3.0 -12 -150 250 -3.5 -14 -200 -60 -40 -20 0 20 40 60 80 100 120 140 TEMPERATURE (C) 200 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C) TIME (10s/DIV) 19972 G37 19972 G38 500 500 400 300 200 100 Shutdown Quiescent Current vs Supply Voltage 50 PARAMETRIC SWEEP IN ~25C TA = 150C INCREMENTS QUIESCENT CURRENT (A) 600 QUIESCENT CURRENT (A) 600 400 300 TA = -55C 200 100 150 155 160 165 TEMPERATURE (C) 170 0 0 10 20 30 40 SUPPLY VOLTAGE (V) 19972 G40 550 CHANGE IN OP AMP OFFSET VOLTAGE (V) 400 350 300 250 200 150 100 50 0 0 VSHDN = 0V 30 20 10 0 10 20 30 40 SUPPLY VOLTAGE (V) 50 19972 G42 Minimum Supply Voltage 150C 125C 85C 25C -40C -55C 450 25C -40C -55C 20 VS = 15V 500 40 0 50 150C 125C 85C 19972 G41 Quiescent Current vs SHDN Voltage QUIESCENT CURRENT (A) 0 145 19972 G39 Quiescent Current vs Supply Voltage Thermal Shutdown vs Hysteresis SUPPLY CURRENT (A) 550 150 2 ERROR VOLTAGE Quiescent Current vs Temperature 200 QUIESCENT CURRENT (A) G = 0.25 1.0 ERROR VOLTAGE (mV) 6 OP AMP OFFSET VOLTAGE (V) 1.5 5 10 SHDN VOLTAGE (V) 15 15 10 5 TA = 125C 0 -5 -10 TA = 25C -15 -20 0 19972 G43 TA = -45C 1 2 3 4 TOTAL SUPPLY VOLTAGE (V) 5 19972 G44 Rev 0 For more information www.analog.com 11 LT1997-2 PIN FUNCTIONS (DFN/MSOP) V+ (Pin 9/Pin 11): Positive Supply Pin. V- (EXPOSED PAD Pin 15/Pin 8): Negative Supply Pin. OUT (Pin 8/Pin 9): Output Pin. +INA (Pin 1/Pin 1): Noninverting Gain-of-0.1 Input Pin. Connects a 250k internal resistor to the internal op amp's noninverting input. +INB (Pin 3/Pin 3): Noninverting Gain-of-0.2 Input Pin. Connects a 125k internal resistor to the internal op amp's noninverting input. +INC (Pin 5/Pin 5): Noninverting Gain-of-0.25 Input Pin. Connects a 100k internal resistor to the internal op amp's noninverting input. -INA (Pin 14/Pin 16): Inverting Gain-of-0.1 input Pin. Connects a 250k internal resistor to the internal op amp's inverting input. -INC (Pin 10/Pin 12): Inverting Gain-of-0.25 input Pin. Connects a 100k internal resistor to the internal op amp's inverting input. REF (Pin 7/NA): Reference Input Pin. Sets the output level when the difference between the inputs is zero. REF1 (NA/Pin 6): Reference 1 Input Pin. With REF2, sets the output level when the difference between the inputs is zero. REF2 (NA/Pin 7): Reference 2 Input Pin. With REF1, sets the output level when the difference between the inputs is zero. SHDN (Pin 6/Pin 10): Shutdown Pin. Amplifier is active when this pin is tied to V+ or left floating. Pulling the pin more than 2.5V below V+ causes the amplifier to enter a low power state. -INB (Pin 12/Pin 14): Inverting Gain-of-0.2 input Pin. Connects a 125k internal resistor to the internal op amp's inverting input. BLOCK DIAGRAM DFN -INA -INB MSOP V+ -INC -INA -INB V+ -INC 100k 100k 25k 125k 25k 125k 250k 250k OUT OUT 250k 250k 25k 125k 100k 125k REF V+ 100k 10A +INA +INB +INC SHDN V+ 50k REF1 50k REF2 10A V- +INA 19972 BD02 +INB +INC SHDN V- 19972 BD01 Rev 0 12 For more information www.analog.com LT1997-2 APPLICATIONS INFORMATION V-IN is below V-, but the part will not be damaged as long as VCMOP is greater than V- - 25V and the junction temperature of the LT1997-2 does not exceed 150C. VS+ V+ -INA -INB -INC LT1997-2 100k 125k 25k 250k - 250k + OUT 125k 25k REF 100k +INA +INB +INC VOUT VREF V- SHDN 19972 F01 V+IN V S- Figure 1. Difference Amplifier with Dual-Supply Operation (Gain = 0.1) Introduction The LT1997-2 is a precision, high voltage funnel amplifier combined with a highly-matched resistor network. It can easily be configured into many different gain circuits without adding external components, as it will be shown in this data sheet. The LT1997-2 provides the resistors and op amp together in a small package in order to save board space and reduce complexity. Highly accurate measurement circuits can be easily constructed with the LT1997-2. The circuits can be tailored to specific measurement applications. Common Mode Voltage Range The voltage on LT1997-2's input pins should never be higher than V- + 270V or lower than V- - 270V under any circumstances. The common-mode voltage at the inputs of the internal op amp (VCMOP) is determined by the voltages on pins +INA, +INB, +INC and REF (see the Calculating Input Voltage Range section). This condition is true provided that the internal op amp's output is not clipped and feedback maintains the internal op amp's inputs at the same voltage. In addition to the limits mentioned above, the common mode input voltage of the amplifier should be chosen so that the input resistors do not dissipate too much power. The power dissipated in a 250k resistor must be less than 1.8W. It must be less than 0.9W for the 125k resistor and less than 0.72W for the 100k resistor. For most applications, the pin voltage limitations will be reached before the resistor power limitation is reached. Calculating Input Voltage Range Figure 2 shows the LT1997-2 in the generalized case of a difference amplifier, with the inputs shorted for the common mode calculation. The values of RF and RG are dictated by how the positive inputs (+INA, +INB, +INC) and REF pin are connected. By superposition we can write: The common mode voltage range of the LT1997-2 is set by the voltage range allowed on the LT1997-2's input pins and by the input voltage range of the internal op amp. The internal op amp of LT1997-2 has 2 operating regions: a) if the common-mode voltage at the inputs of the internal op amp (VCMOP) is between V- and V+ - 1.75V, the op amp operates in its normal region; b) If VCMOP is between V+ - 1.75V and V- + 76V, the op amp continues to operate, but in its Over-The-Top (OTT) region with degraded performance (see Over-The-Top Operation section of this data sheet for more detail). The LT1997-2 will not operate correctly if the commonmode voltage at the inputs of the internal op amp (VCMOP) VCMOP = VEXT * RF RF + R G + VREF * RG RF + R G Or, solving for VEXT: R R VEXT = VCMOP * 1+ G - VREF * G RF RF But valid VCMOP voltages are limited to VS+ - 1.75V (or VS- + 76V for OTT) on the high side and VS- on the low side, so: R R MAX VEXT = ( VS+ -1.75) * 1+ G - VREF * G RF RF Rev 0 For more information www.analog.com 13 LT1997-2 APPLICATIONS INFORMATION and: across the summing nodes of the internal op amp and boosts noise and offset while decreasing speed. Noise and offset will increase by 80%. The bandwidth will be reduced by 45%. For more detail on Over-The-Top operation, consult the LT6015 data sheet. R R MIN VEXT = ( VS - ) * 1+ G - VREF * G RF RF RF RG VEXT RG - VCMOP Difference Amplifiers VS+ VOUT + V S- 19972 F02 RF VREF Figure 2. Calculating the Common Mode Input Voltage Range Exceeding the MAX VEXT limit will cause the amplifier to transition into the Over-The-Top region. The maximum input voltage for the Over-The-Top region is: MAX VEXTOTT R R = ( VS - +76 ) * 1+ G - VREF * G RF RF The LT1997-2 is ideally suited to be used as a difference amplifier. Figure 3 shows the basic 4-resistor difference amplifier and the LT1997-2. A difference gain of 0.2 (attenuation = 5) is shown, but can be altered by additional dashed connections. By connecting the 100k resistors in parallel with the 25k feedback resistors, the gain is reduced to 0.16 (attenuation = 6.25). Of course there are many possible gains and Figure 4 shows circuit schematics of some of those difference amplifier gains. Note that the common mode voltage at the inputs of the internal op amp (VCMOP) is set by the voltages at pins +INA, +INB, +INC and REF. RF Keep in mind that the above MAX and MIN values for input voltage range should not exceed V- 270V, the ABSMAX voltage range specified earlier for LT1997-2's input pins. The negative inputs (-INA, -INB, -INC) are not limited by the internal op amp common mode range (VCMOP) because they do not affect it. They are limited by the output swing of the amplifier (and obviously by the allowed voltage range for the input pins). V-IN V+IN RG VOUT VOUT = GAIN * (V+IN - V-IN) GAIN = RF/RG RF DIFFERENCE AMPLIFIER CONFIGURATION VS+ V-IN -INA -INB -INC V+ LT1997-2 100k Over-The-Top Operation 125k When the input common mode voltage of the internal op amp (VCMOP) in the LT1997-2 is biased near or above the V+ supply, the op amp is operating in the Over-The-Top (OTT) region. The op amp continues to operate with an input common mode voltage of up to 76V above V- (regardless of the positive power supply voltage V+), but its performance is degraded. The op amp's input bias currents change from under 2nA to 14A. The op amp's input offset current rises to 50nA, which adds 1.25mV to the output offset voltage. In addition, when operating in the Over-The-Top region, the differential input impedance of the internal op amp decreases from 1M in normal operation to approximately 3.7k in Over-The-Top operation. This resistance appears 14 - + RG 25k 250k - + 250k 125k OUT 25k VOUT REF 100k +INA +INB +INC V+IN SHDN V- VS- 19972 F03 DIFFERENCE AMPLIFIER CONFIGURATION IMPLEMENTED WITH THE LT1997-2, RF = 25k, RG = 125k, GAIN = 0.2 ADDING THE DASHED CONNECTIONS CONNECT THE 100k RESISTOR IN PARALLEL WITH RF, SO RF IS REDUCED TO 20k. THE GAIN BECOMES 20k/125k = 0.16 Figure 3. The LT1997-2 Configured as a Difference Amplifier. Gain Is Set by Connecting the Correct Resistors or Combinations of Resistors. Gain of 0.2 (Attenuation = 5) Is Shown, with Dashed Lines Modifying It to a Gain of 0.16 (Attenuation = 6.25) For more information www.analog.com Rev 0 LT1997-2 APPLICATIONS INFORMATION VS+ V-IN -INA -INB -INC V+ VS+ V-IN LT1997-2 -INA -INB -INC 100k 25k 250k 125k OUT 25k VOUT 25k 125k REF V- +INA +INB +INC SHDN OUT 25k VOUT REF V- V+ -INA -INB -INC 100k 25k 250k V+ 125k OUT 25k VOUT -INA -INB -INC V- +INA +INB +INC SHDN - + OUT 25k VOUT 125k REF V+ -INA -INB -INC 100k 25k 250k V+ 125k OUT 25k VOUT -INA -INB -INC V- - + OUT 25k VOUT V+IN 125k REF V- VS+ -INA -INB -INC V+ V-IN LT1997-2 VS+ -INA -INB -INC 25k LT1997-2 125k 25k OUT 25k VOUT - + 250k 125k REF 100k OUT 25k VOUT REF 100k V- +INA +INB +INC SHDN V+IN V+ 250k - + 125k REF 100k 125k 250k VOUT GAIN = 0.409 100k 250k 25k VS- GAIN = 0.35 V-IN OUT V- +INA +INB +INC SHDN V+IN VS- GAIN = 0.3 - + 250k 100k +INA +INB +INC SHDN VS- 25k 250k 100k +INA +INB +INC SHDN LT1997-2 100k 125k REF V+ 125k 25k 250k 100k REF VS+ V-IN LT1997-2 125k 250k - + 250k VOUT VS- 100k 125k 25k GAIN = 0.25 VS+ V-IN LT1997-2 OUT V- +INA +INB +INC SHDN V+IN VS- GAIN = 0.227 VS+ V-IN V- +INA +INB +INC SHDN GAIN = 0.2 - + 250k 100k V+IN VS- 25k 250k 100k V+IN LT1997-2 100k 125k REF V+ 125k 25k 250k 100k REF VS+ V-IN LT1997-2 125k 250k - + 250k VOUT VS- 100k 125k 25k GAIN = 0.1 VS+ V-IN LT1997-2 OUT V- +INA +INB +INC SHDN V+IN GAIN = 0.083 VS+ V-IN - + 250k 125k VS- V+IN GAIN = 0.08 25k 100k +INA +INB +INC SHDN VS- LT1997-2 125k 100k V+IN V+ 250k - + 250k 100k V+IN -INA -INB -INC 100k 125k 250k - + 250k -INA -INB -INC VS+ V-IN LT1997-2 100k 125k -INA -INB -INC V+ VS- GAIN = 0.45 V- +INA +INB +INC SHDN VS- V+IN GAIN = 0.55 19972 F04 Figure 4. Many Difference Amplifier Gains Can Be Achieved by Strapping Pins Rev 0 For more information www.analog.com 15 LT1997-2 APPLICATIONS INFORMATION Difference Amplifier: Additional Gains Using CrossCoupling Table 1. Difference Amplifier Gains (Attenuations) Figure 5 shows the basic difference amplifier as well as the LT1997-2 with cross-coupled inputs. The additional dashed connections reduce the differential gain from 0.25 to 0.15. Using this method, additional gains are achievable and a few example schematics of the difference amplifiers using cross-coupling are shown in Figure 6. To summarize, Table 1 shows a complete list of all difference amplifier gains (attenuations) and how they are constructed using (both conventional or cross-coupling) pin strapping. Note that there are 38 unique gains ranging from 0.0455 to 0.55 (corresponding to attenuations from 1.8182 to 22) which can be achieved with the LT1997-2 using no external components. 0.0455 22 -INB, +INC +INB, -INC 0.05 20 -INB, +INC +INB, -INC 0.0556 18 -INB, +INC +INB, -INC 0.069 14.5 +INA -INA 0.08 12.5 +INA -INA +INC -INC 0.0833 12 +INA -INA +INB -INB 0.0952 RF V-IN V+IN - + RG RG VOUT RF VOUT = GAIN * (V+IN - V-IN) GAIN = RF/RG DIFFERENCE AMPLIFIER CONFIGURATION V-IN V+ LT1997-2 100k 125k 25k 250k - + 250k 125k OUT 25k VOUT V+IN SHDN V- 19972 F05 GAIN CAN BE ADJUSTED BY CROSS-COUPLING THE INPUTS. MAKING THE DASHED CONNECTIONS REDUCES THE GAIN FROM 0.25 TO 0.15 +INA -INA -INA +INA +INB, +INC -INB, -INC -INA -INA 0.1053 9.5 +INA -INA 0.125 8 +INA -INA -INB +INB 0.1333 7.5 +INA -INA -INC +INC +INB -INB 0.1481 6.75 -INB, +INC +INB, -INC +INB, -INC -INB, +INC +INA, +INC -INA, -INC 0.15 6.6667 0.16 6.25 +INB -INB 0.1739 5.75 +INB -INB 0.1818 5.5 +INB -INB 0.1875 5.3333 0.1923 5.2 +INC -INC 5 +INB -INB 0.2083 4.8 +INC -INC +INB -INB 0.2222 4.5 +INB -INB -INA +INA +INC -INC +INA -INA +INC -INC 0.2 4.4 -INA, +INC +INA, -INC -INA, +INC +INA, -INC +INA, +INB -INA, -INB +INC -INC -INA, +INC +INA, -INC +INA -INA -INB +INB +INA, +INB -INA, -INB 0.24 4.1667 0.25 4 +INC -INC 0.2667 3.75 +INB -INB -INC +INC 0.2778 3.6 +INC -INC -INA +INA +INB -INB 0.2917 3.4286 +INA, +INC -INA, -INC 0.3 3.3333 +INA, +INB -INA, -INB 0.3571 3.25 3.2 2.8571 2.8 +INB -INB +INC -INC -INA, -INC +INA, +INC -INB +INB +INA, +INC -INA, -INC +INC -INC -INA, -INB +INA, +INB 2.5 +INA, +INB -INA, -INB -INC +INC 2.4444 +INB, +INC -INB, -INC +INA -INA 0.4375 2.2857 +INA, +INC -INA, -INC -INB +INB 0.45 2.2222 +INB, +INC -INB, -INC 0.5 2 +INB, +INC -INB, -INC -INA +INA 0.55 1.8182 +INA, +INB, -INA, -INB, +INC -INC 0.4091 DIFFERENCE AMPLIFIER CONFIGURATION IMPLEMENTED WITH THE LT1997-2, RF = 25k, RG = 100k, GAIN = 0.25 OUT +INA 0.4 VS- GND (REF) +INA 0.35 +INA +INB +INC V-IN 10 0.3125 100k V+IN 10.5 0.3077 REF ATTENUATION 0.1 0.2273 VS+ -INA -INB -INC GAIN Figure 5. Cross-Coupling of the LT1997-2 Allows Additional Gains to Be Constructed Rev 0 16 For more information www.analog.com LT1997-2 APPLICATIONS INFORMATION V-IN V-IN VS+ V+ -INA -INB -INC LT1997-2 -INA -INB -INC 100k V+ VS+ LT1997-2 25k 250k 125k OUT 25k VOUT 25k 125k REF 125k OUT 25k VOUT V- 125k REF VS- V- +INA +INB +INC SHDN VS- V+IN OUT 25k VOUT REF 100k +INA +INB +INC SHDN GAIN = 0.0455 - + 250k 100k +INA +INB +INC SHDN 25k 250k - + 250k 100k LT1997-2 100k 125k 250k - + 250k V+ -INA -INB -INC 100k 125k V+IN V-IN VS+ VS- V+IN GAIN = 0.05 V- GAIN = 0.15 19972 F06 Figure 6. Examples of More Difference Amplifier Gains That Can Be Achieved VS+ V-IN -INA -INB -INC VS+ V-IN V+ -INA -INB -INC LT1997-2 125k 125k 25k - + 250k 125k 25k 250k OUT 50k REF1 50k REF2 100k +INA +INB +INC LT1997-2 100k 100k 250k V+ VOUT 125k VREF1 +INA +INB +INC 25k REF VOUT VREF SHDN V- V+IN VS- V+IN OUT 100k VREF2 SHDN V- - + 250k VS- LT1997-2 DFN 19972 F07 LT1997-2 MSOP Figure 7. The LT1997-2 Reference Resistors: Split Resistors in the MSOP Package, Single Resistor in the DFN Package Amplifiers for a Single-Ended Input Reference Resistors All of the difference amplifier configurations discussed in the preceding section can be used as noninverting or inverting amplifiers if the input is single-ended. For example, to achieve a positive attenuation for a single-ended input using the LT1997-2, simply ground V-IN and connect the input signal to V+IN. Similarly, to achieve a negative attenuation for a single-ended input using the LT1997-2 , simply ground V+IN and connect the input signal to V-IN. In the preceding discussions, the Reference resistor is shown as a single 25k resistor. This is true in the DFN package. In the MSOP package the reference resistor is split into two 50k resistors (Figure 7). Tying the REF1 and REF2 pins to the same voltage produces the same reference voltage as tying the VREF pin in the DFN package to that voltage. Connecting REF1 and REF2 to different voltages produces an effective reference voltage that is the average of VREF1 and VREF2. This feature is especially useful when the desired reference voltage is half way between the supRev 0 For more information www.analog.com 17 LT1997-2 APPLICATIONS INFORMATION plies. Tying REF1 to VS+ and REF2 to VS- produces the desired mid-supply voltage without the help of another external reference voltage (Figure 7). The ratio of RREF1 to RREF2 is very precise: R RREF1 - RREF2 = < 90ppm R R REF1 + RREF2 2 LT1997-2 with input common mode voltages that go from the normal to Over-The-Top operation will significantly degrade the LT1997-2's linearity as the op amp must transition between two different input stages. Driving resistive loads significantly smaller than the 25k internal feedback resistor will also degrade the amplifier's linearity performance. High Voltage Pin Spacing Shutdown The LT1997-2 has a shutdown pin (SHDN). Under normal operation this pin should be tied to V+ or allowed to float. Tying this pin 2.5V or more below V+ will cause the part to enter a low power state. The supply current is reduced to less than 25A and the op amp output becomes high impedance. The voltages at the input pins can still be present even in shutdown mode. Supply Voltage The positive supply pin of the LT1997-2 should be bypassed with a small capacitor (typically 0.1F) as close to the supply pins as possible. When driving heavy loads, an additional 4.7F electrolytic capacitor should be added. When using split supplies, the same is true for the V- supply pin. Output The output of the LT1997-2 can typically swing to within 50mV of either rail with no load and is capable of sourcing and sinking approximately 30mA at 25C. The LT1997-2 is internally compensated to drive at least 0.5nF of capacitance under any output loading conditions. For larger capacitive loads, a 0.22F capacitor in series with a 150 resistor between the output and ground will compensate the amplifier to drive capacitive loads greater than 0.5nF. Distortion The LT1997-2 features excellent distortion performance when the internal op amp is operating in the normal operating region. Operating the LT1997-2 with the internal op amp in the over the top region will increase distortion due to the lower loop gain of the op amp. Operating the For applications with very high input voltages, the LT1997-2 pinout eases the printed circuit board (PCB) layout burden. Voltages at +INA, -INA, +INB, and -INB input pins are separated from other pins by virtue of unpopulated pin locations, as illustrated in the Pin Configuration section of this data sheet. Power Dissipation Considerations Because of the ability of the LT1997-2 to operate on power supplies up to 25V, to withstand very high input voltages and to drive heavy loads, there is a need to ensure the die junction temperature does not exceed 150C. The LT1997-2 is housed in DF14 (JA = 45C/W, JC = 3C/W) and MS16 (JA = 130C/W) packages. In general, the die junction temperature (TJ) can be estimated from the ambient temperature (TA), the device's power dissipation (PD) and the thermal resistance of the device and board (JA). TJ = TA + PD * JA The thermal resistance from the junction to the ambient environment (JA) is the sum of the thermal resistance from the junction to the exposed pad (JC) and the thermal resistance from the exposed pad to the ambient environment (CA). The CA value depends on how much PCB metal is connected to the exposed pad in the board. The more PCB metal that is used, the lower CA and JA will be. Power is dissipated by the amplifier's quiescent current, by the output current driving a resistive load, and by the input current driving the LT1997-2's internal resistor network. PD = ( ( VS+ - VS - ) * IS ) + POD + PRESD Rev 0 18 For more information www.analog.com LT1997-2 APPLICATIONS INFORMATION For a given supply voltage, the worst-case output power dissipation POD(MAX) occurs with the output voltage at half of either supply voltage. POD(MAX) is given by: POD(MAX) ( V 2) = S 2 RLOAD 12.52 2552 + 2.5k 275k 255 255 - 12.5 130 - 11 11 + + 250k 25k 2 = 0.38W Assuming a thermal resistance of 45C/W, the die temperature will experience an 17C rise above ambient. This implies that the maximum ambient temperature the LT1997-2 should operate under the above conditions is: TA = 150C - 17C = 133C It is recommended that the exposed pad of the DFN package have as much PCB metal connected to it as reasonably available. The more PCB metal connected to the exposed 2 V+IN ) ( = RG + RF RF V - V * -IN +IN RG + RF PRESDB = RG PD = ( 50 * 0.6mA ) + 2 The power dissipated in the internal resistors (PRESD) depends on the manner the input resistors have been configured as well as the input voltage, the output voltage and the voltage on the REF pin. The following equations and Figure 8 show the different components of PRESD corresponding to the different groups of the LT1997-2's internal resistors, assuming that the LT1997-2 is used with a dual supply configuration with REF pin at ground (refer to Figure 3 for resistor terminologies used in equations below). PRESDA V+IN = 255V and REF = 0V, the total power dissipation is given by: 2 RF V * - V +IN OUT RG + RF PRESDC = RF VS+ = 25V V-IN = 255V - VOUT/0.1 = 130V V+ -INA -INB -INC LT1997-2 PRESDC 25k 100k 125k 250k 2 PRESDB - PRESDA OUT + 250k VOUT = 12.5V 2.5k 125k 100k PRESD = PRESDA + PRESDB + PRESDC In general, PRESD increases with higher input voltage and lower output and REF pin voltages. V+IN = 255V Example: For an LT1997-2 in a DFN package mounted on a PC board with a thermal resistance of 45C/W, operating on 25V supplies and driving a 2.5k load to 12.5V with +INA +INB +INC 25k SHDN REF V- VS- = -25V 19972 F08 Figure 8. Power Dissipation Example Rev 0 For more information www.analog.com 19 LT1997-2 APPLICATIONS INFORMATION pad, the lower the thermal resistance. Connecting a large amount of PCB metal to the exposed pad can reduce the JA to even less than 45C/W. Use multiple vias from the exposed pad to the V- plane. The exposed pad is electrically connected to the V- pin. In addition, a heat sink may be necessary if operating near maximum junction temperature. The MSOP package has no exposed pad and a higher thermal resistance (JA = 130C/W). It should not be used in applications which have a high ambient temperature, require driving a heavy load, or require an extreme input voltage. Thermal Shutdown For safety, the LT1997-2 will enter shutdown mode when the die temperature rises to approximately 163C. This thermal shutdown has approximately 9C of hysteresis requiring the die temperature to cool 9C before enabling the amplifier again. ESD Protection The LT1997-2 is protected by a number of ESD structures. The structures are shown in Figure 9. -INA -INB V+ -INC LT1997-2 V- 100k 125k 25k - 250k OUT V- 250k 125k + V- 100k V+ 50k V- REF1 50k REF2 10A 19973 TA03 +INA +INB +INC V- SHDN V- 19972 F09 Figure 9. ESD Protection The ESD structures serve to protect the internal circuitry but also limit signal swing on certain nodes. The structures on the internal op amp inputs limit the voltage on these nodes to 0.3V below V- and 80V above V-. The voltage on the REF (DFN), REF1 (MSOP) and REF2 (MSOP) pins are limited to 0.3V below V- and 60V above V-. The voltage on the SHDN pin is limited to 0.3V below V- and 0.3V above V+. Direct Line Voltage Measurement Since the LT1997-2 can withstand up to 255V at its input pins, configurations with the highest attenuation factors allow for direct sensing of the 60Hz, 120VAC line voltage. The circuit shown in Figure 10 directly measures the line and neutral signals. The ground of the circuit can reasonably connect to earth ground. The neutral voltage level will typically hover near earth. The ability of the LT1997-2 to sense high voltages with varying common mode levels enables this extremely simple implementation. High Side Large Voltage Measurement In some applications, an electrical potential develops relative to a high line voltage. As an example, some LED current control power conversion topologies place the LED at the high voltage. Even more interestingly, the high line may be moving. Off-line LED conversion such as in modern light bulbs sometimes use LEDs pegged to the rectified line voltage. The circuit in Figure 11 uses the LT3590 to control LED current. A LT1997-2 configured for a gain of 0.08V/V can enable detection of an LED open circuit fault condition. With the LED open circuited, the voltage across the LED (which is being sensed by the LT1997-2) rises, and at 41.25V the LT1997-2 output rises above 3.3V, indicating a fault condition. A large voltage referred to the rectified AC mains can be attenuated and shifted to a system's low voltage circuitry. Figure 12 shows this kind of function. Off-line LED lighting that employs nonisolated buck power conversion is one such example. Rev 0 20 For more information www.analog.com LT1997-2 APPLICATIONS INFORMATION 15V V+ LT1997-2 100k 125k NEUTRAL 25k - 250k OUT 120V RMS 125k LINE VOUT + 250k 25k REF 100k +INA +INB +INC SHDN 15 160 12 120 9 80 6 40 3 0 0 -40 -3 -80 -6 -120 -9 -12 -160 LINE -200 0 V- -15V 200 OUTPUT VOLTAGE, VOUT (V) EARTH DIFFERENTIAL AC LINE VOLTAGE (V) -INA -INB -INC 10 OUTPUT 20 30 TIME (ms) 19972 F10 40 50 -15 19972 F10 LT1997-2 CONFIGURED FOR GAIN = 0.069 (ATTENUATION = 14.5) Figure 10. Direct Line Voltage (120VAC, 60Hz) Measurement 5V V+ -INA -INB -INC LT1997-2 100k 125k 1F QTLP690C N = 16 250k - 250k + OUT 4 VIN = 48V 25k 125k 1F LED VIN CTRL LT3590 SW 470F 25k REF 100k +INA +INB +INC SHDN V- VREG 0.1F VOUT 19972 F11 GND LT1997-2 CONFIGURED FOR GAIN = 0.08 (ATTENUATION = 12.5) Figure 11. Detection of an LED Open Circuit Fault Condition Rev 0 For more information www.analog.com 21 LT1997-2 APPLICATIONS INFORMATION RECTIFIED AC LINE 15V LEDP V+ -INA -INB -INC 0.01F GSD2004W-V 330F LT1997-2 100k W5AP-LZMZ-5K8L N=5 125k LEDN 25k 250k - 250k + OUT 470F 125k GATE DRIVE REF 100k BSC42DN25NS3 10k 25k VOUT +INA +INB +INC 0.05 SHDN V- 19972 F12a -15V CURRENT SENSE LT1997-2 CONFIGURED FOR GAIN = 0.069 (ATTENUATION = 14.5) 5 160 4 120 3 80 2 40 1 0 0 10 20 30 TIME (ms) 40 50 LT1997-2 OUTPUT (V) VOLTAGES BASED ON LED AND RECTIFIED AC (V) 200 MOVING HIGH LINE (LEDP) VOLTAGE BELOW LINE (LEDN) DIFFERENCE VOLTAGE (LEDP - LEDN) LT1997-2 OUTPUT (VOUT) 0 19972 F12b Figure 12. LED Common Mode Swings Relative to Rectified AC Rev 0 22 For more information www.analog.com LT1997-2 TYPICAL APPLICATIONS LT1997-2 Configured for Differential Output with Gain = 0.2 VS+ V-IN V+ -INA -INB -INC LT1997-2 100k 125k 25k - 250k OUT 10k + 250k - + V+OUT VOCM LT6015 125k 25k 100k 10k REF V-OUT +INA +INB +INC V- SHDN V+IN VS- 19972 TA02 USE VOCM TO SET THE DESIRED OUTPUT COMMON MODE LEVEL Precision Over-The-Top Single-Supply Funnel Amplifier VBATTERY = 3.3V TO 50V VBATTERY V+ -INA -INB -INC LT1997-2 100k 125k V-IN VCM V+IN VCM = -0.3V TO 2 * VBATTERY 25k - 250k OUT + 250k 125k 100k +INA +INB +INC SHDN 50k REF2 50k REF1 V VOUT = BATTERY + 0.25 * (V+IN - V-IN) 2 V- 19972 TA03 Rev 0 For more information www.analog.com 23 LT1997-2 PACKAGE DESCRIPTION DF Package 14(12)-Lead Plastic DFN (4mm x 4mm) (Reference LTC DWG # 05-08-1963 Rev O) 1.00 BSC 3.00 REF 0.70 0.05 4.50 0.05 3.10 0.05 1.70 0.05 3.38 0.05 PACKAGE OUTLINE 0.25 0.05 0.50 BSC RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 3.00 REF 4.00 0.10 (4 SIDES) 8 1.00 BSC 14 0.40 0.10 3.38 0.10 1.70 0.10 PIN 1 NOTCH 0.35 x 45 CHAMFER PIN 1 TOP MARK (NOTE 6) (DF14)(12) DFN 1113 REV 0 0.200 REF 7 R = 0.115 TYP 0.75 0.05 1 0.25 0.05 0.50 BSC BOTTOM VIEW--EXPOSED PAD 0.00 - 0.05 NOTE: 1. PACKAGE OUTLINE DOES NOT CONFORM TO JEDEC MO-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE Rev 0 24 For more information www.analog.com LT1997-2 PACKAGE DESCRIPTION MS Package 16 (12)-Lead Plastic MSOP with 4 Pins Removed (Reference LTC DWG # 05-08-1847 Rev B) 1.0 (.0394) BSC 5.10 (.201) MIN 0.889 0.127 (.035 .005) 3.20 - 3.45 (.126 - .136) 4.039 0.102 (.159 .004) (NOTE 3) 16 14 121110 9 0.50 (.0197) BSC 0.305 0.038 (.0120 .0015) TYP RECOMMENDED SOLDER PAD LAYOUT 0.254 (.010) 0.280 0.076 (.011 .003) REF 3.00 0.102 (.118 .004) (NOTE 4) 4.90 0.152 (.193 .006) DETAIL "A" 0 - 6 TYP 1 GAUGE PLANE 0.53 0.152 (.021 .006) DETAIL "A" 0.18 (.007) SEATING PLANE 1.10 (.043) MAX 0.17 - 0.27 (.007 - .011) TYP 0.50 (.0197) BSC 3 567 8 1.0 (.0394) BSC 0.86 (.034) REF 0.1016 0.0508 (.004 .002) MSOP (MS12) 0213 REV B NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX Rev 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license For is granted implication or otherwise under any patent or patent rights of Analog Devices. more by information www.analog.com 25 LT1997-2 TYPICAL APPLICATION Funnel Instrumentation Amplifier for High Voltage Sensing 125k - -65V LT1997-2 25k - 250k OUT + 250k VAC - 1M 65V 1/2 LTC6091 125k 25k VOUT REF -65V 5 120 4 90 3 60 2 30 1 0 0 -30 -1 -60 -2 -90 -3 -120 100k -150 + 1M 150 V- SHDN +INA +INB +INC VAC 0 10 -4 VOUT 20 30 TIME (ms) OUTPUT VOLTAGE, VOUT (V) 1/2 LTC6091 V+ -INA -INB -INC 100k LINE VOLTAGE, VAC (V) 65V + Input and Output Voltage Waveforms 10V 40 50 -5 19972 TA04b 19972 TA04a -10V LT1997-2 CONFIGURED FOR GAIN = 0.0455 (ATTENUATION = 22) RELATED PARTS PART NUMBER DESCRIPTION COMMENTS Difference Amplifiers LT1997-3 Precision, Wide Voltage Range Gain Selectable Amplifier 3.3V to 50V Operation, CMRR > 91dB, Input Voltage = 160V, Gain = 1, 3, 9 LT6375 270V Common Mode Voltage Difference Amplifier 3.3V to 50V Operation, CMRR > 97dB, Input Voltage = 270V, Gain = 1 LT6376 230V Common Mode Voltage G = 10 Difference Amplifier 3.3V to 50V Operation, CMRR > 90dB, Input Voltage = 230V, Gain = 10 LT1990 250V Input Range Difference Amplifier 2.7V to 36V Operation, CMRR > 70dB, Input Voltage = 250V, Gain = 1, 10 LT1991 Precision, 100A Gain Selectable Amplifier 2.7V to 36V Operation, 50V Offset, CMRR > 75dB, Input Voltage = 60V LT1996 Precision, 100A Gain Selectable Amplifier Micropower, Pin Selectable Up to Gain = 118 AD8275 G = 0.2, Level Translation, 16-Bit ADC Driver 3.3V to 15V Operation, CMRR > 86dB, Input Voltage = -35V to 40V, Gain = 0.2 AD8475 Precision, Selectable Gain, Fully Differential Funnel Amplifier 3.3V to 10V Operation, CMRR > 86dB, Input Voltage = 15V, Gain = 0.4, 0.8 Operational Amplifiers LT6015/LT6016/ LT6017 Single, Dual, and Quad Over-The-Top Precision Op Amp 3.2MHz, 0.8V/s, 50V VOS, 3V to 50V VS, 0.335mA IS, RRIO LT6018 33V, Ultralow Noise, Precision Op Amp VOS: 50V, GBW: 15MHz, SR: 30V/s, en: 1.2nV/Hz, IS: 7.2mA LTC6090/LTC6091 Single and Dual 140V Operational Amplifier 50pA IB, 1.6mV VOS, 9.5V to 140V VS, 4.5mA IS, RR Output Current Sense Amplifiers LT1999 High Voltage, Bidirectional Current Sense Amplifier -5V to 80V, 750V, CMRR 80dB at 100kHz, Gain = 10, 20, 50 LT6108 High Side Current Sense Amplifier with Reference and Comparator with Shutdown 2.7V to 60V, 125V, Resistor Set Gain, 1.25% Threshold Error LT1787/LT1787HV Precision, Bidirectional High Side Current Sense Amplifier 2.7V to 60V Operation, 75V Offset, 60A Current Draw LT6100 Gain-Selectable High Side Current Sense Amplifier 4.1V to 48V Operation, Pin-Selectable Gain: 10V/V, 12.5V/V, 20V/V, 25V/V, 40V/V, 50V/V LTC6101/ LTC6101HV High Voltage High Side Current Sense Amplifier 4V to 60V/5V to 100V Operation, External Resistor Set Gain, SOT23 LTC6102/ LTC6102HV Zero Drift High Side Current Sense Amplifier 4V to 60V/5V to 100V Operation, 10V Offset, 1s Step Response, MSOP8/DFN Packages LTC6104 Bidirectional, High Side Current Sense 4V to 60V, Gain Configurable, 8-Pin MSOP Package Rev 0 26 D16930-0-6/18(0) For more information www.analog.com www.analog.com ANALOG DEVICES, INC. 2018