Rev. 1.1 10/11 Copyright © 2011 by Silico n Laboratories Si500S
Si500S
SINGLE-ENDED OUTPUT SILICON OSCILLATOR
Features
Specifications
Quartz-free, MEMS-free, and PLL-free all-silicon oscillator
Any output frequencies from 0.9 to 200 MHz
Short lead times
Excellent temperature stability (±20 ppm)
Highly reliable startup and operation
High immunity to shock and vibration
Low jitter: <1.5 ps rms
0 to 85 °C operation includes 10-year aging in hot
environments
Footprint compatible with industry-
standard 3.2 x 5.0 mm XOs
CMOS and SSTL versions available
Driver stopped, tri-state, or powerdown
operation
RoHS compliant
1.8, 2.5, or 3.3 V options
Low power
More than 10x better fit rate than
competing crystal solutions
Parameters Condition Min Typ Max Units
Frequency Range 0.9 200 MHz
Frequency Stability
Temperature stability,
0 to +70 °C ±10 ppm
Temperature stability,
0 to +85 °C ±20 ppm
Total stability,
0 to +70 °C operation1 ±150 ppm
Total stability,
0 to +85 °C operation2 ±250 ppm
Operating Temperature Commercial 0 70 °C
Extended commercial 0 85 °C
Storage Temperature –55 +125 °C
Supply Voltage 1.8 V option 1.71 1.98 V
2.5 V option 2.25 2.75 V
3.3 V option 2.97 3.63 V
Notes:
1. Inclusive of 25 °C initial frequency accuracy, operating temperature range, supply voltage change, output load change,
first-year aging at 25 °C, shock, vibration, and one solder reflow.
2. Inclusive of 25 °C initial frequency accuracy, operating temperature range, supply voltage change, output load change,
ten-year aging at 85 °C, shock, vibration, and one solder reflow.
3. See “AN409: Output Termination Options for the Si500S and Si500D Silicon Oscillators” for further details regarding
output clock termination recomme ndations.
4. VTT = .5 x VDD.
5. VTT = .45 x VDD.
Si500S
2 Rev. 1.1
Supply Current
1.8 V option, 40 pF, 40 MHz, CMOS 13.9 16 mA
1.8 V option, 10 pF, 200 MHz, CMOS 16.7 19 mA
2.5 V option, 40 pF, 40 MHz, CMOS 15.8 18 mA
2.5 V option, 10 pF, 200 MHz, CMOS 19.3 22 mA
3.3 V option, 40 pF, 40 MHz, CMOS 17.7 20 mA
3.3 V option, 10 pF, 200 MHz, CMOS 21.5 24 mA
SSTL-3.3, 200 MHz 18.1 20.2 mA
SSTL-2.5, 200 MHz 18.0 19.7 mA
SSTL-1.8, 200 MHz 16.8 18.7 mA
Output Stopped, CMOS 11.8 13.1 mA
Tri-State 9.7 10.7 mA
Powerdown 1.0 1.9 mA
Output Symmetry 0.5 x VDD 46 – 13 ns/TCLK 54 +
13 ns/TCLK %
Rise and Fall Times3CMOS, CL= 15 pF measured from
20 to 80% of VDD —1.42.0ns
SSTL 0.6 ns
CMOS Output Voltage VOH, sourcing 9 mA VDD –0.5 V
VOL, sinking 9 mA 0.5 V
SSTL-1.8 Output Voltage4VOH VTT + 0.375 V
VOL ——V
TT – 0.375
SSTL-2.5 Output Voltage4VOH VTT + 0.48 V
VOL ——V
TT – 0.48
SSTL-3.3 Output Voltage5VOH VTT + 0.48 V
VOL ——V
TT – 0.48
Powerup Time From time VDD crosses min spec
supply ——2ms
OE Deassertion to Clk Stop 250 +
3xT
CLK ns
Return from Output Drive r
Stopped Mode ——
250 +
3xT
CLK ns
Return from Tri-State Time 12 + 3 x TCLK µs
Return from Powerdown Time 2 ms
Period Jitter (1-sigma) SSTL3—12
ps
RMS
Integrated Phase Jitter 1MHz–0.4xF
OUT, SSTL or CMOS
and CL < 7pF,
FOUT > 2.5 MHz —0.71.5
ps
RMS
Parameters Condition Min Typ Max Units
Notes:
1. Inclusive of 25 °C initial frequency accuracy, operating temperature range, supply voltage change, output load change,
first-year aging at 25 °C, shock, vibration, and one solder reflow.
2. Inclusive of 25 °C initial frequency accuracy, operating temperature range, supply voltage change, output load change,
ten-year aging at 85 °C, shock, vibration, and one solder reflow.
3. See “AN409: Ou tput Termination Options for the Si500S and Si500D Silicon Oscillators” for further details regarding
output clock termination recommendations.
4. VTT = .5 x VDD.
5. VTT = .45 x VDD.
Si500S
Rev. 1.1 3
Package Specifications
Figure 1. Recommended Land Pattern Figure 2. Top Mark
Table 1. Package Diagram Dimensions (mm)
Dimension Min Nom Max Dimension Min Nom Max
A 0.80 0.85 0.90 L1 0.00 0.05 0.10
A1 0.00 0.03 0.05 aaa 0.10
b 1.15 1.20 1.25 bbb 0.10
D 3.20 BSC ccc 0.08
e 2.54 BSC ddd 0.10
E 4.00 BSC eee 0.05
L 0.95 1.00 1.05
Table 2. Pad Connections
1OE
2GND
3 Output
4VDD
Dimension (mm)
C1 2.90
E 2.40
X1 1.40
Y1 1.70
Table 3. Tri-State/Powerdown/Driver Stopped
Function on OE (3rd Option Code)
ABC D E F
Open Active Active Active Active Active Active
1
Level Active Tri-
State Active Power-
down Active Driver
Stopped
0
Level Tri-
State Active Power-
down Active Driver
Stopped Active
0CCCCC
TTTTTTYY
0 = Si500
CCCCC = mark code
TTTTTT = assembly manufacturing code
YY = year
WW = work week
WW
Si500S
4 Rev. 1.1
Environmental Compliance
Ordering Information
The Si500S supports a variety of options including frequency, output format, supply voltage, and tri-
state/powerdown/output driver stopped mode. Specific device configurations are programmed into the Si500S at
time of shipment. Configurations are specified using the figure below. Silicon Labs provides a web-based part
number utility that can be used to simplify part number configuration. Refer to
www.silabs.com/SiliconXOPartnumber to access this tool. The Si500S silicon oscillator is supplied in a ROHS-
compliant, 4-pad, 3.2 x 4.0 mm package. Tape and reel packaging is available as an order ing option.
Parameter Conditions/Test Method
Mechanical Shock MIL-STD-883, Method 2002.4
Mechanical Vibration MIL-STD-883, Method 2007.3 A
Resistance to Soldering Heat MIL-STD-202, 260 C° for 8 seconds
Solderability MIL-STD-883, Method 2003.8
Damp Heat IEC 68-2-3
Moisture Sensitivity Level J-STD-020, MSL 3
500S X X
Si500 Oscillator
VDD
A
D
E
H
J
M
3.3
3.3
2.5
2.5
1.8
1.8
Format
CMOS
SSTL
CMOS
SSTL
CMOS
SSTL
1st Option Code
2nd O p tio n C o de
S t abil ity ( ppm, ma x)
A ±1 5 0
B ±2 5 0
X
3rd Op tio n Co d e
Tri-State/Powerdown/
Output Driver Stopped
A
B
C
D
E
F
O E a c tiv e h ig h/trista te
O E a c tiv e lo w /tristate
OE active high/powerdown
OE active low/powerdown
OE active high/driver stopped
OE active low/driver stopped
XXMXXXX A C X R
Frequency
xMxxxxx: fOUT < 10 MHz
xxMxxxx: 10 MHz < fOUT < 100 MHz
xxxMxxx: fOUT > 100 MHz
R = Tape & Reel
Blank = Cut-Tape
Oper. Temp R ange
F 0 to 70 °C
*H 0 to 8 5 °C
Product Revision = C
Package
A 3.2 x 4.0 mm S MD
*Note: Only +250 ppm is supported.
Si500S
Rev. 1.1 5
DOCUMENT CHANGE LIST
Revision 0.3 to Revision 0.4
Revision B to Revision C updated in Ordering Information
0 to 85 C° Operating Temperature Range option added
Multiple CMOS output format codes removed
Revision 0.4 to Revision 1.0
Clarified SSTL specifications.
Revised CMOS supply current max values .
Revision 1.0 to Revision 1.1
Updated Ordering information for ±250 ppm from 0 to
+85 °C.
Updated jitter from 1.5 ps to 1.5 ps rms.
Updated operating temperature to include extended
commercial at 0 to +85 °C.
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