Document No. 70-0144-04 │www.psemi.com
Page 1 of 8
©2010-2011 Peregrine Semiconductor Corp. All rights reserved.
Figure 2. Package Type
20-lead 4 x 4 mm QFN
Product Specification
75 Ω SPDT CATV UltraCMOS™
Switch 5 MHz - 3 GHz
Product Description
Figure 1. Functional Diagram
PE4256
Features
75 Ω characteristic impedance
Integrated 75 Ω terminations
CTB performance of -90 dBc
High isolation 65 dB at 1000 MHz
Low insertion loss: typically 0.5 dB at 5
MHz, 0.9 dB at 1000 MHz
High input IP3: >50 dBm
CMOS two-pin control
Single +3 volt supply operation
Low current consumption: 8 μA
Unique all off terminated mode
4 x 4 mm QFN package
Parameter Condition Minimum Typical Maximum Units
Operating Frequency1 5 3000 MHz
Insertion Loss
5-250 MHz
250-750 MHz
750-1000 MHz
1000-2200 MHz
0.5
0.8
0.9
1.1
0.6
0.95
1.1
1.3
dB
Isolation
5-250 MHz
250-750 MHz
750-1000 MHz
1000-2200 MHz
75
65
62
49
80
70
65
52
dB
Input IP22 5-1000 MHz 80 dBm
Input IP32 5-1000 MHz 50 55 dBm
Input 1dB Compression2 1000 MHz 29 31 dBm
CTB / CSO 77 & 110 channels;
Power Out = 44 dBm V -90 dBc
Switching Time 50% CTRL to 10/90% RF 2 µs
Video Feedthrough3 5-1000 MHz 15 mVpp
Notes: 1. Device linearity will begin to degrade below 5 MHz.
2. Measured in a 50 Ω system.
3. Measured with a 1 ns risetime, 0/3 V pulse and 500 MHz bandwidth
Peregrine Specification 71-0013-01
The PE4256 is an UltraCMOS™ Switch designed for CATV
applications, covering a broad frequency range from 5 MHz up to
3 GHz. This single-supply SPDT switch integrates a two-pin
CMOS control interface. It also provides low insertion loss with
extremely low bias requirements while operating on a single 3-
volt supply. In a typical CATV application, the PE4256 provides
for a cost effective and manufacturable solution when compared
to mechanical relays.
The PE4256 is manufactured on Peregrine’s UltraCMOS™
process, a patented variation of silicon-on-insulator (SOI)
technology on a sapphire substrate, offering the performance
of GaAs with the economy and integration of conventional
CMOS.
Table 1. Electrical Specifications @ +25 °C, VDD = +3 V (ZS = ZL = 75 Ω)
Product Specification
PE4256
Page 2 of 8
©2010-2011 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0144-04 │ UltraCMOS™ RFIC Solutions
Table 2. Pin Descriptions
Table 3. Absolute Maximum Ratings
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS™ device, observe
the same precautions that you would use with
other ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the rating specified.
Table 4. DC Electrical Specifications @ 25 °C
Figure 3. Pin Configuration (Top View)
No. Name Description
1 GND Ground
2 GND Ground
31 RF1 RF I/O
44 GND Ground
5 GND Ground
6 GND Ground
74 GND Ground
81 RFC Common
94 GND Ground
10 GND Ground
11 GND Ground
124 GND Ground
131 RF2 RF I/O
14 GND Ground
15 GND Ground
162 C2 Control 2
172 C1 Control 1
183 VSS/GND Negative Supply Option
19 GND Ground
20 VDD Supply
Paddle GND Exposed Ground Paddle
Notes: 1. RF pins 3, 8, and 13 must be at 0 VDC. The RF pins do not require DC
blocking capacitors for proper operation if the 0 VDC requirement is
met.
2. Pins 16 and 17 are the CMOS controls that set the three operating
states.
3. Connect pin 18 to GND to enable the on-chip negative voltage
generator. Connect pin 18 to VSS (-3 V) to bypass and disable internal -
3 V supply generator.
4. Customer can add external resistance to ground to change or modify
termination resistance.
Symbol Parameter/Condition Min Max Unit
VDD Power supply voltage -0.3 4.0 V
VI Voltage on CTRL input -0.3 VDD +
0.3 V
PRF RF CW power 24 dBm
TST Storage temperature -65 150 ° C
TOP Operating temperature -40 85 ° C
VESD ESD voltage
(Human Body Model) 1000 V
Parameter Min Typ Max Unit
VDD Power Supply 2.7 3.0 3.3 V
IDD Power Supply Current
(VDD = 3 V, VCNTL = 3 V) 8 20 μA
Control Voltage High 70% VDD V
Control Voltage Low 30% VDD V
Moisture Sensitivity Level
The Moisture Sensitivity Level rating for the
PE4256 in the 20-lead 4 x 4 mm QFN
package is MSL1.
Exceeding absolute maximum ratings may cause
permanent damage. Operation should be
restricted to the limits in the Operating Ranges
table. Operation between operating range
maximum and absolute maximum for extended
periods may reduce reliability.
Product Specification
PE4256
Page 3 of 8
Document No. 70-0144-04 │www.psemi.com ©2010-2011 Peregrine Semiconductor Corp. All rights reserved.
Table 5. RF Path Truth Table
Table 6. Termination Truth Table
Notes: 1. The operation of the PE4256 is not supported or characterized in the
C1 = VDD and C2 = VDD state.
2. "X" denotes termination enabled.
C1 C2 RFC – RF1 RFC – RF2
Low Low OFF OFF
Low High OFF ON
High Low ON OFF
High High N/A1 N/A1
C1 C2 RFC – 75 Ω RF1 – 75 Ω RF2 – 75 Ω
Low Low X2 X
2 X
2
Low High X2
High Low X2
High High N/A1 N/A1 N/A1
Switching Frequency
The PE4256 has a maximum 25 kHz switching
rate when the internal negative voltage generator
is used (pin 18 = GND).
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS™
devices are immune to latch-up.
Product Specification
PE4256
Page 4 of 8
©2010-2011 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0144-04 │ UltraCMOS™ RFIC Solutions
Evaluation Kit
The SPDT Switch Evaluation Kit was designed to
ease customer evaluation of the PE4256 SPDT
switch. The RF common port (RFC) is connected
through a 75 Ω transmission line to J2. Port 1 and
Port 2 are connected through 75 Ω transmission
lines to J1 and J3. A through transmission line
connects F connectors J4 and J5. This
transmission line can be used to estimate the loss
of the PCB over the environmental conditions
being evaluated.
The board is constructed with four metal layers in
FR4 material with a total thickness of 0.062". The
transmission lines were designed using a coplanar
waveguide with ground plane (28 mil core, 21 mil
width, 30 mil gap).
J6 provides a means for controlling DC and digital
inputs to the device. The provided jumpers short
the package pin to ground for logic low. When the
jumper is removed, the pin is pulled up to VDD for
logic high.
When the jumper is in place, 3 µA of current will
flow through the 1 MΩ pull-up resistor. This extra
current should not be attributed to the device.
Proper PCB design is essential for full isolation
performance. This evaluation board demonstrates
good trace and ground management for minimum
coupling and radiation.
Figure 4. Evaluation Board Layouts
Figure 5. Evaluation Board Schematic
Peregrine Specification 102/0195~02A
Peregrine Specification 101/0148~03A
Product Specification
PE4256
Page 5 of 8
Document No. 70-0144-04 │www.psemi.com ©2010-2011 Peregrine Semiconductor Corp. All rights reserved.
-100
-90
-80
-70
-60
-50
-40
0 500 1000 1500 2000 2500 3000
RF1 - RF2 (RF1 Thru)
RF1 - RF2 (RF2 Thru)
RF1 - RF2 (RF1 & 2 OPEN)
Isolation (dB)
Frequency (MHz)
-100
-90
-80
-70
-60
-50
-40
0 500 1000 1500 2000 2500 3000
RFC - RF1 (RF2 OPEN)
RFC - RF2 (RF1 OPEN)
Isolation (dB)
Frequency (MHz)
-100
-90
-80
-70
-60
-50
-40
0 500 1000 1500 2000 2500 3000
RFC - RF1 (RF2 CLOSED)
RFC - RF2 (RF1 CLOSED)
Isolation (dB)
Frequency (MHz)
-1.8
-1.6
-1.4
-1.2
-1
-0.8
-0.6
-0.4
-0.2
0 500 1000 1500 2000 2500 3000
25C
-40C
85C
Insertion Loss (dB)
Frequency (MHz)
Typical Performance Data from -40 °C to +85 °C, 75 Ω Impedance
Figure 7. Input to Output Isolation (Closed)
Figure 9. Isolation – RF1 To RF2 Figure 8. Input to Output Isolation (Open)
Figure 6. Insertion Loss (RFC to RF1 or RF2)
Product Specification
PE4256
Page 6 of 8
©2010-2011 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0144-04 │ UltraCMOS™ RFIC Solutions
-35
-30
-25
-20
-15
-10
-5
0
0 500 1000 1500 2000 2500 3000
RFC Terminated
RFC - RF1 CLOSED
Return Loss (dB)
Frequency (MHz)
Typical Performance Data @ +25 °C, 75 Ω Impedance (unless otherwise noted)
Figure 11. RF1 Return Loss
Figure 13. Linearity (50 Ω System Impedance) Figure 12. RF2 Return Loss
Figure 10. RFC Return Loss
0
10
20
30
40
50
60
0 500 1000 1500 2000 2500 3000
Input IP3
1dB Compression
Power (dBm)
Frequency (MHz)
Product Specification
PE4256
Page 7 of 8
Document No. 70-0144-04 │www.psemi.com ©2010-2011 Peregrine Semiconductor Corp. All rights reserved.
20-lead 4 x 4 mm QFN
Figure 14. Package Drawing (mm)
4280
YYWW
ZZZZZ
YYWW = Date Code
ZZZZZ = Last five digits of PSC Lot Number
Figure 15. Marking Specifications
Product Specification
PE4256
Page 8 of 8
©2010-2011 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0144-04 │ UltraCMOS™ RFIC Solutions
Advance Information: The product is in a formative or design stage. The datasheet contains
design target specifications for product development. Specifications and features may change in
any manner without notice. Preliminary Specification: The datasheet contains preliminary data.
Additional data may be added at a later date. Peregrine reserves the right to change specifications
at any time without notice in order to supply the best possible product. Product Specification:
The datasheet contains final data. In the event Peregrine decides to change the specifications,
Peregrine will notify customers of the intended changes by issuing a CNF (Customer Notification
Form).
The information in this datasheet is believed to be reliable. However, Peregrine assumes no
liability for the use of this information. Use shall be entirely at the user’s own risk.
No patent rights or licenses to any circuits described in this datasheet are implied or granted to any third
party.
Peregrine’s products are not designed or intended for use in devices or systems intended for surgical
implant, or in other applications intended to support or sustain life, or in any application in which the
failure of the Peregrine product could create a situation in which personal injury or death might occur.
Peregrine assumes no liability for damages, including consequential or incidental damages, arising out of
the use of its products in such applications.
The Peregrine name, logo, and UTSi are registered trademarks and UltraCMOS, HaRP, MultiSwitch and
DuNE are trademarks of Peregrine Semiconductor Corp.
Sales Contact and Information
For Sales and contact information please visit www.psemi.com.
Table 7. Ordering Information
Order Code Part Marking Description Package Shipping Method
4256-00 PE4256-EK PE4256-20QFN 4 x 4 mm-EK Evaluation Kit 1 / Box
PE4256MLIAA 4256 PE4256-20QFN 4 x 4 mm-75 Green 20-lead 4 x 4 mm QFN, NiPdAu Lead Finish 75 units / Tube
PE4256MLIAA-Z 4256 PE4256-20QFN 4 x 4 mm-3000 Green 20-lead 4 x 4 mm QFN, NiPdAu Lead Finish 3000 units / T&R
EK4256-01 PE4256-EK PE4256-20QFN 4 x 4 mm-EK Evaluation Kit 1 / Box
4256-52 4256 PE4256G-20QFN 4 x 4 mm-3000C Green 20-lead 4 x 4 mm QFN, Matte Tin Lead Finish 3000 units / T&R
Figure 15. Tape and Reel Drawing
