IS31AP4991
Integrated Silicon Solution, Inc. – www.issi.com
Rev. B, 10/18/2012 1
1.2W AUDIO POWER AMPLIFIER WITH ACTIVE-LOW STANDBY MODE
October 2012
GENERAL DESCRIPTION
The IS31AP4991 has been designed for demanding
audio applications such as mobile phones and permits
the reduction of the number of external components.
It is capable of delivering 1.2W of continuous RMS
output power into an 8 load @ 5V.
An externally-controlled standby mode reduces the
supply current to much less than 1A. It also includes
internal thermal shutdown protection.
The unity-gain stable amplifier can be configured by
external gain setting resistors.
FEATURES
Operating from VCC = 2.7V ~ 5.5V
1.2W output power @ VCC = 5V, THD+N= 1%,
f = 1kHz, with 8 load
Ultra-low consumption in standby mode (much
less than 1A)
65dB PSRR @217Hz in grounded mode
Near-zero click-and-pop
Ultra-low distortion (0.025%@0.5W, 1kHz)
SOP-8 and MSOP-8 package
APPLICATIONS
Mobile phones
PDAs
Portable electronic devices
Notebook computer
TYPICAL APPLICATION CIRCUIT
Figure 1 Typical Application Circuit (Single-ended input)
IS31AP4991
Integrated Silicon Solution, Inc. – www.issi.com
Rev. B, 10/18/2012 2
Figure 2 Typical Application Circuit (Differential input)
IS31AP4991
Integrated Silicon Solution, Inc. – www.issi.com
Rev. B, 10/18/2012 3
PIN CONFIGURATION
Package Pin Configuration (Top View)
SOP-8
MSOP-8
PIN DESCRIPTIO N
Pin No. Description
SOP MSOP
IN+ 1 3 Positive input of the first amplifier.
OUT- 2 5 Negative output of the IS31AP4991. Connected to the
load and to the feedback resistor RF.
IN- 3 4
Negative input of the first amplifier, receives the audio
input signal. Connected to the feedback resistor RF
and to the input resistor RIN.
GND 4 7 Ground.
BYPASS 5 2 Bypass capacitor pin which provides the common
mode voltage (VCC/2).
OUT+ 6 8 Positive output of the IS31AP4991. Connected to the
load.
SDB 7 1
The device enters shutdown mode when a low level is
applied on this pin.
VCC 8 6 Positive analog supply of the chip.
IS31AP4991
Integrated Silicon Solution, Inc. – www.issi.com
Rev. B, 10/18/2012 4
ORDERING INFORMATION
Industrial Range: -40°C to +85°C
Order Part No. Package QTY/Reel
IS31AP4991-GRLS2-TR
IS31AP4991-SLS2-TR
SOP-8, Lead-free
MSOP-8, Lead-free
2500
2500
Copyright©2012IntegratedSiliconSolution,Inc.Allrightsreserved.ISSIreservestherighttomakechangestothisspecificationanditsproductsatany
timewithoutnotice.ISSIassumesnoliabilityarisingoutoftheapplicationoruseofanyinformation,productsorservicesdescribedherein.Customersare
advisedtoobtainthelatestversionofthisdevicespecificationbeforerelyingonanypublishedinformationandbeforeplacingordersforproducts.
IntegratedSiliconSolution,Inc.doesnotrecommendtheuseofanyofitsproductsinlifesupportapplicationswherethefailureormalfunctionofthe
productcanreasonablybeexpectedtocausefailureofthelifesupportsystemortosignificantlyaffectitssafetyoreffectiveness.Productsarenot
authorizedforuseinsuchapplicationsunlessIntegratedSiliconSolution,Inc.receiveswrittenassurancetoitssatisfaction,that:
a.)theriskofinjuryordamagehasbeenminimized;
b.)theuserassumeallsuchrisks;and
c.)potentialliabilityofIntegratedSiliconSolution,Incisadequatelyprotectedunderthecircumstances
IS31AP4991
Integrated Silicon Solution, Inc. – www.issi.com
Rev. B, 10/18/2012 5
ABSOLUTE MAXIMUM RATINGS (Note 1)
Supply voltage, VCC -0.3V ~ +6.0V
Voltage at any input pin -0.3V ~ VCC+0.3V
Maximum junction temperature, TJMAX 150°C
Storage temperature range, TSTG -65°C ~ +150°C
Operating temperature range, TA 40°C ~ +85°C
Note 1: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other condition beyond those indicated in the operational sections of the specifications
is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
The following specifications apply for CIN = 0.22F, RIN = RF = 20k, CBYPASS = 1F, unless otherwise specified.
Limits apply for TA = 25°C. VCC=5V (Note 2 or specified)
Symbol Parameter Condition Typ. Limit Unit
ICC Quiescent power supply current VCC = 0V, Io = 0A, no Load 4.8 mA (max)
ISTBY Standby current VSTBY = GND, RL = 1 A(max)
VSTBYH Shutdown voltage input high VCC = 5.5V 1.4 V(min)
VSTBYL Shutdown voltage input low VCC = 2.7V 0.4 V(max)
VOS Output offset voltage 15 mV (max)
Po Output power (8) THD+N = 1%; f = 1kHz 1.18 W
THD+N = 10%; f = 1kHz 1.46
tWU Wake-up time (Note 3) C
BYPASS = 1F 115 ms
THD+N Total harmonic distortion+noise
(Note 3) Po = 0.5Wrms; f = 1kHz 0.025 %
PSRR Power supply rejection ratio
(Note 3)
Vripple p-p = 200mV
Input Grounded
f = 217Hz 65 dB
f = 1kHz 77
The following specifications apply for CIN = 0.22F, RIN = RF = 20k, CBYPASS = 1F, unless otherwise specified.
Limits apply for TA= 25°C. VCC=3V (Note 2 or specified)
Symbol Parameter Condition Typ. Limit Unit
ICC Quiescent power supply current VCC = 0V, Io = 0A, no Load 3.8 mA(max)
ISTBY Standby current VSTBY = GND, RL = 1 A(max)
Po Output power (8) THD+N = 1%; f = 1kHz 405 mW
THD+N = 10%; f = 1kHz 502
tWU Wake-up time (Note 3) C
BYPASS = 1F 102 ms
THD+N Total harmonic distortion+noise
(Note 3) Po = 0.3Wrms; f = 1kHz 0.027 %
Note 2: Production testing of the device is performed at 25°C. Functional operation of the device and parameters specified over other
temperature range, are guaranteed by design, characterization and process control.
Note 3: Guaranteed by design.
IS31AP4991
Integrated Silicon Solution, Inc. – www.issi.com
Rev. B, 10/18/2012 6
TYPICAL PERFORMANCE CHARACTERISTIC
THD+N (%)
Output Power (W)
0.01
0.02
0.05
0.1
0.2
0.5
1
2
5
10
10m 220m 50m 100m 200m 500m 1
Vcc = 3V
RL = 8Ω
f = 1kHz
Figure 3 THD+N vs. Output Power
0.01
10
0.02
0.05
0.1
0.2
0.5
1
2
5
20 20k
50 100 200 500 1k 2k 5k
Frequency (Hz)
THD+N (%)
Vcc = 3V
RL = 8Ω
Power=250mW
Figure 5 THD+N vs. Frequency
Figure 7 PSRR vs. Frequency
THD+N (%)
Output Power (W)
0.01
0.02
0.05
0.1
0.2
0.5
1
2
5
10
10m 220m 50m 100m 200m 500m 1
Vcc = 5V
R
L
= 8Ω
f = 1kHz
Figure 4 THD+N vs. Output Power
0
.01
10
0
.02
0
.05
0.1
0.2
0.5
1
2
5
20 20k
50 100 200 500 1k 2k 5k
Frequency (Hz)
THD+N (%)
Vcc = 5V
R
L
= 8Ω
Power=800mW
Figure 6 THD+N vs. Frequency
Figure 8 PSRR vs. Frequency
IS31AP4991
Integrated Silicon Solution, Inc. – www.issi.com
Rev. B, 10/18/2012 7
Frequency (Hz)
Vcc = 5V
R
L
= 8Ω
Po = 800mW
Output Noise
V
oltage (V)
10
u
100
u
20
u
30
u
40
u
50
u
70
u
20 20
k
50 100 200 500 1k 2k 5k
Vcc = 5V
R
L
= 8Ω
A Weighted Filter
Figure 9 Noise Floor
Figure 10 Output Power vs. Power Supply
IS31AP4991
Integrated Silicon Solution, Inc. – www.issi.com
Rev. B, 10/18/2012 8
APPLICATION INFORMATION
BTL CONFIGURATION PRINCIPLE
The IS31AP4991 is a monolithic power amplifier with a
BTL output type. BTL (bridge tied load) means that
each end of the load is connected to two single-ended
output amplifiers. Thus, we have:
Single-ended output 1 = VOUT+ = VOUT (V)
Single ended output 2 = VOUT- = -VOUT (V)
and
VOUT+ - VOUT- = 2VOUT (V)
The output power is:
L
OUT
OUT R
V
PRMS
2
)2(
For the same power supply voltage, the output power
in BTL configuration is four times higher than the
output power in single ended configuration.
GAIN IN A TYPICAL APPLICATION SCHEMA TIC
The typical application schematic is shown in Figure 1
on page 1.
In the flat region (no CIN effect), the output voltage of
the first stage is (in Volts):
IN
F
INOUT R
R
VV )(
For the second stage: VOUT+ = -VOUT- (V)
The differential output voltage is (in Volts):
IN
F
INOUTOUT R
R
VVV 2
The differential gain, GV, is given by:
IN
F
IN
OUTOUT
vR
R
VVV
G2
VOUT- is in phase with VIN and VOUT+ is phased 180°
with VIN. This means that the positive terminal of the
loudspeaker should be connected to VOUT+ and the
negative to VOUT-.
LOW AND HIGH FREQUENCY RESPONSE
In the low frequency region, CIN starts to have an effect.
CIN forms with RIN a high-pass filter with a -3dB cut-off
frequency. fCL is in Hz.
ININ
CL CR
f
2
1
In the high frequency region, you can limit the
bandwidth by adding a capacitor (CF) in parallel with RF.
It forms a low-pass filter with a -3dB cut-off frequency.
fCH is in Hz.
FF
CH CR
f
2
1
DECOUPLING OF THE CIRCUIT
Two capacitors are needed to correctly bypass the
IS31AP4991: a power supply bypass capacitor CS and
a bias voltage bypass capacitor CBYPASS.
CS has particular influence on the THD+N in the high
frequency region (above 7kHz) and an indirect
influence on power supply disturbances. With a value
for CS of 1F, you can expect THD+N levels similar to
those shown in the datasheet.
In the high frequency region, if CS is lower than 1F, it
increases THD+N and disturbances on the power
supply rail are less filtered.
On the other hand, if CS is higher than 1F, those
disturbances on the power supply rail are more filtered.
CBYPASS has an influence on THD+N at lower
frequencies, but its function is critical to the final result
of PSRR (with input grounded and in the lower
frequency region).
If CBYPASS is lower than 1F, THD+N increases at lower
frequencies and PSRR worsens.
If CBYPASS is higher than 1F, the benefit on THD+N at
lower frequencies is small, but the benefit to PSRR is
substantial.
Note that CIN has a non-negligible effect on PSRR at
lower frequencies. The lower the value of CIN, the
higher the PSRR is.
WAKE-UP TIME (tWU)
When the standby is released to put the device on, the
bypass capacitor CBYPASS will not be charged
immediately. As CBYPASS is directly linked to the bias of
the amplifier, the bias will not work properly until the
CBYPASS voltage is correct. The time to reach this
voltage is called wake-up time or tWU and specified in
the electrical characteristics table with CBYPASS = 1F.
POP PERFORMANCE
Pop performance is intimately linked with the size of
the input capacitor CIN and the bias voltage bypass
capacitor CBYPASS.
The size of CIN is dependent on the lower cut-off
frequency and PSRR values requested. The size of
CBYPASS is dependent on THD+N and PSRR values
requested at lower frequencies.
Moreover, CBYPASS determines the speed with which
the amplifier turns on.
IS31AP4991
Integrated Silicon Solution, Inc. – www.issi.com
Rev. B, 10/18/2012 9
CLASSIFICATION REFLOW PROFI LES
Profile Feature Pb-Free Assembly
Preheat & Soak
Temperature min (Tsmin)
Temperature max (Tsmax)
Time (Tsmin to Tsmax) (ts)
150°C
200°C
60-120 seconds
Average ramp-up rate (Tsmax to Tp) 3°C/second max.
Liquidous temperature (TL)
Time at liquidous (tL)
217°C
60-150 seconds
Peak package body temperature (Tp)* Max 260°C
Time (tp)** within 5°C of the specified
classification temperature (Tc) Max 30 seconds
Average ramp-down rate (Tp to Tsmax) 6°C/second max.
Time 25°C to peak temperature 8 minutes max.
Figure 11 Classification Profile
IS31AP4991
Integrated Silicon Solution, Inc. – www.issi.com
Rev. B, 10/18/2012 10
PACKAGE INFORMATION
SOP-8
IS31AP4991
Integrated Silicon Solution, Inc. – www.issi.com
Rev. B, 10/18/2012 11
MSOP-8
