SG5841JDZ - Fairchild - Datasheet.Live

October 2008

SG5841J • Rev. 1.3.4

SG5841J — Highly Integrated Green-Mode PWM Controller

SG5841J — Highly Integrated Green-Mo de PWM

Controller

Features

 Green-Mode PWM Controller

 Low Startup Current : 14µA

 Low Operating Current: 4mA

 Programmable PWM Frequency with Hopping

 Peak-Current-Mode Control

 Cycle-by-Cycle Current Limiting

 Synchronized Slope Compensation

 Leading-Edge Blanking (LEB)

 Constant Output Power Limit

 Totem Pole Output with Soft Driving

 VDD Over-Voltage Clamping

 Programmable Over-Temperature Protection (OTP)

 Internal Open-Loop Protection

 VDD Under-Voltage Lockout (UVLO)

 GATE Output Maximum Voltage Clamp:18V

Applications

General-purpose, switch-mode, power supplies and

flyback power converters, including:

 Power Adapters

 Open-Frame SMPS

Description

The highly integrated SG5841/J series of PWM

controllers provides several features to enhance the

performance of flyback converters.

To minimize standby power consumption, a proprietary

green-mode function provides off-time modulation to

continuously decrease the switching frequency at light-

load conditions. This green-mode function enables the

power supply to meet international power conservation

requirements. To further reduce power consumption,

SG5841/J is manufactured using the BiCMOS process.

This allows a low startup current, around 14µA, and an

operating current of only 4mA. As a result, a large

startup resistance can be used.

The built-in synchronized slope compensation achieves

stable peak-current-mode control. The proprietary

internal sawtooth power-limiter ensures a constant

output power limit over a wide range of AC input

voltages, from 90VAC to 264VAC.

SG5841/J provides many protections. In addition to

cycle-by-cycle current limiting, the internal open-loop

protection circuit ensures safety should an open-loop or

output-short-circuit failure occur. PWM output is

disabled until VDD drops below the UVLO lower limit,

then the controller restarts. An external NTC thermistor

can be applied for over-temperature protection.

SG5841/J is available in an 8-pin DIP or SOP package.

Ordering Information

Part Number Ambient Operating

Temperature Range Frequency

Hopping Eco

Status Package

SG5841JSZ -20 to +85°C Yes RoHS 8-Pin Small Outline Package (SOP)

SG5841JSY -20 to +85°C Yes Green 8-Pin Small Outline Package (SOP)

SG5841JDZ -20 to +85°C Yes RoHS 8-Pin Dual Inline Package (DIP)

SG5841SZ -20 to +85°C No RoHS 8-Pin Small Outline Package (SOP)

SG5841SY -20 to +85°C No Green 8-Pin Small Outline Package (SOP)

SG5841DZ -20 to +85°C No RoHS 8-Pin Dual Inline Package (DIP)

For Fairchild’s defini t i on of “green” Eco St atus, pleas e visit: http://www.fairchildsemi.com/company/green/rohs_green.html.

SG5841J • Rev. 1.3.4 2

SG5841J — Highly Integrated Green-Mode PWM Controller

Typical Application

Figure 1. Application Diagram

Block Diagram

Figure 2. Block Diagram

SG5841J • Rev. 1.3.4 3

SG5841J — Highly Integrated Green-Mode PWM Controller

Marking Informa ti on

H: J = with Frequency Hopping

Null = without Frequency Hopping

T:D=DIP,S=SOP

P: Z=LeadFree

Null = regular package

XXXXXXXX : Wafer Lot

Y:Year;WW:Week

V: Assembly Location

ZXYTT

5841/J

TPM

XXXX XXXXYWW

SG5841HTP

F: Fairchild Logo

Z:Plant Code

X:1 Digit Year Code

Y:1 Digit Week Code

TT:2 Digit Die Run Code

T: Package Type (D:DIP, S:SOP)

P:Y = Green Package

M:Manufacturing Flow Code

Figure 3. Top Mark

 marking for SG5841JSZ (pb-free)

 marking for SG5841JDZ (pb-free)

 marking for SG5841SZ (pb-free)

 marking for SG5841DZ (pb-free)

 marking for SG5841JSY (green-compound)

 markin

g

for SG5841SY

(

g

ree

n

-com

p

ound

)

SG5841J • Rev. 1.3.4 4

SG5841J — Highly Integrated Green-Mode PWM Controller

Pin Configuration

RI

VIN

GATE

VDD

SENSE

RT

GND

FB

Figure 4. Pin Configuration

Pin Definitions

Pin # Name Function Description

1 GND Ground Ground.

2 FB Feedback

The signal from the external compensation circuit is fed into this pin. The PWM

duty cycle is determined in response to the signal from this pin and the current-

sense signal from pin 6. If FB voltage exceeds the threshold, the internal

protection circuit disables PWM output after a predetermined delay time.

3 VIN Startup Input

For startup, this pin is pulled HIGH to the rectified line input via a resistor. Since

the startup current requirement is very small, a large startup resistance is used to

minimize power loss.

4 RI

Reference

Setting

A resistor connected from the RI to GND provides a constant current source. This

determines the center PWM frequency. Increasing the resistance reduces PWM

frequency. Using a 26KΩ resistor results in a 65KHz center PWM frequency.

5 RT

Temperature

Detection

For over-temperature protection. An external NTC thermistor is connected from

this pin to the GND pin. The impedance of the NTC decreases at high

temperatures. Once the voltage of the RT pin drops below a fixed limit, PWM

output is disabled.

6 SENSE

Current

Sense

Current sense. The sensed voltage is used for peak-current-mode control and

cycle-by-cycle current limiting.

7 VDD Power

Supply

Power supply. If VDD exceeds a threshold, the internal protection circuit disables

PWM output.

8 GATE Driver Output

The totem-pole output driver for the power MOSFET, which is internally clamped

below 18V.

SG5841J • Rev. 1.3.4 5

SG5841J — Highly Integrated Green-Mode PWM Controller

Absolute Maximum Ratings

Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be

operable above the recommended operating conditions and stressing the parts to these levels is not recommended.

In addition, extended exposure to stresses above the recommended operating conditions may affect device

reliability. The absolute maximum ratings are stress ratings only. All voltage values, except differential voltages, are

given with respect to GND pin.

Symbol Parameter Min. Max. Unit

VDD Supply Voltage 30 V

VIN Input Terminal 30 V

VFB Input Voltage to FB Pin -0.3 7.0 V

VSENSE Input Voltage to SENSE Pin -0.3 7.0 V

VRT Input Voltage to RT Pin -0.3 7.0 V

VRI Input Voltage to RI Pin -0.3 7.0 V

DIP 800

PD Power Dissipation (TA < 50°C ) SOP 400 mW

DIP 82.5

ΘJA Thermal Resistance (Junction-to-Air) SOP 141 °C/W

DIP 59.7

ΘJC Thermal Resistance (Junction-to-Case) SOP 80.8 °C/W

TJ Operating Junction Temperature -40 +125 °C

TSTG Storage Temperature Range -55 +150 °C

TL Lead Temperature (Wave Soldering or Infrared,

10 Seconds) 260 °C

Human Body Model, JESD22-A114 3 kV

ESD Charged Device Model, JESD22-C101 250 V

Recommended Operating Conditions

The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended

operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not

recommend exceeding them or designing to Absolute Maximum Ratings.

Symbol Parameter Min. Max. Unit

TA Operating Ambient Temperatures -20 +85 °C

SG5841J • Rev. 1.3.4 6

SG5841J — Highly Integrated Green-Mode PWM Controller

Electrical Characteristics

VDD = 15V, TA = 25°C, unless otherwise noted.

Symbol Parameter Conditions Min. Typ. Max. Units

VDD Section

VDD-OP Continuously Operating Voltage 24.7 V

VDD-ON Start Threshold Voltage 15 16 17 V

VDD-OFF Minimum Operating Voltage 9 10 11 V

IDD-ST Startup Current VDD=VDD-ON–0.16V 14 30 µA

IDD-OP Operating Supply Current VDD=15V, RI=26KΩ,

GATE=OPEN 4 5 mA

VDD-CLAMP V

DD Over-Voltage-Clamping Level 28 29 V

tD-VDDCLAMP VDD Over-Voltage-Clamping

Debounce Time RI=26KΩ 50 100 200 µs

RI Section

RINOR R

I Operating Range 15.5 36.0 KΩ

RIMAX Maximum RI Value for Protection 230 KΩ

RIMIN Minimum RI Value for Protection 10 KΩ

Oscillator Section

Center Frequency RI=26KΩ 62 65 68

fOSC

Normal

PWM

Frequency Hopping Range RI=26KΩ

(SG5841J only) ±3.7 ±4.2 ±4.7 KHz

tHOP Hopping Period RI=26KΩ

(SG5841J only) 3.9 4.4 4.9 ms

fOSC-G Green-Mode Frequency RI=26KΩ 18 22 25 KHz

fDV Frequency Variation vs. VDD

Deviation VDD=11.5V to 24.7V 5 %

fDT Frequency Variation vs.

Temperature Deviation TA=-20 to +85°C 5 %

Feedback Input Section

AV FB Input to Current Comparator

Attenuation 1/3.75 1/3.20 1/2.75 V/V

ZFB Input Impedance 4 7 KΩ

VFB-OPEN FB Output High Voltage FB pin open 5 6 V

VFB-OLP FB Open-Loop Trigger Level 4.2 4.5 4.8 V

tD-OLP Delay Time of FB Pin Open-Loop

Protection RI=26KΩ 26 29 32 ms

VFB-N Green-Mode Entry FB Voltage RI=26KΩ 1.9 2.1 2.3 V

VFB-G Green-Mode Ending FB Voltage RI=26KΩ V

FB-N-0.5 V

f

OSC

-GREEN

f

OSC

Figure 5. PWM Frequency

SG5841J • Rev. 1.3.4 7

SG5841J — Highly Integrated Green-Mode PWM Controller

Electrical Characteristics (Continued)

VDD = 15V, TA = 25°C, unless otherwise noted.

Symbol Parameter Conditions Min. Typ. Max. Unit

Current-Sense Section

ZSENSE Input Impedance 12 KΩ

VSTHFL Current Limit Flatten

Threshold Voltage 0.85 0.90 0.95 V

VSTHVA Current Limit Valley

Threshold Voltage VSTHFL–VSTHVA 0.22 V

tPD Propagation Delay to

GATE Output RI=26KΩ 150 200 ns

tLEB Leading-Edge Blanking

Time RI=26KΩ 200 270 350 ns

GATE Section

DCYMAX Maximum Duty Cycle 60 65 70 %

VGATE-L Output Voltage Low VDD=15V, IO=50mA 1.5 V

VGATE-H Output Voltage High VDD=12.5V, IO=50mA 7.5 V

tr Rising Time VDD=15V, CL=1nF 150 250 350 ns

tf Falling Time VDD=15V, CL=1nF 30 50 90 ns

IO Peak Output Current VDD=15V, GATE=6V 230 mA

VGATE-

CLAMP

Gate Output Clamping

Voltage VDD=24.7V 18 19 V

RT Section

IRT Output Current of RT Pin RI=26KΩ 92 100 108 µA

VRTTH Trigger Voltage for Over-

Temperature Protection 0.585 0.620 0.655 V

VRT-RLS OTP Release Voltage VRTTH +0.03 V

tD-OTP Over-Temperature

Debounce RI=26KΩ 60 100 140 µs

SG5841J • Rev. 1.3.4 8

SG5841J — Highly Integrated Green-Mode PWM Controller

Typical Performance Characteristics

10

14

18

22

26

30

-40 -25 -10 5 20 35 50 65 80 95 110 125

Temperature

(

°C

)

IDD-ST(µA)

2. 5

3. 0

3. 5

4. 0

4. 5

5. 0

-40 -25 -10 5 20 35 50 65 80 95 110 125

Temperature (°C)

IDD-OP (mA)

Figure 6. Startup Current (IDD-ST) vs. Temperature Figure 7. Operating Supply Current (IDD-OP)

vs. Temperature

0

3

6

9

12

15

11 13 15 17 19 21 23 25 27 29

V

DD

Voltage (V)

I

DD-OP

(mA)

15. 0

15. 5

16. 0

16. 5

17. 0

-40 -25 -10 5 20 35 50 65 80 95 110 125

Temperature (°C)

V

DD-ON

(V)

Figure 8. Operating Current (IDD-OP)

vs. VDD Voltage Figure 9. Start Threshold Voltage (VDD-ON)

vs. Temperature

9. 0

9. 5

10. 0

10. 5

11. 0

-40 -25 -10 5 20 35 50 65 80 95 110 125

Temperature (°C)

V

DD-OFF

(V)

62

63

64

65

66

67

68

-40 -25 -10 5 20 35 50 65 80 95 110 125

Temperature (°C)

fOSC (KHz)

Figure 10. Minimum Operating Voltage (VDD-ON)

vs. Temperature Figure 11. PWM Frequency (fOSC)

vs. Temperature

SG5841J • Rev. 1.3.4 9

SG5841J — Highly Integrated Green-Mode PWM Controller

Typical Performance Characteristics (Continued)

60

62

64

66

68

70

-40 -25 -10 5 20 35 50 65 80 95 110 125

Temperature (°C)

DCY

MAX

(%)

Figure 12. Maximum Duty Cycle (DCYMAX) vs. Temperature

0.58

0.59

0.60

0.61

0.62

0.63

0.64

0.65

0.66

-40 -25 -10 5 20 35 50 65 80 95 110 12

5

Temperature (°C)

V

(RTTH) (V)

Figure 13. Trigger Voltage for Over-Temperature Protection VRTTH vs. Temperature

92

96

100

104

108

-40 -25 -10 5 20 35 50 65 80 95 110 125

Temperature (°C)

I

RT

(µA)

Figure 14. Output Current of RT Pin (IRT) vs. Temperature

SG5841J • Rev. 1.3.4 10

SG5841J — Highly Integrated Green-Mode PWM Controller

Functional Description

Startup Current

Typical startup current is only 14µA, which allows a

high-resistance and low-wattage startup resistor to

minimize power loss. For an AC/DC adapter with

universal input range, a 1.5MΩ, 0.25W startup resistor

and a 10µF/25V VDD hold-up capacitor are enough for

this application.

Operating Current

Operating current is around 4mA. The low operating

current enables better efficiency and reduces the

requirement of VDD hold-up capacitance.

Green-Mode Operation

The proprietary green-mode function provides off-time

modulation to continuously decrease the PWM

frequency under light-load conditions. To avoid acoustic

noise problems, the minimum PWM frequency is set

above 22KHz. Green mode dramatically reduces power

consumption under light-load and zero-load conditions.

Power supplies using a SG5841/J controller can meet

restrictive international regulations regarding standby

power consumption.

Oscillator Operation

A resistor connected from the RI pin to the GND pin

generates a constant current source for the SG5841/J

controller. This current is used to determine the center

PWM frequency. Increasing the resistance reduces

PWM frequency. Using a 26KΩ resistor, RI, results in a

corresponding 65KHz PWM frequency. The relationship

between RI and the switching frequency is:

(KHz)

)(K

I

R

1690

Ω

=

PWM

f (1)

The range of the PWM oscillation frequency is designed

as 47KHz ~ 109KHz.

SG5841J also integrates a frequency hopping function

internally. The frequency variation ranges from around

62KHz to 68KHz for a center frequency of 65KHz. The

frequency-hopping function helps reduce EMI emission

of a power supply with minimum line filters.

Current Sensing / PWM Current Li mi t ing

Peak-current-mode control is utilized in to regulate

output voltage and provide pulse-by-pulse current

limiting. The switch current is detected by a sense

resistor into the SENSE pin. The PWM duty cycle is

determined by this current-sense signal and the

feedback voltage. When the voltage on the SENSE pin

reaches around VCOMP = (VFB–1.0)/3.2, a switch cycle is

terminated immediately. VCOMP is internally clamped to a

variable voltage around 0.85V for output power limit.

Leading-Edge Blanking (LEB)

Each time the power MOSFET is switched on, a turn-on

spike occurs at the sense-resistor. To avoid premature

termination of the switching pulse, a leading-edge

blanking time is built in. During this blanking period, the

current-limit comparator is disabled and cannot switch

off the gate drive.

Under-Voltage Lockout ( UVLO )

The turn-on and turn-off thresholds are fixed internally

at 16V and 10V. During startup, the hold-up capacitor

must be charged to 16V through the startup resistor to

enable the IC. The hold-up capacitor continues to

supply VDD before the energy can be delivered from

auxiliary winding of the main transformer. VDD must not

drop below 10V during this startup process. This UVLO

hysteresis window ensures that hold-up capacitor is

adequate to supply VDD during startup.

Gate Output / Soft Driving

The SG5841/J BiCMOS output stage is a fast totem-

pole gate driver. Cross conduction has been avoided to

minimize heat dissipation, increase efficiency, and

enhance reliability. The output driver is clamped by an

internal 18V Zener diode to protect power MOSFET

transistors against undesirable gate over-voltage. A soft

driving waveform is implemented to minimize EMI.

Built- in Slope Compensation

The sensed voltage across the current-sense resistor is

used for peak-current-mode control and pulse-by-pulse

current limiting. Built-in slope compensation improves

stability or prevents sub-harmonic oscillation. SG5841/J

inserts a synchronized, positive-going ramp at every

switching cycle.

Constant Output Power Li mi t

When the SENSE voltage across the sense resistor,

RS, reaches the threshold voltage, around 0.85V, the

output GATE drive is turned off after delay, tPD. This

delay introduces additional current, proportional to tPD •

VIN / LP. The delay is nearly constant, regardless of the

input voltage VIN. Higher input voltage results in larger

additional current and the output power limit is higher

than under low-input line voltage. To compensate this

variation for a wide AC input range, a sawtooth power-

limiter (saw limiter) is designed to solve the unequal

power-limit problem. The saw limiter is designed as a

positive ramp signal (Vlimit_ramp) and fed to the inverting

input of the OCP comparator. This results in a lower

current limit at high-line inputs than at low-line inputs.

VDD Over-Voltage Clamping

VDD over-voltage clamping prevents damage due to

abnormal conditions. If VDD voltage is over the VDD over-

voltage clamping voltage (VDD-CLAMP) and lasts for tD-

VDDCLAMP, the PWM pulses are disabled until the VDD

drops below the VDD over-voltage clamping voltage.

SG5841J • Rev. 1.3.4 11

SG5841J — Highly Integrated Green-Mode PWM Controller

Thermal Protection

An NTC thermistor RNTC in series with a resistor RA can

be connected from the RT pin to ground. A constant

current IRT is output from pin RT. The voltage on the RT

pin can be expressed as VRT = IRT × (RNTC + RA), in

which IRT = 2 x (1.3V / RI). At high ambient temperature,

RNTC is smaller, such that VRT decreases. When VRT is

less than 0.62V, the PWM is completely turned off.

Limited Power Control

The FB voltage increases every time the output of the

power supply is shorted or overloaded. If the FB voltage

remains higher than a built-in threshold for longer than

tD-OLP, PWM output is turned off. As PWM output is

turned off, the supply voltage VDD begins decreasing.

)(K

I

R115.1

(ms) OLP-D t Ω×= (2)

When VDD goes below the turn-off threshold (e.g. 10V)

the controller totally shuts down. VDD is charged up to

the turn-on threshold voltage of 16V through the startup

resistor until PWM output is restarted. This protection

remains activated as long as the overloading condition

persists. This prevents the power supply from

overheating due to overloading conditions.

Noise Immunit y

Noise on the current-sense or control signal may cause

significant pulse-width jitter, particularly in the

continuous-conduction mode. Slope compensation

helps alleviate this problem. Good placement and

layout practices should be followed. Avoiding long PCB

traces and component leads, locating compensation

and filter components near SG5841/J, and increasing

power MOS gate resistance improve performance.

SG5841J • Rev. 1.3.4 12

SG5841J — Highly Integrated Green-Mode PWM Controller

Reference Circuit

1

2

3

CN1

R5

F1

C2

21

+

C4

R7

R1

C3

2

1

3

4

BD1

2 1

D2

1

23

Q2

R8

GND

1

FB

2

VIN

3

RI

4RT 5

SENSE 6

VDD 7

GATE 8

U1

SG5841/J

12

43

U2

C6 R4

1

3

2

Q1

21

+C7

21

D4

R9

R16

R13

R15

R14

R11

C10

21

+C9

VZ1 C1

1 2

3 4

L2

C11

R2

T1

R10

THER2

R3

C5

1 2

3 4

L1

R12

21

+C8

2 1

D3

A K

R

U3 VO+

1 2

L3

TR1

D1

R6

Vo+

C12

Figure 15. Reference Circuit

BOM

Reference Component Reference Component

BD1 BD 4A/600V Q2 MOS 7A/600V

C1 XC 0.68µF/300V R1, R2 R 1MΩ 1/4W

C2 XC 0.1µF/300V R3 R 100KW 1/2W

C3 CC 0.01µF/500V R4 R 47Ω 1/4W

C4 EC 120µ/400V R5, R7 R 750KΩ 1/4W

C5 YC 222p/250V R6 R 2KΩ 1/8W

C6 CC 1000pF/100V R8 R 0.3Ω 2W

C7 EC 1000µF/25V R9 R 33KΩ 1/8W

C8 EC 470µF/25V R10 R 4.7KΩ 1/8W 1%

C9 EC 10µF/50V R11 R 470Ω 1/8W

C10 CC 222pF/50V R12 R 0Ω 1/8W

C11 CC 470pF/50V R13 R 4.7KΩ 1/8W

C12 CC 102pF/50V (Option) R14 R 154KΩ 1/8W

D1 LED R15 R 39KΩ 1/8W

D2 Diode BYV95C R16 R 100Ω 1/8W

D3 TVS P6KE16A THER2 Thermistor TTC104

D4 Diode FR103 T1 Transformer (600µH-PQ2620)

F1 FUSE 4A/250V U1 IC SG5841/J

L1 Choke (900µH) U2 IC PC817

L2 Choke (10mH) U3 IC TL431

L3 Inductor (2µH) VZ1 VZ 9G

Q1 Diode 20A/100V

SG5841J • Rev. 1.3.4 13

SG5841J — Highly Integrated Green-Mode PWM Controller

Physical Dimensions

8°

0°

SEE DETAIL A

NOTES: UNLESS OTHERWISE SPECIFIED

A) THIS PACKAGE CONFORMS TO JEDEC

MS-012, VARIATION AA, ISSUE C,

B) ALL DIMENSIONS ARE IN MILLIMETERS.

C) DIMENSIONS DO NOT INCLUDE MOLD

FLASH OR BURRS.

D) LANDPATTERN STANDARD: SOIC127P600X175-8M.

E) DRAWING FILENAME: M08AREV13

LAND PATTERN RECOMMENDATION

SEATING PLANE

0.10 C

C

GAGE PLANE

x 45°

DETAIL A

SCALE: 2:1

PIN ONE

INDICATOR

4

8

1

C

MBA0.25

B

5

A

5.60

0.65

1.75

1.27

6.20

5.80

3.81

4.00

3.80

5.00

4.80

(0.33)

1.27

0.51

0.33

0.25

0.10

1.75 MAX

0.25

0.19

0.36

0.50

0.25

R0.10

0.90

0.406 (1.04)

OPTION A - BEVEL EDGE

OPTION B - NO BEVEL EDGE

Figure 16. 8-Pin Small Outline Package (SOP)

Pack age drawings are provided as a service to customers consideri ng Fai rchild components . Drawings may c hange i n any manner

without notice. P l ease note the revi sion and/or date on t he drawing and contac t a Fairchild S emiconductor represent ative to v er ify

or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically

the warranty therein, which covers Fairchild products.

Always visit Fairchild Semiconductor’ s online packaging area for the most recent package drawings:

http://www.fairchildsemi.com/packaging/.

SG5841J • Rev. 1.3.4 14

SG5841J — Highly Integrated Green-Mode PWM Controller

Physical Dimensions (Continued)

5.08 MAX

0.33 MIN

2.54

7.62

0.56

0.355

1.65

1.27

3.683

3.20

3.60

3.00

6.67

6.096

9.83

9.00

7.62

9.957

7.87

0.356

0.20

NOTES: UNLESS OTHERWISE SPECIFIED

A) THIS PACKAGE CONFORMS TO

JEDEC MS-001 VARIATION BA

B) ALL DIMENSIONS ARE IN MILLIMETERS.

C) DIMENSIONS ARE EXCLUSIVE OF BURRS,

MOLD FLASH, AND TIE BAR EXTRUSIONS.

D) DIMENSIONS AND TOLERANCES PER

ASME Y14.5M-1994

8.255

7.61

E) DRAWING FILENAME AND REVSION: MKT-N08FREV2.

(0.56)

Figure 17. 8-Pin Dual Inline Package (DIP)

Pack age drawings are provided as a service to customers consideri ng Fai rchild components . Drawings may c hange i n any manner

without notice. P l ease note the revi sion and/or date on t he drawing and contac t a Fairchild S emiconductor represent ative to v er ify

or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically

the warranty therein, which covers Fairchild products.

Always visit Fairchild Semiconductor’ s online packaging area for the most recent package drawings:

http://www.fairchildsemi.com/packaging/.

SG5841J • Rev. 1.3.4 15

SG5841J — Highly Integrated Green-Mode PWM Controller