White Microelectronics • (602) 437-1520 • www.whiteedc.com
4
SRAM MODULES
1
WS128K32V-XXX
128Kx32 3.3V SRAM MULTICHIP PACKAGE
PRELIMINARY*
■3.3 Volt Power Supply
■Low Power CMOS
■TTL Compatible Inputs and Outputs
■Built-in Decoupling Caps and Multiple Ground Pins for Low
Noise Operation
■ Weight
WS128K32V-XG2TX - 8 grams typical
WS128K32V-XG1UX - 5 grams typical
WS128K32V-XH1X - 13 grams typical
* This data sheet describes a product that is not fully qualified or
characterized and is subject ot change without notice.
** Commercial and Industrial temperature ranges only.
FEATURES
■Access Times of 15
**
, 17, 20, 25, 35ns
■Low Voltage Operation
■Packaging
• 66-pin, PGA Type, 1.075 inch square Hermetic Ceramic
HIP (Package 400)
• 68 lead, Hermetic CQFP (G2T), 22.4mm (0.880 inch) square
(Package 509), 4.57mm (0.180 inch) high. Designed to fit
JEDEC 68 lead 0.990" CQFJ footprint (Fig. 2)
• 68 lead, Hermetic CQFP (G1U), 23.8mm (0.940 inch)
square (Package 509), 3.56mm (0.140 inch) high.
■Organized as 128Kx32; User Configurable as 256Kx16 or
512Kx8
■Commercial, Industrial and Military Temperature Ranges
FIG. 1 PIN CONFIGURATION FOR WS128K32NV-XH1X
PIN DESCRIPTION
I/O0-31 Data Inputs/Outputs
A0-16 Address Inputs
WE1-4 Write Enables
CS1-4 Chip Selects
OE Output Enable
VCC Power Supply
GND Ground
NC Not Connected
I/O8
I/O9
I/O10
A13
A14
A15
A16
NC
I/O0
I/O1
I/O2
WE2
CS2
GND
I/O11
A10
A11
A12
VCC
CS1
NC
I/O3
I/O15
I/O14
I/O13
I/O12
OE
NC
WE1
I/O7
I/O6
I/O5
I/O4
I/O24
I/O25
I/O26
A6
A7
NC
A8
A9
I/O16
I/O17
I/O18
VCC
CS4
WE4
I/O27
A3
A4
A5
WE3
CS3
GND
I/O19
I/O31
I/O30
I/O29
I/O28
A0
A1
A2
I/O23
I/O22
I/O21
I/O20
11 22 33 44 55 66
1 12 23 34 45 56
TOP VIEW
BLOCK DIAGRAM
128K x 8
8
I/O
0-7
CS
1
128K x 8
8
I/O
8-15
2
128K x 8
8
I/O
16-23
3
128K x 8
8
I/O
24-31
4
A
0-16
OE
WE
CS
WE
CS
WE
CS
WE
1234
April 2001 Rev. 2
2
White Microelectronics • Phoenix, AZ • (602) 437-1520
4
SRAM MODULES
WS128K32V-XXX
PIN DESCRIPTION
128K x 8
8
I/O
0-7
CS
1
128K x 8
8
I/O
8-15
2
128K x 8
8
I/O
16-23
3
128K x 8
8
I/O
24-31
4
A
0-16
OE
WE
CS
WE
CS
WE
CS
WE
1234
BLOCK DIAGRAM
FIG. 2 PIN CONFIGURATION FOR WS128K32V-XG2TX AND WS128K32V-XG1UX
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
I/O
0
I/O
1
I/O
2
I/O
3
I/O
4
I/O
5
I/O
6
I/O
7
GND
I/O
8
I/O
9
I/O
10
I/O
11
I/O
12
I/O
13
I/O
14
I/O
15
V
CC
A
11
A
12
A
13
A
14
A
15
A
16
CS
1
OE
CS
2
NC
WE
2
WE
3
WE
4
NC
NC
NC
I/O
16
I/O
17
I/O
18
I/O
19
I/O
20
I/O
21
I/O
22
I/O
23
GND
I/O
24
I/O
25
I/O
26
I/O
27
I/O
28
I/O
29
I/O
30
I/O
31
NC
A
0
A
1
A
2
A
3
A
4
A
5
CS
3
GND
CS
4
WE
1
A
6
A
7
A
8
A
9
A
10
V
CC
TOP VIEW
I/O0-31 Data Inputs/Outputs
A0-16 Address Inputs
WE1-4 Write Enables
CS1-4 Chip Selects
OE Output Enable
VCC Power Supply
GND Ground
NC Not Connected
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SRAM MODULES
3
WS128K32V-XXX
CAPACITANCE
(TA = +25°C)
Parameter
Symbol
Conditions Max Unit
OE capacitance COE
V
IN
= 0 V, f = 1.0 MHz
50 pF
WE1-4 capacitance CWE
V
IN
= 0 V, f = 1.0 MHz
pF
HIP (PGA) 20
CQFP G2T/G1U 20
CS1-4 capacitance CCS
V
IN
= 0 V, f = 1.0 MHz
20 pF
Data I/O capacitance CI/O
V
I/O
= 0 V, f = 1.0 MHz
20 pF
Address input capacitance CAD
V
IN
= 0 V, f = 1.0 MHz
50 pF
This parameter is guaranteed by design but not tested.
TRUTH TABLEABSOLUTE MAXIMUM RATINGS
Parameter Symbol Min Max Unit
Operating Temperature TA-55 +125 °C
Storage Temperature TSTG -65 +150 °C
Signal Voltage Relative to GND VG-0.5 4.6 V
Junction Temperature TJ150 °C
Supply Voltage VCC -0.5 5.5 V
CS OE WE Mode Data I/O Power
H X X Standby High Z Standby
L L H Read Data Out Active
L X L Write Data In Active
L H H Out Disable High Z Active
RECOMMENDED OPERATING CONDITIONS
Parameter Symbol Min Max Unit
Supply Voltage VCC 3.0 3.6 V
Input High Voltage VIH 2.2 VCC + 0.3 V
Input Low Voltage VIL -0.3 +0.8 V
DC CHARACTERISTICS
(VCC = 3.3V ±0.3V, VSS = 0V, TA = -55°C to +125°C)
Parameter Sym Conditions Units
Min Max
Input Leakage Current ILI VIN = GND to VCC 10 µA
Output Leakage Current ILO CS = VIH, OE = VIH, VOUT = GND to VCC 10 µA
Operating Supply Current (x 32 Mode) ICC x 32 CS = VIL, OE = VIH, f = 5MHz 500 mA
Standby Current ISB CS = VIH, OE = VIH, f = 5MHz 32 mA
Output Low Voltage VOL IOL = 8mA 0.4 V
Output High Voltage VOH IOH = -4.0mA 2.4 V
4
White Microelectronics • Phoenix, AZ • (602) 437-1520
4
SRAM MODULES
WS128K32V-XXX
FIG. 3
AC TEST CIRCUIT
NOTES:
VZ is programmable from -2V to +7V.
IOL & IOH programmable from 0 to 16mA.
Tester Impedance Z0 = 75 Ω.
VZ is typically the midpoint of VOH and VOL.
IOL & IOH are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
I
Current Source
D.U.T.
C = 50 pf
eff
I
OL
V ≈ 1.5V
(Bipolar Supply)
Z
Current Source
OH
AC TEST CONDITIONS
Parameter Typ Unit
Input Pulse Levels VIL = 0, VIH = 3.0 V
Input Rise and Fall 5 ns
Input and Output Reference Level 1.5 V
Output Timing Reference Level 1.5 V
AC CHARACTERISTICS
(VCC = 3.3V, TA = -55°C to +125°C)
Parameter Symbol -15* -17 -20 -25 -35 Units
Read Cycle Min Max Min Max Min Max Min Max Min Max
Read Cycle Time tRC 15 17 20 25 35 ns
Address Access Time t AA 15 17 20 25 35 ns
Output Hold from Address Change tOH 0000 0ns
Chip Select Access Time tACS 15 17 20 25 35 ns
Output Enable to Output Valid tOE 10 11 12 15 20 ns
Chip Select to Output in Low Z tCLZ15555 5ns
Output Enable to Output in Low Z tOLZ15555 5ns
Chip Disable to Output in High Z tCHZ18 9 10 12 15 ns
Output Disable to Output in High Z tOHZ18 9 10 12 15 ns
1. This parameter is guaranteed by design but not tested.
* Commercial and Industrial only.
AC CHARACTERISTICS
(VCC = 3.3V, TA = -55°C to +125°C)
Parameter Symbol -15* -17 -20 -25 -35 Units
Write Cycle Min Max Min Max Min Max Min Max Min Max
Write Cycle Time tWC 15 17 20 25 35 ns
Chip Select to End of Write tCW 13 14 15 20 30 ns
Address Valid to End of Write tAW 13 14 15 20 30 ns
Data Valid to End of Write tDW 10 11 12 15 18 ns
Write Pulse Width tWP 13 14 15 20 30 ns
Address Setup Time tAS 00 0 0 0 ns
Address Hold Time tAH 00 0 0 0 ns
Output Active from End of Write tOW155 5 5 5 ns
Write Enable to Output in High Z tWHZ18 9 10 10 15 ns
Data Hold Time tDH 00 0 0 0 ns
1. This parameter is guaranteed by design but not tested.
* Commercial and Industrial only.
White Microelectronics • (602) 437-1520 • www.whiteedc.com
4
SRAM MODULES
5
WS128K32V-XXX
WS32K32-XHX
FIG. 4
TIMING WAVEFORM - READ CYCLE
FIG. 6
WRITE CYCLE - CS CONTROLLED
FIG. 5
WRITE CYCLE - WE CONTROLLED
ADDRESS
DATA I/O
WRITE CYCLE 1, WE CONTROLLED
t
AW
t
CW
t
AH
t
WP
t
DW
t
WHZ
t
AS
t
OW
t
DH
t
WC
DATA VALID
CS
WE
ADDRESS
DATA I/O
WRITE CYCLE 2, CS CONTROLLED
t
AW
t
AS
t
CW
t
AH
t
WP
t
DH
t
DW
t
WC
CS
WE
DATA VALID
ADDRESS
DATA I/O
READ CYCLE 2 (WE = V
IH
)
t
AA
t
ACS
t
OE
t
CLZ
t
OLZ
t
OHZ
t
RC
DATA VALID
HIGH IMPEDANCE
CS
OE
t
CHZ
ADDRESS
DATA I/O
READ CYCLE 1 (CS = OE = VIL, WE = VIH)
tAA
tOH
tRC
DATA VALIDPREVIOUS DATA VALID
6
White Microelectronics • Phoenix, AZ • (602) 437-1520
4
SRAM MODULES
WS128K32V-XXX
PACKAGE 400: 66 PIN, PGA TYPE, CERAMIC HEX-IN-LINE PACKAGE, HIP (H1)
27.3 (1.075) ± 0.25 (0.010) SQ
PIN 1 IDENTIFIER
SQUARE PAD
ON BOTTOM
25.4 (1.0) TYP
15.24 (0.600) TYP
0.76 (0.030) ± 0.13 (0.005)
4.34 (0.171)
MAX
3.81 (0.150)
± 0.13 (0.005)
2.54 (0.100)
TYP
25.4 (1.0) TYP
1.42 (0.056) ± 0.13 (0.005)
1.27 (0.050) TYP DIA
0.46 (0.018) ± 0.05 (0.002) DIA
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
White Microelectronics • (602) 437-1520 • www.whiteedc.com
4
SRAM MODULES
7
WS128K32V-XXX
PACKAGE 509: 68 LEAD, CERAMIC QUAD FLAT PACK, CQFP (G2T)
0.38 (0.015) ± 0.05 (0.002)
0.27 (0.011) ± 0.04 (0.002)
25.15 (0.990) ± 0.26 (0.010) SQ
1.27 (0.050) TYP
24.03 (0.946)
± 0.26 (0.010)
22.36 (0.880) ± 0.26 (0.010) SQ
20.3 (0.800) REF
4.57 (0.180) MAX
0.19 (0.007)
± 0.06 (0.002)
23.87
(0.940) REF
1.0 (0.040)
± 0.127 (0.005)
0.25 (0.010) REF
1° / 7°
R 0.25
(0.010)
DETAIL A
SEE DETAIL "A"
Pin 1
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
0.940"
TYP
The White 68 lead G2T CQFP
fills the same fit and function as
the JEDEC 68 lead CQFJ or 68
PLCC. But the G2T has the TCE
and lead inspection advantage
of the CQFP form.
PACKAGE 519: 68 LEAD, CERAMIC QUAD FLAT PACK, LOW PROFILE CQFP (G1U)
0.38 (0.015) ± 0.05 (0.002)
0.25 (0.010)
25.27 (0.995) ± 0.13 (0.005) SQ
1.27 (0.050)
23.88 (0.940) ± 0.25 (0.010) SQ
20.3 (0.800) REF
0.84 (0.033) REF
DETAIL A
SEE DETAIL "A"
3.56 (0.140) MAX
0.61 (0.024)
± 0.15 (0.006)
The White 68 lead G1U CQFP
fills the same fit and function as
the JEDEC 68 lead CQFJ or 68
PLCC. But the G1U has the TCE
and lead inspection advantage
of the CQFP form.
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
8
White Microelectronics • Phoenix, AZ • (602) 437-1520
4
SRAM MODULES
WS128K32V-XXX
LEAD FINISH:
Blank = Gold plated leads
A = Solder dip leads
DEVICE GRADE:
M= Military Screened -55°C to +125°C
I = Industrial -40°C to +85°C
C = Commercial 0°C to +70°C
PACKAGE TYPE:
H1 = Ceramic Hex-In-line Package, HIP (Package 400)
G2T = 22.4mm CQFP (Package 509)
G1U = 23.8mm Low Profile CQFP (Package 519)
ACCESS TIME (ns)
Low Voltage Supply 3.3V ± 10%
IMPROVEMENT MARK:
N = No Connect at pins 8, 21, 28, 39 in HIP for upgrade.
ORGANIZATION, 128Kx32
User configurable as 256Kx16 or 512Kx8
SRAM
WHITE ELECTRONIC DESIGNS CORP.
ORDERING INFORMATION
W S 128K 32 X V - XXX X X X
