November 2006 ASM5P2304A
rev 1.5
Notice: The information in this document is subject to change without notice.
PulseCore Semiconductor Corporation
1715 S. Bascom Ave Suite 200, Campbell, CA 95008 • Tel: 408-879-9077 • Fax: 408-879-9018
www.
p
ulsecoresemi.com
3.3V Zero Delay Buffer
Features
• Zero input - output propagation delay, adjustable
by capacitive load on FBK input.
• Multiple configurations - Refer “ASM5P2304A
Configurations Table”.
• Input frequency range: 15MHz to 133MHz
• Multiple low-skew outputs.
• Output-output skew less than 200pS.
• Device-device skew less than 500pS.
• Two banks of four outputs.
• Less than 200pS Cycle-to-Cycle jitter
(-1, -1H, -2, -2H).
• Available in space saving, 8 pin 150-mil SOIC
packages.
• 3.3V operation.
• Advanced 0.35µ CMOS technology.
• Industrial temperature available.
Functional Description
ASM5P2304A is a versatile, 3.3V zero-delay buffer
designed to distribute high-speed clocks in PC,
workstation, datacom, telecom and other high-performance
applications. It is available in 8 pin package. The part has
an on-chip PLL which locks to an input clock presented on
the REF pin. The PLL feedback is required to be driven to
FBK pin, and can be obtained from one of the outputs. The
input-to-output propagation delay is guaranteed to be less
than 250pS, and the output-to-output skew is guaranteed to
be less than 200pS.
The ASM5P2304A has two banks of two outputs each.
Multiple ASM5P2304A devices can accept the same input
clock and distribute it. In this case the skew between the
outputs of the two devices is guaranteed to be less than
500pS.
The ASM5P2304A is available in two different
configurations (Refer “ASM5P2304A Configurations Table).
The ASM5P2304A-1 is the base part, where the output
frequencies equal the reference if there is no counter in the
feedback path. The ASM5P2304A-1H is the high-drive
version of the -1 and the rise and fall times on this device
are much faster.
The ASM5P2304A-2 allows the user to obtain REF and
1/2X or 2X frequencies on each output bank. The exact
configuration and output frequencies depend on which
output drives the feedback pin.
Block Diagram
PLL
/
2Extra Divider
(
-2
)
CLKA2
CLKA1
FBK
CLKB1
CLKB2
REF
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3.3V Zero Delay Buffer 2 of 14
Notice: The information in this document is subject to change without notice.
ASM5P2304A Configurations
Device Feedback From Bank A Frequency Bank B Frequency
ASM5P2304A-1 Bank A or Bank B Reference Reference
ASM5P2304A-1H Bank A or Bank B Reference Reference
ASM5P2304A-2 Bank A Reference Reference /2
ASM5P2304A-2 Bank B 2 X Reference Reference
ASM5P2304A-2H Bank A Reference Reference/2
ASM5P2304A-2H Bank B 2 X Reference Reference
Zero Delay and Skew Control
For applications requiring zero input-output delay, all outputs must be equally loaded.
To close the feedback loop of the ASM5P2304A, the FBK
pin can be driven from any of the four available output
pins. The output driving the FBK pin will be driving a total
load of 7pF plus any additional load that it drives. The
relative loading of this output (with respect to the
remaining outputs) can adjust the input output delay. This
is shown in the above graph.
For applications requiring zero input-output delay, all
outputs including the one providing feedback should be
equally loaded. If input-output delay adjustments are
required, use the above graph to calculate loading
differences between the feedback output and remaining
outputs. For zero output-output skew, be sure to load
outputs equally.
-30 -25 -20 -15 -10 -5 0510 15 20 25 30
0
-500
-1000
-1500
500
1000
1500
Output Load Difference: FBK Load - CLKA/CLKB Load (pF)
REF-Input to CLKA / CLKB Delay (pS)
REF Input to CLKA/CLKB Delay Vs Difference in Loading between FBK pin and CLKA/CLKB pins
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Notice: The information in this document is subject to change without notice.
Pin Configuration
Pin Description for ASM5P2304A
Pin # Pin Name Description
1 REF1 Input reference frequency, 5V tolerant input
2 CLKA12 Buffered clock output, bank A
3 CLKA22 Buffered clock output, bank A
4 GND Ground
5 CLKB12 Buffered clock output, bank B
6 CLKB2
2 Buffered clock output, bank B
7 VDD 3.3V supply
8 FBK PLL feedback input
Notes:
1. Weak pull-down.
2. Weak pull-down on all outputs.
A
SM5P2304
A
5
6
7
8FBK
VDD
CLKB2
CLKB1
4
3
2
1
GND
CLKA1
REF
CLKA2
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Notice: The information in this document is subject to change without notice.
Absolute Maximum Ratings
Parameter Min Max Unit
Supply Voltage to Ground Potential -0.5 +7.0 V
DC Input Voltage (Except REF) -0.5 VDD + 0.5 V
DC Input Voltage (REF) -0.5 7 V
Storage Temperature -65 +150 °C
Max. Soldering Temperature (10 sec) 260 °C
Junction Temperature 150 °C
Static Discharge Voltage
(As per JEDEC STD22- A114-B) 2000 V
Note: These are stress ratings only and functional usage is not implied. Exposure to absolute maximum ratings for prolonged periods can affect device
reliability.
Operating Conditions for ASM5P2304A Commercial Temperature Devices
Parameter Description Min Max Unit
VDD Supply Voltage 3.0 3.6 V
TA Operating Temperature (Ambient Temperature) 0 70 °C
CL Load Capacitance, from 15MHz to 100MHz 30 pF
CL Load Capacitance, from 100MHz to 133MHz 15 pF
CIN Input Capacitance3 7 pF
Note:
3. Applies to both Ref Clock and FBK.
November 2006 ASM5P2304A
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Notice: The information in this document is subject to change without notice.
Electrical Characteristics for ASM5P2304A Commercial Temperature Devices
Parameter Description Test Conditions Min Max Unit
VIL Input LOW Voltage 0.8 V
VIH Input HIGH Voltage 2.0 V
IIL Input LOW Current VIN = 0V 50.0 µA
IIH Input HIGH Current VIN = VDD 100.0 µA
VOL Output LOW Voltage 4 IOL = 8mA (-1, -2)
IOH = 12mA (-1H, -2H) 0.4 V
VOH Output HIGH Voltage 4 IOL = -8mA (-1, -2)
IOH = -12mA (-1H, -2H) 2.4 V
Unloaded outputs 100MHz REF,
Select inputs at VDD or GND 45.0
Unloaded outputs, 66MHz REF
(-1, -1H, -2, -2H) 32.0
IDD Supply Current
Unloaded outputs, 33MHz REF
(-1, -1H, -2, -2H) 18.0
mA
Note:
4. Parameter is guaranteed by design and characterization. Not 100% tested in production.
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Notice: The information in this document is subject to change without notice.
Switching Characteristics for ASM5P2304A Commercial Temperature Devices
Parameter Description Test Conditions Min Typ Max Unit
1/t1 Output Frequency 30pF load, -1H, -2H devices 15 133 MHz
1/t1 Output Frequency 15pF load, -1, -2 devices 15 133 MHz
Duty Cycle5= (t2 / t1) * 100
(-1, -2, -1H, -2H)
Measured at 1.4V, FOUT = 66.66MHz
30pF load 40.0 50.0 60.0 %
Duty Cycle5 = (t2 / t1) * 100
(-1, -2,-1H, -2H)
Measured at 1.4V, FOUT = <50MHz
15 pF load 45.0 50.0 55.0 %
t3 Output Rise Time5
(-1, -2)
Measured between 0.8V and 2.0V
30pF load 2.20 nS
t3 Output Rise Time5
(-1, -2)
Measured between 0.8V and 2.0V
15pF load 1.50 nS
t3 Output Rise Time5
(-1H, -2H)
Measured between 0.8V and 2.0V
30pF load 1.50 nS
t4 Output Fall Time 5
(-1, -2)
Measured between 2.0V and 0.8V
30pF load 2.20 nS
t4 Output Fall Time 5
(-1, -2)
Measured between 2.0V and 0.8V
15pF load 1.50 nS
t4 Output Fall Time5
(-1H, -2H)
Measured between 2.0V and 0.8V
30pF load 1.25 nS
Output-to-output skew on same bank (-1, -2)5 All outputs equally loaded 200
Output-to-output skew (-1H, -2H) All outputs equally loaded 200
Output bank A -to- output bank B skew
(-1, -2H) All outputs equally loaded 200
t5
Output bank A to output Bank B skew (-2) All outputs equally loaded 400
pS
t6 Delay, REF Rising Edge to FBK Rising Edge5 Measured at VDD /2 0 ±250 pS
t7 Device-to-Device Skew5 Measured at VDD/2 on the FBK pins of the device 0 500 pS
t8 Output Slew Rate5 Measured between 0.8V and 2.0V using
Test Circuit #2 1 V/nS
Measured at 66.67MHz, loaded outputs,
15pF load 175
Measured at 66.67MHz, loaded outputs,
30pF load 200
tJ Cycle-to-cycle jitter 5
(-1, -1H, -2H)
Measured at 25MHz, loaded outputs,
15pF load 100
pS
Measured at 66.67MHz, loaded outputs, 30pF load 400
tJ Cycle-to-cycle jitter 5
(-2) Measured at 66.67MHz, loaded outputs,
15pF load 375
pS
tLOCK PLL Lock Time 5 Stable power supply, valid clock presented on REF
and FBK pins 1.0 mS
Note:
5. Parameter is guaranteed by design and characterization. Not 100% tested in production.
November 2006 ASM5P2304A
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Notice: The information in this document is subject to change without notice.
Operating Conditions for ASM5I2304A Industrial Temperature Devices
Parameter Description Min Max Unit
VDD Supply Voltage 3.0 3.6 V
TA Operating Temperature (Ambient Temperature) -40 85 °C
CL Load Capacitance, from 15MHz to 100MHz 30 pF
CL Load Capacitance, from 100MHz to 133MHz 15 pF
CIN Input Capacitance6 7 pF
Note:
6. Applies to both Ref Clock and FBK.
Electrical Characteristics for ASM5I2304A Industrial Temperature Devices
Parameter Description Test Conditions Min Max Unit
VIL Input LOW Voltage 0.8 V
VIH Input HIGH Voltage 2.0 V
IIL Input LOW Current VIN = 0V 50.0 µA
IIH Input HIGH Current VIN = VDD 100.0 µA
VOL Output LOW Voltage 7 IOL = 8mA (-1, -2)
IOH = 12mA (-1H, -2H) 0.4 V
VOH Output HIGH Voltage 7 IOL = -8mA (-1, -2)
IOH = -12mA (-1H, -2H) 2.4 V
Unloaded outputs 100MHz REF,
Select inputs at VDD or GND 45.0
Unloaded outputs, 66MHz REF
(-1, -2) 35.0
IDD Supply Current
Unloaded outputs, 33MHz REF
(-1, -2) 20.0
mA
Note:
7. Parameter is guaranteed by design and characterization. Not 100% tested in production.
November 2006 ASM5P2304A
rev 1.5
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Notice: The information in this document is subject to change without notice.
Switching Characteristics for ASM5I2304A Industrial Temperature Devices
All parameters are specified with loaded outputs
Parameter Description Test Conditions Min Typ Max Unit
1/t1 Output Frequency 30pF load, -1H, -2H devices 15 133 MHz
1/t1 Output Frequency 15pF load, -1 and -2 devices 15 133 MHz
Duty Cycle8 = (t2 / t1) * 100
(-1, -2, -1H, -2H)
Measured at 1.4V, FOUT = <66.66MHz
30pF load 40.0 50.0 60.0 %
Duty Cycle8= (t2 / t1) * 100
(-1, -2, -1H, -2H)
Measured at 1.4V, FOUT = <50 MHz
15pF load 45.0 50.0 55.0 %
t3 Output Rise Time8
(-1, -2)
Measured between 0.8V and 2.0V
30pF load 2.50 nS
t3 Output Rise Time8
(-1, -2)
Measured between 0.8V and 2.0V
15pF load 1.50 nS
t3 Output Rise Time8
(-1H, -2H)
Measured between 0.8V and 2.0V
30pF load 1.50 nS
t4 Output Fall Time8
(-1, -2)
Measured between 2.0V and 0.8V
30pF load 2.50 nS
t4 Output Fall Time8
(-1, -2)
Measured between 2.0V and 0.8V
15pF load 1.50 nS
t4 Output Fall Time8
(-1H, -2H)
Measured between 2.0V and 0.8V
30pF load 1.25 nS
Output-to-output skew on same bank (-1, -2)8 All outputs equally loaded 200
Output-to-output skew
(-1H, -2H) All outputs equally loaded 200
Output bank A -to- output bank B skew (-1, -2H) All outputs equally loaded 200
t5
Output bank A -to- output bank B skew (-2) All outputs equally loaded 400
pS
t6 Delay, REF Rising Edge to FBK Rising Edge8 Measured at VDD /2 0 ±250 pS
t7 Device-to-Device Skew8 Measured at VDD/2 on the FBK pins of the
device 0 500 pS
t8 Output Slew Rate8 Measured between 0.8V and 2.0V using
Test Circuit #2 1 V/nS
Measured at 66.67MHz, loaded outputs,
15pF load 180
Measured at 66.67MHz, loaded outputs,
30pF load 200
tJ Cycle-to-cycle jitter 8
(-1, -1H, -2H)
Measured at 25MHz, loaded outputs,
15pF load 100
pS
Measured at 66.67MHz, loaded outputs,
30pF load 400
tJ Cycle-to-cycle jitter8
(-2)
Measured at 66.67MHz, loaded outputs,
15pF load 380
pS
tLOCK PLL Lock Time8 Stable power supply, valid clock presented
on REF and FBK pins 1.0 mS
Note: 8. Parameter is guaranteed by design and characterization. Not 100% tested in production.
November 2006 ASM5P2304A
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3.3V Zero Delay Buffer 9 of 14
Notice: The information in this document is subject to change without notice.
Switching Waveforms
Duty Cycle Timing
All Outputs Rise/Fall Time
Output - Output Skew
Input - Output Propagation Delay
Device - Device Skew
t1
t
2
1.4 V 1.4 V 1.4 V
2.0 V
0.8 V
t3 t4
3.3 V
0 V
2.0 V
0.8 V
1.4 V
1.4 V
t
5
VDD /2
t
6
INPUT
VDD /2
VDD /2
t
7
VDD /2
CLKOUT, Device 1
CLKOUT, Device 2
OUTPUT1
OUTPUT2
OUTPUT
OUTPUT
November 2006 ASM5P2304A
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3.3V Zero Delay Buffer 10 of 14
Notice: The information in this document is subject to change without notice.
Test Circuits
VDD
GND
CLKOUT
CLOAD
OUTPUT
TEST CIRCUIT #1
0.1uF
+3.3V
VDD
GND
10pF
OUTPUT
TEST CIRCUIT # 2
1KΩ
1KΩ
For parameter t8 (output skew rate) on -1H devices
0.1uF
+3.3V
CLOAD
CLKOUT
November 2006 ASM5P2304A
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3.3V Zero Delay Buffer 11 of 14
Notice: The information in this document is subject to change without notice.
Package Information
8-lead (150-mil) SOIC Package
D
EH
D
A1
A2
A
θ
L
C
B
e
Dimensions
Inches Millimeters
Symbol
Min Max Min Max
A1 0.004 0.010 0.10 0.25
A 0.053 0.069 1.35 1.75
A2 0.049 0.059 1.25 1.50
B 0.012 0.020 0.31 0.51
C 0.007 0.010 0.18 0.25
D 0.193 BSC 4.90 BSC
E 0.154 BSC 3.91 BSC
e 0.050 BSC 1.27 BSC
H 0.236 BSC 6.00 BSC
L 0.016 0.050 0.41 1.27
θ 0° 8° 0° 8°
November 2006 ASM5P2304A
rev 1.5
3.3V Zero Delay Buffer 12 of 14
Notice: The information in this document is subject to change without notice.
Ordering Codes
Ordering Code Marking Package Type Temperature
ASM5P2304AF-1-08-SR 5P2304AF-1 8-pin 150-mil SOIC-TAPE & REEL, Pb free Commercial
ASM5P2304AF-1-08-ST 5P2304AF-1 8-pin 150-mil SOIC-TUBE, Pb free Commercial
ASM5I2304AF-1-08-SR 5I2304AF-1 8-pin 150-mil SOIC-TAPE & REEL, Pb free Industrial
ASM5I2304AF-1-08-ST 5I2304AF-1 8-pin 150-mil SOIC-TUBE, Pb free Industrial
ASM5P2304AF-1H-08-SR 5P2304AF-1H 8-pin 150-mil SOIC-TAPE & REEL, Pb free Commercial
ASM5P2304AF-1H-08-ST 5P2304AF-1H 8-pin 150-mil SOIC-TUBE, Pb free Commercial
ASM5I2304AF-1H-08-SR 5I2304AF-1H 8-pin 150-mil SOIC-TAPE & REEL, Pb free Industrial
ASM5I2304AF-1H-08-ST 5I2304AF-1H 8-pin 150-mil SOIC-TUBE, Pb free Industrial
ASM5P2304AF-2-08-SR 5P2304AF-2 8-pin 150-mil SOIC-TAPE & REEL, Pb free Commercial
ASM5P2304AF-2-08-ST 5P2304AF-2 8-pin 150-mil SOIC-TUBE, Pb free, Pb free Commercial
ASM5I2304AF-2-08-SR 5I2304AF-2 8-pin 150-mil SOIC-TAPE & REEL, Pb free Industrial
ASM5I2304AF-2-08-ST 5I2304AF-2 8-pin 150-mil SOIC-TUBE, Pb free Industrial
ASM5P2304AF-2H-08-SR 5P2304AF-2H 8-pin 150-mil SOIC-TAPE & REEL, Pb free Commercial
ASM5P2304AF-2H-08-ST 5P2304AF-2H 8-pin 150-mil SOIC-TUBE, Pb free Commercial
ASM5I2304AF-2H-08-SR 5I2304AF-2H 8-pin 150-mil SOIC-TAPE & REEL, Pb free Industrial
ASM5I2304AF-2H-08-ST 5I2304AF-2H 8-pin 150-mil SOIC-TUBE, Pb free Industrial
ASM5P2304AG-1-08-SR 5P2304AG-1 8-pin 150-mil SOIC-TAPE & REEL, Green Commercial
ASM5P2304AG-1-08-ST 5P2304AG-1 8-pin 150-mil SOIC-TUBE, Green Commercial
ASM5I2304AG-1-08-SR 5I2304AG-1 8-pin 150-mil SOIC-TAPE & REEL, Green Industrial
ASM5I2304AG-1-08-ST 5I2304AG-1 8-pin 150-mil SOIC-TUBE, Green Industrial
ASM5P2304AG-1H-08-SR 5P2304AG-1H 8-pin 150-mil SOIC-TAPE & REEL, Green Commercial
ASM5P2304AG-1H-08-ST 5P2304AG-1H 8-pin 150-mil SOIC-TUBE, Green Commercial
ASM5I2304AG-1H-08-SR 5I2304AG-1H 8-pin 150-mil SOIC-TAPE & REEL, Green Industrial
ASM5I2304AG-1H-08-ST 5I2304AG-1H 8-pin 150-mil SOIC-TUBE, Green Industrial
ASM5P2304AG-2-08-SR 5P2304AG-2 8-pin 150-mil SOIC-TAPE & REEL, Green Commercial
ASM5P2304AG-2-08-ST 5P2304AG-2 8-pin 150-mil SOIC-TUBE, Green Commercial
ASM5I2304AG-2-08-SR 5I2304AG-2 8-pin 150-mil SOIC-TAPE & REEL, Green Industrial
ASM5I2304AG-2-08-ST 5I2304AG-2 8-pin 150-mil SOIC-TUBE, Green Industrial
ASM5P2304AG-2H-08-SR 5P2304AG-2H 8-pin 150-mil SOIC-TAPE & REEL, Green Commercial
ASM5P2304AG-2H-08-ST 5P2304AG-2H 8-pin 150-mil SOIC-TUBE, Green Commercial
ASM5I2304AG-2H-08-SR 5I2304AG-2H 8-pin 150-mil SOIC-TAPE & REEL, Green Industrial
ASM5I2304AG-2H-08-ST 5I2304AG-2H 8-pin 150-mil SOIC-TUBE, Green Industrial
November 2006 ASM5P2304A
rev 1.5
3.3V Zero Delay Buffer 13 of 14
Notice: The information in this document is subject to change without notice.
Device Ordering Information
ASM5P2304AF-08-SR
Licensed under US patent #5,488,627, #6,646,463 and #5,631,920.
O = SOT U = MSOP
S = SOIC E = TQFP
T = TSSOP L = LQFP
A = SSOP U = MSOP
V = TVSOP P = PDIP
B = BGA D = QSOP
Q
=
Q
FN X = SC-70
DEVICE PIN COUNT
X= Automotive I= Industrial P or n/c = Commercial
(-40C to +125C) (-40C to +85C) (0C to +70C)
1 = Reserved 6 = Power Management
2 = Non PLL based 7 = Power Management
3 = EMI Reduction 8 = Power Management
4 = DDR support products 9 = Hi Performance
5
=
S
TD Z
er
o
D
e
l
ay
B
u
ff
er
0
= R
ese
rv
ed
PulseCore Semiconductor Mixed Signal Product
PART NUMBER
F = LEAD FREE AND RoHS COMPLIANT PART
G = GREEN PACKAGE, LEAD FREE, and RoHS
R = Tape & Reel, T = Tube or Tray
November 2006 ASM5P2304A
rev 1.5
3.3V Zero Delay Buffer 14 of 14
Notice: The information in this document is subject to change without notice.
© Copyright 2006 PulseCore Semiconductor Corporation. All rights reserved. Our logo and name are trademarks or
registered trademarks of PulseCore Semiconductor. All other brand and product names may be the trademarks of their
respective companies. PulseCore reserves the right to make changes to this document and its products at any time without
notice. PulseCore assumes no responsibility for any errors that may appear in this document. The data contained herein
represents PulseCore’s best data and/or estimates at the time of issuance. PulseCore reserves the right to change or
correct this data at any time, without notice. If the product described herein is under development, significant changes to
these specifications are possible. The information in this product data sheet is intended to be general descriptive
information for potential customers and users, and is not intended to operate as, or provide, any guarantee or warrantee to
any user or customer. PulseCore does not assume any responsibility or liability arising out of the application or use of any
product described herein, and disclaims any express or implied warranties related to the sale and/or use of PulseCore
products including liability or warranties related to fitness for a particular purpose, merchantability, or infringement of any
intellectual property rights, except as express agreed to in PulseCore’s Terms and Conditions of Sale (which are available
from PulseCore). All sales of PulseCore products are made exclusively according to PulseCore’s Terms and Conditions of
Sale. The purchase of products from PulseCore does not convey a license under any patent rights, copyrights; mask works
rights, trademarks, or any other intellectual property rights of PulseCore or third parties. PulseCore does not authorize its
products for use as critical components in life-supporting systems where a malfunction or failure may reasonably be
expected to result in significant injury to the user, and the inclusion of PulseCore products in such life-supporting systems
implies that the manufacturer assumes all risk of such use and agrees to indemnify PulseCore against all claims arising
from such use.
PulseCore Semiconductor Corporation
1715 S. Bascom Ave Suite 200
Campbell, CA 95008
Tel: 408-879-9077
Fax: 408-879-9018
www.pulsecoresemi.com
Copyright © PulseCore Semiconductor
All Rights Reserved
Part Number: ASM5P2304A
Document Version: 1.5
Note: This product utilizes US Patent # 6,646,463 Impedance Emulator Patent issued to PulseCore Semiconductor, dated 11-11-2003
