REVISIONS
LTR DESCRIPTION DATE (YR-MO-DA) APPROVED
A
Add vendor CAGE number 9Z527. Pag es 4 a nd 5: Changes in
electrical table.
Editorial changes throughout. 88-04-06 M. A. Frye
B
Add vendor CAGE 95569 for device type 01. Add device type 02.
Delete
vendor CAGE 9Z527. Add case outline S for device types 01 and 02.
Editorial changes throughout.
89-04-11 M. A. Frye
C
Add vendor CAGE 9Z527 for device type 01. Add vendor CAGE
27014 for
device type 01. Add vendor CAGE 75569 for device type 02.
Technical
changes in table I. Editorial changes throughout.
89-12-07 M. A. Frye
D Update boilerplate changes to MIL-PRF - 38535 requirements. Editorial
changes throughout. – LTG 03-08-26 Thomas M. Hess
E Correct test condition for total supply current (ICCT) and add footnote 5/ in
table I. Update boilerplate paragraphs as specified in current requirements of
MIL-PRF-38535. – MAA. 10-01-25 Thomas M. Hess
REV
SHEET
REV
SHEET
REV STATUS REV E E E E E E E E E E E E
OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12
PMIC N/A PREPARED BY
Marcia B. Kelleher
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 4321 8
http://www.dscc.dla.mil
STANDARD MICROCIRCUIT
DRAWING CHECKED BY
Monica L. Poelking
THIS DRAWING IS
AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
APPROVED BY
Michael A. Frye
MICROCIRCUIT, DIGITAL, FAST CMOS,
NONINVERTING OCTAL BUS TRANSCEIVER
WITH THREE-STATE OUTPUTS, MONOLITHIC
SILICON
DRAWING APPROVAL DATE
87-11-06
AMSC N/A
REVISION LEVEL
E
SIZE
A CAGE CODE
67268
5962-87629
SHEET 1 OF 12
DSCC FORM 2233
APR 97 5962-E129-10
.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
5962-87629
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990 REVISION LEVEL
E SHEET 2
DSCC FORM 2234
APR 97
1. SCOPE
1.1 Scope. This drawing describes device requireme nts for MIL-STD-883 compliant, non-JAN class level B microcircuits in
accordance with MIL-PRF-38535, appendix A.
1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example:
5962-87629 01 R A
Drawing number Device type
(see 1.2.1) Case outline
(see 1.2.2) Lead finish
(see 1.2.3)
1.2.1 Device type(s). The device type(s) identify the circuit function as follows:
Device type Generic number Circuit function
01 54FCT245 Non-inverting octal bus transceiver with
three-state outputs, TTL compatible inputs
02 54FCT245A Non-inverting octal bus transceiver with
three-state outputs, TTL compatible inputs
1.2.2 Case outline(s). The case outline(s) are as desi gn ated in MIL-STD-1835 and as follows:
Outline letter Descriptive designator Terminals Package style
R GDIP1-T20 or CDIP2-T20 20 Dual-in-line package
S GDFP2-F20 or CDFP3-F20 20 Flat pack
2 CQCC1-N20 20 Square chip carrier package
1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appe ndix A.
1.3 Absolute maximum ratings. 1/
Supply voltage range ........................................................... -0.5 V dc to +6.0 V dc
Input voltage range .............................................................. -0.5 V dc to VCC + 0.5 V dc
Output voltage range ............................................................ -0.5 V dc to VCC + 0.5 V dc
I/O voltage range .................................................................. -0.5 V dc to VCC + 0.5 V dc
DC input diode current (IIK) ................................................... -20 mA
DC output diode current (IOK) ............................................... -50 mA
DC output current ................................................................. 100 mA
Maximum power dissipation (PD) 2/ .................................... 500 mW
Thermal resistance, junction-to-case (JC) ........................... See MIL-STD-1835
Storage temperature range .................................................. -65C to +150C
Junction temperature (TJ) ..................................................... +175C
Lead temperature (soldering, 10 seconds) ........................... +300C
1.4 Recommended operating conditions.
Supply voltage range (VCC) .................................................. +4.5 V dc to +5.5 V dc
Maximum low level input voltage (VIL) .................................. 0.8 V dc
Minimum high level input voltage (VIH) ................................. 2.0 V dc
Case operating temperature rang e (TC) ............................... -55C to +125C
1/ All voltages referenced to GND.
2/ Must withstand the added PD due to short circuit test, e.g.; IOS.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
5962-87629
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990 REVISION LEVEL
E SHEET 3
DSCC FORM 2234
APR 97
2. APPLICABLE DOCUMENTS
2.1 Government specification, standards, and han dbooks. The following specification, standards, and handbooks form a part
of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the
solicitation or contract.
DEPARTMENT OF DEFENSE SPECIFICATION
MIL-PRF-38535 - Integrated Circuits Manufacturing, General Specification for.
DEPARTMENT OF DEFENSE STANDARDS
MIL-STD-883 - Test Method Standard Microcircuits.
MIL-STD-1835 - Interface Standard Electronic Component Case Outlines.
DEPARTMENT OF DEFENSE HANDBOOKS
MIL-HDBK-103 - List of Standard Microcircuit Drawings.
MIL-HDBK-780 - Standard Microcircuit Drawings.
(Copies of these documents ar e available online at https://assist.daps.dla.mil/quicksearch/ or from the Standardization
Document Order Desk, 700 Robbins Avenue , Building 4D, Philadelphia, PA 19111-5094.)
2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text
of this drawing takes precedence. Nothing in this document, however, supersedes applicabl e laws and regulations unless a
specific exemption has been obtained.
3. REQUIREMENTS
3.1 Item requirements. The individual item requirements shall be in accordanc e with MIL-PRF-38535, appendix A for
non-JAN class level B devices and as specified herein. Product built to this dra wing that is produced by a Qualified
Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional
certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program
plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality
Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit,
or function of the device. These modifications shall not affect the PIN as described herein. A "Q" or "QML" certification
mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used.
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified
in MIL-PRF-38535, appendix A and herein.
3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.2 herein.
3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1.
3.2.3 Truth table. The truth table shall be as specified on figure 2.
3.2.4 Logic diagram. The logic diagram shall be as specified on figur e 3.
3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4.
3.3 Electrical performance characteristics . Unless otherwise specified he r ein, the electri c al performance characteristics are
as specified in table I and shall apply over the full case operating temperature range.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
5962-87629
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990 REVISION LEVEL
E SHEET 4
DSCC FORM 2234
APR 97
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical
tests for each subgroup are described in tabl e I.
3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN
listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked. For packages where marking of the entire SMD
PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the devic e.
3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance
to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a "Q" or "QML" certification mark in
accordance with MIL-PRF-38535 to identify when the QML flow option is used.
3.6 Certificate of compliance. A certificate of compliance sh all be required from a manufacturer in order to be listed as an
approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to
listing as an approved source of supply shall affirm that the manufacturer's product meets the requirements of
MIL-PRF-38535, appendix A and the requirements herein.
3.7 Certificate of conformance. A certificate of conformance as require d in MIL-PRF-38535, appendix A shall b e provided
with each lot of microcircuits deliver ed to this drawing.
3.8 Notification of change. Notification of change to DSCC-VA shall be required in accordance with MIL-PRF-38535,
appendix A.
3.9 Verification and review. DSCC, DSCC's agent, and the acquiring activity retain the option to review the manufacturer's
facility and applicable required documentation. Offshore documentation shall be made availa ble onshore at the option of the
reviewer.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
5962-87629
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990 REVISION LEVEL
E SHEET 5
DSCC FORM 2234
APR 97
TABLE I. Electrical performance characteristi c s.
Test
Symbol Conditions
-55C TC +125C
VCC = 5.0 V dc 10%
unless otherwise specified
Group A
subgroups
Device
type
Limits Unit
Min Max
High level output voltage VOH V
CC = 4.5 V
VIL = 0.8 V
VIH = 2.0 V
IOH = -300 A 1, 2, 3 All 4.3 V
IOH = -12 mA 1, 2, 3 All 2.4
Low level output voltage
(port A) VOL1 V
CC = 4.5 V
VIL = 0.8 V
VIH = 2.0 V
IOL = +300 A 1, 2, 3 All 0.2 V
IOL = +48 mA 1, 2, 3 All 0.55
Low level output voltage
(port B) VOL2 V
CC = 4.5 V
VIL = 0.8 V
VIH = 2.0 V
IOL = +300 A 1, 2, 3 All 0.2 V
IOL = +48 mA 1, 2, 3 All 0.55
Input clamp voltage VIK V
CC = 4.5 V, IIN = -18 mA 1 All -1.2 V
High level input current IIH1 V
CC = 5.5 V, VIN = 5.5 V 1, 2, 3 All 5.0 A
High level input current
for common I/O pins IIH2 V
CC = 5.5 V, VIN = 5.5 V 1, 2, 3 All 20 A
Low level input current IIL1 V
CC = 5.5 V, VIN = GND 1, 2, 3 All -5.0 A
Low level input current
for common I/O pins IIL2 V
CC = 5.5 V, VIN = GND 1, 2, 3 All -20 A
Short circuit output
current IOS
1/ VCC = 5.5 V 1, 2, 3 All -60 mA
Quiescent power supply
current (CMOS inputs) ICCQ VIN 0.2 V or VIN 5.3 V
VCC = 5.5 V, fi = 0 MHz 1, 2, 3 All 1.5 mA
Quiescent power supply
current (TTL inputs) ICC
2/ VCC = 5.5 V
VIN = 3.4 V 1, 2, 3 All 2.0 mA
Dynamic power supply
current ICCD
3/ VCC = 5.5 V
Outputs open
T/R
= VCC
One bit toggling
50% duty cycle
VIN 5.3 V or VIN 0.2 V
OE
= GND
All 0.4
mA/MHz
See footnotes at end of table.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
5962-87629
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990 REVISION LEVEL
E SHEET 6
DSCC FORM 2234
APR 97
TABLE I. Electrical performance characteristi c s – Continued.
Test Symbol
Conditions
-55C TC +125C
VCC = 5.0 V dc 10%
unless otherwise specified
Group A
subgroups Device
type Limits Unit
Min Max
Total power supply current ICC
4/ 5/ VCC = 5.5 V
Outputs open
T/R
= OE
= GND
One bit toggling
50% duty cycle
VIN 5.3 V or VIN 0.2 V
fi = 10 MHz
1, 2, 3 All 5.5 mA
VCC = 5.5 V
Outputs open
T/R
= OE
= GND
Eight bits toggling
50% duty cycle
VIN = 3.4 V or VIN = GND
fi = 2.5 MHz
1, 2, 3 All 6.0 mA
Input capacitance CIN See 4.3.1c 4 All 10 pF
I/O capacitance CI/O See 4.3.1c 4 All 12 pF
Functional tests See 4.3.1d 7, 8 All
Propagation delay time,
inputs to outputs tPLH,
tPHL CL = 50 pF
RL = 500
See figure 4
6/
9, 10, 11 01 1.5 7.5 ns
9, 10, 11 02 1.5 4.9
Output enable time,
OE
to An or Bn tPZH,
tPZL 9, 10, 11 01 1.5 10.0 ns
9, 10, 11 02 1.5 6.5
Output disable time,
OE
to An or Bn tPHZ,
tPLZ 9, 10, 11 01 1.5 10.0 ns
9, 10, 11 02 1.5 6.0
1/ Not more than one output should be shorted at one time, and the duration of the short circuit condition should not exceed
one second.
2/ TTL driven input (VIN = 3.4 V); all other inputs at VCC or GND.
3/ This parameter is not directly testable, but is derived for use in total power supply calculations.
4/ ICC = ICCQ + (ICC x DH x NT) + (ICCD x fI x NI)
Where: DH = Duty cycle for TTL inputs high.
NT = Number of TTL inputs at DH.
fi = Input frequency in MHz.
NI = Number of inputs at fI.
5/ For total current supply (ICCT) test in an ATE environment, the effect of parasitic output capacitive loa din g from the test
environment must be taken into account, as its effect is not intended to be included in the test results. The impact must be
characterized and appropriate offset factors must be applied to the test result.
6/ The minimum limits are guaranteed, if not tested, to the specified limi t s.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
5962-87629
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990 REVISION LEVEL
E SHEET 7
DSCC FORM 2234
APR 97
Device types 01 and 02
Case outlines R, S, and 2
Terminal number Terminal symbol
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
T/
R
A0
A1
A2
A3
A4
A5
A6
A7
GND
B7
B6
B5
B4
B3
B2
B1
B0
OE
VCC
FIGURE 1. Terminal connections.
Device types 01 and 02
Inputs
Outputs
OE
T/R
L
L
Bus B data to bus A
L
H
Bus A data to bus B
H
X
Z
L = Low voltage level
H = High voltage level
X = Irrelevant
Z = High impedance state
FIGURE 2. Truth table.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
5962-87629
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990 REVISION LEVEL
E SHEET 8
DSCC FORM 2234
APR 97
Device types 01 and 02
FIGURE 3. Logic diagram.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
5962-87629
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990 REVISION LEVEL
E SHEET 9
DSCC FORM 2234
APR 97
Device types 01 and 02
NOTES:
1. Diagram shown for input control enable – low and input control disable – high.
2. Pulse generator for all pulses: tf 2.5 ns, tr 2.5 ns.
FIGURE 4. Switching waveforms and test circuit.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
5962-87629
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990 REVISION LEVEL
E SHEET 10
DSCC FORM 2234
APR 97
Switch position
Test
Switch
tPLZ
tPZL
All other
Closed
Closed
Open
NOTES:
1
/ RL = 500.
2
/ CL = 50 pF: Load capacitance includes jig and probe capacitance.
3
/ RT = Termination should be equal to ZOUT of pulse generators.
FIGURE 4. Switching waveforms and test circuit – Continued.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
5962-87629
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990 REVISION LEVEL
E SHEET 11
DSCC FORM 2234
APR 97
4. VERIFICATION
4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535,
appendix A.
4.2 Screening. Screening shall b e in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices
prior to quality conformance inspection. The following additional criteri a shall apply:
a. Burn-in test, method 1015 of MIL-STD-883.
(1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level
control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify
the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method
1015 of MIL-STD-883.
(2) TA = +125C, minimum.
b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical param eter
tests prior to burn-in are optional at the discretion of the manufacturer.
TABLE II. Electrical test requirements.
MIL-STD-883 test requirements Subgroups
(in accordance with
MIL-STD-883, method 5005,
table I)
Interim electrical parameters
(method 5004) ----
Final electrical test parameters
(method 5004) 1*, 2, 3, 7, 8, 9, 10, 11
Group A test requirements
(method 5005) 1, 2, 3, 4, 7, 8, 9, 10, 11
Groups C and D end-point
electrical parameters
(method 5005)
1, 2, 3
* PDA applies to subgroup 1.
4.3 Quality conformance inspecti on. Quality conformance inspection shall be in accordance with method 5005 of
MIL-STD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply.
4.3.1 Group A inspection.
a. Tests shall be as specified in table II herein.
b. Subgroups 5, and 6 in table I, method 5005 of MIL-STD-883 shall be omitted.
c. Subgroup 4 (CIN and CI/O measurements) shall be measured only for the initial test and after process or design
changes which may affect input capacitance. Test all applicable pins on five devices with zero failures.
d. Subgroups 7 and 8 shall inclu de verification of the truth table as specified on figure 2 herein.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
5962-87629
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990 REVISION LEVEL
E SHEET 12
DSCC FORM 2234
APR 97
4.3.2 Groups C and D inspections.
a. End-point electrical parameters shall be as specified in table II herein.
b. Steady-state life test conditions, method 1005 of MIL-STD-883.
(1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document re vision
level control and shall be ma de available to the preparing or acquiring activity upon request. The test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicabl e, in accordanc e with the intent specified in
method 1005 of MIL-STD-883.
(2) TA = +125C, minimum.
(3) Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883.
5. PACKAGING
5.1 Packaging requirements. The requir ements for packaging shall be in accordance with MIL-PRF-38535, appendix A .
6. NOTES
6.1 Intended use. Microcircuits conforming t o this drawing are intended for use for Government microcircuit application s
(original equipment), desig n applications, and logistics purposes.
6.2 Replaceability. Microcirc uits covered by this drawing will replace the same generic d evice covered by a contractor-
prepared specification or drawing.
6.3 Configuration control of SMD's. All proposed chan ges to existing SMD's will be coordinated with the users of record for
the individual documents. This coordination will be accomplished usin g DD Form 1692, Engineering Cha nge Proposal.
6.4 Record of users. Military and industrial users shall inform Defense Supply Center Columbus (DSCC) when a system
application requires configuration control and the applicable SMD. DSCC will maintain a record of user s and this list will be
used for coordination and distribution of changes to the dra wings. Users of drawings covering microelectronics device s
(FSC 5962) should contact DSCC-VA, telephone (614) 692-0544.
6.5 Comments. Comments on this drawing should be directed to DSCC-VA, Columbus, Ohio 43218-3990, or telephon e
(614) 692-0547.
6.6 Approved sources of supply. Approved sources of supply are listed i n MIL-HDBK-103. The vendors listed in
MIL-HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been submitted to and
accepted by DSCC-VA.
STANDARD MICROCIRCUIT DRAWING BULLETIN
DATE: 10-01-25
Approved sources of suppl y for SMD 5962-87629 are listed below for immediate acq uisition information only and
shall be added to MIL-HDBK-103 an d QML-38535 during the ne xt revision. MIL-HDBK-103 and QML-38535 will be
revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a
certificate of compliance has been submitted to and accepted by DSCC-VA. This information bulletin is superseded
by the next dated revision of MIL-HDBK-103 and QML-38535. DSCC maintains an online database of all current
sources of supply at http://www.dscc.dla.mil/Programs/smcr/
Standard
microcircuit drawing
PIN 1/
Vendor
CAGE
number
Vendor
similar
PIN 2/
5962-8762901RA 0C7V7 QP54FCT245DMQB
IDT54FCT245DB
5962-8762901SA 0C7V7 QP54FCT245FMQB
IDT54FCT245EB
5962-87629012A 0C7V7 QP54FCT245LMQB
IDT54FCT245LB
5962-8762902RA 0C7V7 QP54FCT245ADMQB
IDT54FCT245ADB
5962-8762902SA 0C7V7 QP54FCT245AFMQB
IDT54FCT245AEB
5962-87629022A 0C7V7 QP54FCT245ALMQB
IDT54FCT245ALB
1/ The lead finish shown for each PIN representing
a hermetic package is the most readily available
from the manufacturer listed for that part. If the
desired lead finish is not listed contact the vendor
to determine its availability.
2/ Caution. Do not use this number for item
acquisition. Items acquired to this number m ay not
satisfy the performance requirements of this drawing.
Vendor CAGE Vendor name
number and address
0C7V7 QP Semiconductor
2945 Oakmead Village Court
Santa Clara, CA 95051
The information contained herein is disseminated for convenience only and the
Government assumes no liability whatsoeve r for any inaccuracies in the
information bulletin.
