1
01/06/03
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability
indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to
workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the
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LP0701
P-Channel Enhancement-Mode
Lateral MOSFET
BVDSS /R
DS(ON) ID(ON) VGS(th)
BVDGS (max) (min) (max) TO-92 SO-8 Die
-16.5V 1.5-1.25A -1.0V LP0701N3 LP0701LG LP0701ND
Ordering Information
Order Number / Package
Advanced MOS Technology
These enhancement-mode (normally-off) transistors utilize a lat-
eral MOS structure and Supertex’s well-proven silicon-gate
manufacturing process. This combination produces devices with
the power handling capabilities of bipolar transistors and with the
high input impedance and negative temperature coefficient inher-
ent in MOS devices. Characteristic of all MOS structures, these
devices are free from thermal runaway and thermally-induced
secondary breakdown. The low threshold voltage and low on-
resistance characteristics are ideally suited for hand held battery
operated applications.
Applications
Logic level interfaces
Solid state relays
Battery operated systems
Photo voltaic drives
Analog switches
General purpose line drivers
Absolute Maximum Ratings
Drain-to-Source Voltage BVDSS
Drain-to-Gate Voltage BVDGS
Gate-to-Source Voltage ± 10V
Operating and Storage Temperature -55°C to +150°C
Soldering Temperature* 300°C
*Distance of 1.6 mm from case for 10 seconds.
Features
Ultra low threshold
High input impedance
Low input capacitance
Fast switching speeds
Low on resistance
Freedom from secondary breakdown
Low input and output leakage
Complementary N- and P-channel devices
Package Options (Note 1)
Note: See Package Outline section for dimensions.
Low Threshold
S G D
TO-92
1
2
3
4
8
7
6
5
SO-8
top view
NC D
NC D
SD
GD
2
LP0701
Package ID (continuous)* ID (pulsed)* Power Dissipation
θ
jc
θ
ja IDR IDRM*
@ TC = 25°C°C/W °C/W
TO-92 -0.5A -1.25A 1W 125 170 -0.5A -1.25A
SO-8 -0.7A -1.25A 1.5W83 104-0.7A -1.25A
*I
D (continuous) is limited by max rated Tj.
Mounted on FR4 board, 25mm x 25mm x 1.57mm.
Thermal Characteristics
Symbol Parameter Min Typ Max Unit Conditions
BVDSS Drain-to-Source Breakdown Voltage -16.5 V VGS = 0V, ID = -1mA
VGS(th) Gate Threshold V oltage -0.5 -0.7 -1.0 V VGS = VDS, ID = -1mA
VGS(th) Change in VGS(th) with Temperature -4.0 mV/°CV
GS = VDS, ID = -1mA
IGSS Gate Body Leakage -100 nA VGS = ±10V, VDS = 0V
IDSS Zero Gate Voltage Drain Current -100 nA VDS = -15V, VGS = 0V
-1.0 mA VDS = 0.8 Max Rating,
VGS = 0V, TA = 125°C
-0.4 VGS = VDS = -2V
ID(ON) ON-State Drain Current -0.6 -1.0 VGS = VDS = -3V
-1.25 -2.3 A VGS = VDS = -5V
2.0 4.0 VGS = -2V, ID = -50mA
RDS(ON) 1.7 2.0 VGS = -3V, ID = -150mA
1.3 1.5 VGS = -5V, ID = -300mA
RDS(ON) Change in RDS(ON) with temperature 0.75 %/°CV
GS = -5V, ID = -300mA
GFS Forward T ransconductance 500 700 m VDS = -15V, ID = -1A
CISS Input Capacitance 120 250
COSS Common Source Output Capacitance 100 125 pF VGS = 0V, VDS = -15V, f = 1MHz
CRSS Reverse Transfer Capacitance 40 60
td(ON) Turn-ON Delay Time 20
trRise T ime 20 VDD =-15V, ID = -1.25A,
td(OFF) Turn-OFF Delay Time 30 RGEN = 25
tfFall T ime 30
VSD Diode Forward Voltage Drop -1.2 -1.5 V VGS = 0V, ISD = -500mA
Note 1: All D.C. parameters 100% tested at 25°C unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)
Note 2: All A.C. parameters sample tested.
A
Electrical Characteristics (@ 25°C unless otherwise specified)
Static Drain-to-Source
ON-State Resistance
ns
Switching Waveforms and Test Circuit
90%
10%
90%
90%
10% 10%
PULSE
GENERATOR
V
DD
R
L
OUTPUT
D.U.T.
t
(ON)
t
d(ON)
t
(OFF)
t
d(OFF)
t
F
t
r
INPUT
INPUT
OUTPUT
0V
V
DD
R
gen
0V
-10V
3
LP0701
Saturation Characteristics
0-1-2-3 -5-4
Maximum Rated Safe Operating Area
-0.1 -100-10-1.0
-0.1
-1.0
-10
-0.01
Thermal Response Characteristics
Thermal Resistance (normalized)
1.0
0.8
0.6
0.4
0.2
0.001 100.01 0.1 1.0
Transconductance vs. Drain Current
1.0
0.8
0.6
0.4
0.2
0
0
-2.0
-1.0
Power Dissipation vs. Case Temperature
0 15010050
2
1
01257525
T
A
= -55°C
TO-92 (DC)
SO-8 (DC)
TC = 25°C
TO-92
TO-92/SO-8 (pulsed)
V
GS
= -5V
-4V
-3V
-2V
-1V
-2.5
-2.0
-1.5
-1.0
-0.5
0
0
Output Characteristics
-2.5
-2.0
-1.5
-1.0
-0.5
00-4 -8-12 -16
V
GS
= -5V
-4V
-3V
-2V
-1V
I
D
(amperes)
I
D
(amperes)
V
DS
(volts) V
DS
(volts)
G
FS
(siemens)
P
D
(watts)
V
DS
= -15V
T
A
= 25°C
T
A
= 125°C
T
C
(°C)I
D
(amperes)
I
D
(amperes)
V
DS
(volts) t
P
(seconds)
TO-92
T
C
= 25°C
P
D
= 1W
SO-8
Typical Performance Curves
4
1235 Bordeaux Drive, Sunnyvale, CA 94089
TEL: (408) 744-0100 • FAX: (408) 222-4895
www.supertex.com
01/06/03
©2003 Supertex Inc. All rights reserved. Unauthorized use or reproduction prohibited.
LP0701
Gate Drive Dynamic Characteristics
QG (nanocoulombs)
VGS(th) (normalized)
RDS(ON) (normalized)
V(th) and RDS Variation with Temperature
On-Resistance vs. Drain Current
BVDSS Variation with Temperature
BVDSS (normalized)
Transfer Characteristics
Capacitance vs. Drain-to-Source Voltage
200
C (picofarads)
0-5-10 -15
100
0-1-2-3-4-5
-2
-1
-50 0 50 100 150
1.1
10
8
6
4
2
00
-3
1.4
1.2
1.0
0.8
0.6
0.4
1.6
1.4
1.2
1.0
0.8
0.6
-10
-8
-6
-4
-2
0012345
-50 0 50 100 150
238pF
TA = -55°C
f = 1MHz
-1 -2
-20V
0
VDS = -15V
0.9
1.0
CISS = 115pF
V(th) @ -1mA
RDS(ON) @ -5V, -300mA
0
VGS = -3V
VGS = -5V
TA = 25°C
TA = 125°C
VGS = -2V
ID (amperes)Tj (°C)
RDS(ON) (ohms)
ID (amperes)
VGS (volts) Tj (°C)
VDS = -10V
VDS (volts)
VGS (volts)
CISS
COSS
CRSS
Typical Performance Curves