INDUSTRIAL TEMPERATURE RANGE
IDT74ALVCH32245
3.3V CMOS 32-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
1JUNE 2016INDUSTRIAL TEMPERATURE RANGE
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc.
©2016 Integrated Device Technology, Inc. DSC-4907/7
FEATURES:
• 0.5 MICRON CMOS Technology
• Typical tSK(o) (Output Skew) < 250ps
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
•VCC = 3.3V ± 0.3V, Normal Range
•VCC = 2.7V to 3.6V, Extended Range
•VCC = 2.5V ± 0.2V
• CMOS power levels (0.4μμ
μμ
μ W typ. static)
• Rail-to-Rail output swing for increased noise margin
• Available in 96-ball LFBGA package
FUNCTIONAL BLOCK DIAGRAM
DRIVE FEATURES:
• High Output Drivers: ±24mA
• Suitable for Heavy Loads
APPLICATIONS:
• 3.3V high speed systems
• 3.3V and lower voltage computing systems
IDT74ALVCH32245
3.3V CMOS 32-BIT
BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
AND BUS-HOLD
DESCRIPTION:
This 32-bit bus transceiver is built using advanced dual metal CMOS
technology. This high-speed, low power transceiver is ideal for asynchro-
nous communication between two busses (A and B). The Direction and
Output Enable controls are designed to operate the device as either four
independent 8-bit transceivers or one 32-bit transceiver. The direction
control pins (DIR) control the direction of data flow. The output enable pins
(OE) override the direction control and disable both ports. All inputs are
designed with hysteresis for improved noise margin.
The ALVCH32245 has been designed with a ±24mA output driver. This
driver is capable of driving a moderate to heavy load while maintaining
speed performance.
The ALVCH32245 has “bus-hold” which retains the inputs’ last state
whenever the input bus goes to a high impedance. This prevents floating
inputs and eliminates the need for pull-up/down resistors.
1
DIR
1
A
1
1
B
1
1
OE
TO SEVEN OTHER CHANNELS
3
DIR
3
A
1
3
B
1
3
OE
2
DIR
2
A
1
2
B
1
2
OE
4
DIR
4
A
1
4
B
1
4
OE
A3
A5
H3
E5
A4
A2
H4
E2
J3
J5
J4
J2
T3
N5
T4
N2
TO SEVEN OTHER CHANNELS
TO SEVEN OTHER CHANNELS
TO SEVEN OTHER CHANNELS
INDUSTRIAL TEMPERATURE RANGE
2
IDT74ALVCH32245
3.3V CMOS 32-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
LFBGA
TOPVIEW
96 BALL LFBGA P ACKAGE A TTRIBUTES
PIN CONFIGURATION
1.5mm Max.
1.4mm Nom.
1.3mm Min.
0.8mm
6
5
4
3
2
1
TOP VIEW
ABCDE FGHJKLMNPR T
ABC DEFGHJK LMNPRT
6
5
4
3
2
1
13.5mm
5.5mm
ABCEFGHJKLMNP
DRT
6
5
4
3
2
1
1A61A8
2A1
2A22A42A7
1A4
1A51A7
2A6
2A8
2A32A5
1A2
1A3
1A1
VCC GND
3A8
3A23A4
4A14A3
4A2
3A33A5
4A4
3A1
4A6
VCC
1B1
GND
GND VCC
1B2
1B3
4B64B7
GND
2B22B4
1B4
1B51B7
2B6
2B83B7
4B2
3B33B5
4B4
3B1
1B61B8
2B1
2B7
2B32B5
3B63B8
3B23B4
4B14B3
GND
VCC GND
VCC GND GND
VCC
GND GND
GND
3A7
3A6
GND
1OE 3OE
4A5
4A7
4A8
4OE
4B8
4B5
VCC
GND 2DIR
1DIR VCC
GND
GND
GND 2OE
3DIR 4DIR
INDUSTRIAL TEMPERATURE RANGE
IDT74ALVCH32245
3.3V CMOS 32-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
3
Pin Names Description
xOE Output Enable Inputs (Active LOW)
xDIR Direction Control Inputs
xA x Side A Inputs or 3-State Outputs(1)
xB x Side B Inputs or 3-State Outputs(1)
PIN DESCRIPTION
Symbol Description Max Unit
VTERM(2) Terminal Voltage with Respect to GND –0.5 to +4.6 V
VTERM(3) Terminal Voltage with Respect to GND –0.5 to VCC+0.5 V
TSTG Storage Temperature –65 to +150 °C
IOUT DC Output Current –50 to +50 mA
IIK Continuous Clamp Current, ±50 mA
VI < 0 or VI > VCC
IOK Continuous Clamp Current, VO < 0 –50 mA
ICC Continuous Current through each ±100 mA
ISS VCC or GND
ABSOLUTE MAXIMUM RATINGS(1)
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. VCC terminals.
3. All terminals except VCC.
NOTE:
1. These pins have "Bus-Hold". All other pins are standard inputs, outputs, or I/Os.
FUNCTION T ABLE (EACH 8-BIT SECTION)(1)
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High Impedance
Inputs
xOE xDIR Outputs
L L Bus B Data to Bus A
L H Bus A Data to Bus B
H X High Z State
NOTE:
1. As applicable to the device type.
Symbol Parameter(1) Conditions Typ. Max. Unit
CIN Input Capacitance VIN = 0V 5 7 pF
COUT Output Capacitance VOUT = 0V 7 9 pF
CI/O I/O Port Capacitance VIN = 0V 7 9 pF
CAPACITANCE (TA = +25°C, F = 1.0MHz)
INDUSTRIAL TEMPERATURE RANGE
4
IDT74ALVCH32245
3.3V CMOS 32-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
Symbol Parameter Test Conditions Min. Typ.(1) Max. Unit
VIH Input HIGH Voltage Level VCC = 2.3V to 2.7V 1.7 — — V
VCC = 2.7V to 3.6V 2 — —
VIL Input LOW Voltage Level VCC = 2.3V to 2.7V — — 0.7 V
VCC = 2.7V to 3.6V — — 0.8
IIH Input HIGH Current VCC = 3.6V VI = VCC —— ±5μA
IIL Input LOW Current VCC = 3.6V VI = GND — — ±5μA
IOZH High Impedance Output Current VCC = 3.6V VO = VCC ——±10 μA
IOZL (3-State Output pins) VO = GND — — ±10
VIK Clamp Diode Voltage VCC = 2.3V, IIN = –18mA — –0.7 –1.2 V
VHInput Hysteresis VCC = 3.3V — 100 — mV
ICCL Quiescent Power Supply Current VCC = 3.6V — 0.1 40 μA
ICCH VIN = GND or VCC
ICCZ
ΔICC Quiescent Power Supply Current One input at VCC - 0.6V, other inputs at VCC or GND — — 750 μA
Variation
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Operating Condition: TA = –40°C to +85°C
NOTE:
1. Typical values are at VCC = 3.3V, +25°C ambient.
BUS-HOLD CHARACTERISTICS
Symbol Parameter(1) Test Conditions Min. Typ.(2) Max. Unit
IBHH Bus-Hold Input Sustain Current VCC = 3V VI = 2V – 75 — — μA
IBHL VI = 0.8V 75 — —
IBHH Bus-Hold Input Sustain Current VCC = 2.3V VI = 1.7V – 45 — — μA
IBHL VI = 0.7V 45 — —
IBHHO Bus-Hold Input Overdrive Current VCC = 3.6V VI = 0 to 3.6V — — ±500 μA
IBHLO
NOTES:
1. Pins with Bus-Hold are identified in the pin description.
2. Typical values are at VCC = 3.3V, +25°C ambient.
INDUSTRIAL TEMPERATURE RANGE
IDT74ALVCH32245
3.3V CMOS 32-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
5
OPERATING CHARACTERISTICS, TA = 25°C
VCC = 2.5V ± 0.2V VCC = 3.3V ± 0.3V
Symbol Parameter Test Conditions Typical Typical Unit
CPD Power Dissipation Capacitance per Driver Outputs enabled CL = 0pF, f = 10Mhz 44 58 pF
CPD Power Dissipation Capacitance per Driver Outputs disabled 8 10
NOTES:
1. See TEST CIRCUITS AND WAVEFORMS. TA = – 40°C to + 85°C.
2 Skew between any two outputs of the same package and switching in the same direction.
SWITCHING CHARACTERISTICS(1)
VCC = 2.5V ± 0.2V VCC = 2.7V VCC = 3.3V ± 0.3V
Symbol Parameter Min. Max. Min. Max. Min. Max. Unit
tPLH Propagation Delay 1 3.7 —3.6 1 3 ns
tPHL xAx to xBx or xBx to xAx
tPZH Output Enable Time 1 5.7 —5.4 1 4.4 ns
tPZL xOE to xAx to xBx
tPHZ Output Disable Time 1 5.2 —4.6 1 4.1 ns
tPLZ xOE to xAx to xBx
tSK(O) Output Skew(2) — ————500 ps
NOTE:
1. VIH and VIL must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate VCC range.
TA = – 40°C to + 85°C.
OUTPUT DRIVE CHARACTERISTICS
Symbol Parameter Test Conditions(1) Min. Max. Unit
VOH Output HIGH Voltage VCC = 2.3V to 3.6V IOH = – 0.1mA VCC – 0.2 — V
VCC = 2.3V IOH = – 6mA 2 —
VCC = 2.3V IOH = – 12mA 1.7 —
VCC = 2.7V 2.2 —
VCC = 3V 2.4 —
VCC = 3V IOH = – 24mA 2 —
VOL Output LOW Voltage VCC = 2.3V to 3.6V IOL = 0.1mA — 0.2 V
VCC = 2.3V IOL = 6mA — 0.4
IOL = 12mA — 0.7
VCC = 2.7V IOL = 12mA — 0.4
VCC = 3V IOL = 24mA — 0.55
INDUSTRIAL TEMPERATURE RANGE
6
IDT74ALVCH32245
3.3V CMOS 32-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
Open
VLOAD
GND
VCC
Pulse
Generator D.U.T.
500Ω
500Ω
CL
RT
VIN VOUT
(1, 2)
ALVC Link
INPUT
VIH
0V
VOH
VOL
tPLH1
tSK
(x)
OUTPUT 1
OUTPUT 2
tPHL1
tSK
(x)
tPLH2 tPHL2
VT
VT
VOH
VT
VOL
tSK
(x)
= tPLH2
-
tPLH1
or
tPHL2
-
tPHL1
ALVC Link
SAME PHASE
INPUT TRANSITION
OPPOSITE PHASE
INPUT TRANSITION
0V
0V
VOH
V
OL
tPLH tPHL
tPHL
tPLH
OUTPUT
VIH
VT
VT
VIH
VT
ALVC Link
DATA
INPUT 0V
0V
0V
0V
tREM
TIMING
INPUT
SYNCHRONOUS
CONTROL
tSU tH
tSU tH
VIH
VT
VIH
VT
VIH
VT
VIH
VT
ALVC Link
ASYNCHRONOUS
CONTROL
LOW-HIGH-LOW
PULSE
HIGH-LOW-HIGH
PULSE
VT
tW
VT
ALVC Link
CONTROL
INPUT
tPLZ 0V
OUTPUT
NORMALLY
LOW t
PZH
0V
SWITCH
CLOSED
OUTPUT
NORMALLY
HIGH
ENABLE DISABLE
SWITCH
OPEN
tPHZ
0V
VLZ
VOH
V
T
VT
tPZL
VLOAD/2 VLOAD/2
VIH
VT
VOL
VHZ
ALVC Link
TEST CIRCUITS AND WAVEFORMS
Propagation Delay
Test Circuit for All Outputs
Enable and Disable Times
Set-up, Hold, and Release Times
NOTES:
1. For tSK(o) OUTPUT1 and OUTPUT2 are any two outputs.
2. For tSK(b) OUTPUT1 and OUTPUT2 are in the same bank.
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
NOTES:
1. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2ns; tR ≤ 2ns.
Output Skew - tSK(X)
Pulse Width
NOTE:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
Symbol VCC(1)= 3.3V±0.3V VCC(1)= 2.7V VCC(2)= 2.5V±0.2V Unit
VLOAD 6 6 2 x Vcc V
VIH 2.7 2.7 Vcc V
VT1.5 1.5 Vcc / 2 V
VLZ 300 300 150 mV
VHZ 300 300 150 mV
CL50 50 30 pF
TEST CONDITIONS
SWITCH POSITION
Test Switch
Open Drain
Disable Low VLOAD
Enable Low
Disable High GND
Enable High
All Other Tests Open
INDUSTRIAL TEMPERATURE RANGE
IDT74ALVCH32245
3.3V CMOS 32-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
7
ORDERING INFORMATION
XX ALVC XXXX XX
Package
Device Type
Temp. Range
32
74
32-bit Bus Transceiver with 3-State Outputs
-40°C to +85°C
XXX
Family
Bus-Hold
245
Bus-Hold
32-Bit Bus Density, ±24mA
H
BF
BFG
Low Profile Fine Pitch Ball Grid Array
LFBGA - Green
Blank
8
Tray
Tape and Reel
X
CORPORATE HEADQUARTERS for SALES: for Tech Support:
6024 Silver Creek Valley Road 800-345-7015 or 408-284-8200 logichelp@idt.com
San Jose, CA 95138 fax: 408-284-2775
www.idt.com
DATASHEET DOCUMENT HISTORY
06/15/2016 Pg. 7 Updated the ordering information by adding Tape and Reel information.
