DG406/407 16-Ch/Dual 8-Ch High-Performance CMOS Analog MUX Features Benefits Applications Low On-Resistance--rDS(on): 50 Low Charge Injection--Q: 15 pC Fast Transition Time--tTRANS: 200 ns Low Power: 0.2 mW Single Supply Capability 44-V Supply Max Rating Higher Accuracy Reduced Glitching Improved Data Throughput Reduced Power Consumption Increased Ruggedness Superior to DG506/507A Wide Supply Ranges: 5 V to 20 V Data Acquisition Systems Audio Signal Routing Medical Instrumentation ATE Systems Battery Powered Systems High-Rel Systems Single Supply Systems Description The DG406 is a 16-channel single-ended analog multiplexer designed to connect one of sixteen inputs to a common output as determined by a 4-bit binary address. The DG407 selects one of eight differential inputs to a common differential output. Break-before-make switching action protects against momentary shorting of inputs. Applications for the DG406/407 include high speed data acquisition, audio signal switching and routing, ATE systems, and avionics. High performance and low power dissipation make them ideal for battery operated and remote instrumentation applications. For additional application information, see application note AN206. An on channel conducts current equally well in both directions. In the off state each channel blocks voltages up to the power supply rails. An enable (EN) function allows the user to reset the multiplexer/demultiplexer to all switches off for stacking several devices. All control inputs, address (Ax) and enable (EN) are TTL compatible over the full specified operating temperature range. Designed in the 44-V silicon-gate CMOS process, the absolute maximum voltage rating is extended to 44 volts, allowing operation with 20-V supplies. Additionally single (12-V) supply operation is allowed. An epitaxial layer prevents latchup. Functional Block Diagrams and Pin Configurations DG406 DG407 Dual-In-Line and SOIC V+ 1 28 D NC 2 27 NC 3 Dual-In-Line and SOIC V+ 1 28 Da V- Db 2 27 V- 26 S8 NC 3 26 S8a S8b 4 25 S7a S16 4 25 S7 S15 5 24 S6 S7b 5 24 S6a S6b 6 23 S5a S14 6 23 S5 S13 7 22 S4 S5b 7 22 S4a S4b 8 21 S3a S12 8 21 S3 S11 9 20 S2 S3b 9 20 S2a S1 S2b 10 19 S1a 11 18 EN 17 A0 S10 10 19 S9 11 18 EN S1b 17 A0 GND 12 16 A1 NC 13 15 A2 NC GND 12 NC 13 A3 Decoders/Drivers 14 Top View Decoders/Drivers 14 16 A1 15 A2 Top View Updates to this data sheet may be obtained via facsimile by calling Siliconix FaxBack, 1-408-970-5600. Please request FaxBack document #70061. Applications information may be obtained via FaxBack, request documents #70601 and #70604. Siliconix E-76983--Rev. F, 30-Jun-97 1 DG406/407 Functional Block Diagrams and Pin Configurations (Cont'd) V+ Da D 28 27 26 Db V+ 1 NC NC 2 S 8b NC 3 S8 S 16 4 V- PLCC and LCC DG407 4 3 2 1 28 27 26 S15 5 25 S7 S7b 5 25 S7a S14 6 24 S6 S6b 6 24 S6a S13 7 23 S5 S5b 7 23 S5a S12 8 22 S4 S4b 8 22 S4a S11 9 21 S3 S3b 9 21 S3a S10 10 20 S2 S2b 10 20 S2a S9 11 19 S1 S1b 11 19 S1a EN A0 A1 A2 NC NC GND EN A0 GND A1 12 13 14 15 16 17 18 A2 12 13 14 15 16 17 18 A3 Decoders/Drivers NC Decoders/Drivers Top View Top View Truth Table -- DG406 Truth Table -- DG407 A3 A2 A1 A0 EN On Switch A2 A1 A0 EN On Switch Pair X 0 X 0 X 0 X 0 0 1 None 1 X 0 X 0 X 0 0 1 None 1 0 0 0 1 1 2 0 0 1 1 2 0 0 1 0 1 3 0 1 0 1 3 0 0 1 1 1 4 0 1 1 1 4 0 0 1 1 0 0 0 1 1 1 5 6 1 1 0 0 0 1 1 1 5 6 0 1 1 0 1 7 1 1 0 1 7 0 1 1 1 1 8 1 1 1 1 8 1 0 0 0 1 9 1 0 0 1 1 10 1 0 1 0 1 11 1 0 1 1 1 12 1 1 0 0 1 13 1 1 0 1 1 14 1 1 1 0 1 15 1 1 1 1 1 16 Ordering Information -- DG406 Temp Range -40 to 85_C -55 to 125_C 2 V- S 8a PLCC and LCC DG406 Package Part Number 28-Pin Plastic DIP DG406DJ 28-Pin PLCC DG406DN 28-Pin Widebody SOIC DG406DW 28-Pin CerDIP DG406AK/883 LCC-28 DG406AZ/883 Logic "0" 0 = VAL v 0.8 V Logic g "1" = VAH w 2.4 V X = Don't Care Ordering Information -- DG407 Temp Range -40 to 85_C -55 to 125_C Package Part Number 28-Pin Plastic DIP DG407DJ 28-Pin PLCC DG407DN 28-Pin Widebody SOIC DG407DW 28-Pin CerDIP DG407AK/883 LCC-28 DG407AZ/883 Siliconix E-76983--Rev. F, 30-Jun-97 DG406/407 Absolute Maximum Ratings 28-Pin CerDIPd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 W Voltages Referenced to V- V+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 V GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 V Digital Inputsa, VS, VD . . . . . . . . . . . . . . . (V-) -2 V to (V+) +2 V or 20 mA, whichever occurs first Current (Any Terminal,) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA Peak Current, S or D (Pulsed at 1 ms, 10% Duty Cycle Max) . . . . . . . . . . . . . . . . . . 100 mA Storage Temperature (AK, AZ Suffix) . . . . . . . . -65 to 150_C (DJ, DN Suffix) . . . . . . . . . -65 to 125_C Power Dissipation (Package)b 28-Pin Plastic DIPc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 625 mW 28-Pin Plastic PLCCc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 450 mW LCC-28e . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.35 W 28-Pin Widebody SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 450 mW Notes: a. Signals on SX, DX or INX exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings. b. All leads soldered or welded to PC board. c. Derate 6 mW/_C above 75_C d. Derate 12 mW/_C above 75_C e. Derate 13.5 mW/_C above 75_C Specificationsa Test Conditions Unless Otherwise Specified Parameter A Suffix D Suffix -55 to 125_C -40 to 85_C V+ = 15 V, V- = -15 V VAL = 0.8 V, VAH = 2.4 Vf Tempb rDS(on) VD = "10 V, IS = -10 mA Sequence Each Switch On Room Full 50 DrDS(on) VD = "10 V Room 5 Room Full 0.01 -0.5 -50 0.5 50 -0.5 -5 0.5 5 DG406 Room Full 0.04 -1 -200 1 200 -1 -40 1 40 DG407 Room Full 0.04 -1 -100 1 100 -1 -20 1 20 DG406 Room Full 0.04 -1 -200 1 200 -1 -40 1 40 DG407 Room Full 0.04 -1 -100 1 100 -1 -20 1 20 Symbol Typc Mind Maxd Mind Maxd Unit 15 V 100 125 W Analog Switch Analog Signal Rangee VANALOG Drain-Source On-Resistance rDS(on) Matching Between Channelsg Source Off Leakage Current Drain Off L k Leakage C Current Drain On Leakage Current L k C Full IS(off) ID(off) ID(on) VEN = 0 V VD = "10 V VS = #10 V VS = VD = "10 V Sequence Each Switch On -15 15 -15 100 125 % nA Digital Control Logic High Input Voltage VINH Full Logic Low Input Voltage VINL Full 2.4 2.4 Logic High Input Current IAH VA = 2.4 V, 15 V Full -1 1 -1 1 Logic Low Input Current IAL VEN = 0 V, 2.4 V, VA = 0 V Full -1 1 -1 1 Logic Input Capacitance Cin f = 1 MHz Room 7 Transition Time tTRANS See Figure 2 Room Full 200 Break-Before-Make Interval tOPEN See Figure 4 Room Full 50 Room Full 150 200 400 200 400 Room Full 70 150 300 150 300 0.8 0.8 V mA pF Dynamic Characteristics Enable Turn-On Time tON(EN) Enable Turn-Off Time tOFF(EN) See Figure 3 Siliconix E-76983--Rev. F, 30-Jun-97 350 450 25 10 350 450 25 10 ns 3 DG406/407 Specificationsa Test Conditions Unless Otherwise Specified Parameter A Suffix D Suffix -55 to 125_C -40 to 85_C V+ = 15 V, V- = -15 V VAL = 0.8 V, VAH = 2.4 Vf Tempb Typc Q CL = 1 nF, VS = 0 V, Rs = 0 W Room 15 pC OIRR VEN = 0 V, RL = 1 kW f = 100 kHz Room -69 dB CS(off) VEN = 0 V, VS = 0 V, f = 1 MHz Room 8 Room 130 DG407 Room 65 DG406 Room 140 DG407 Room 70 Room Full 13 Symbol Mind Maxd Mind Maxd Unit Dynamic Characteristics (Cont'd) Charge Injection Off Isolationh Source Off Capacitance Drain Off Capacitance CD(off) VEN = 0 V,, VD = 0 V f = 1 MHz MH Drain On Capacitance CD(on) pF Power Supplies Positive Supply Current I+ Negative Supply Current I- Room Full -0.01 Positive Supply Current I+ Room Full 50 Negative Supply Current I- Room Full -0.01 VEN = VA = 0 or 5 V 2 4 V, V VA = 0 V VEN = 2.4 30 75 -1 -10 30 75 -1 -10 500 900 -20 -20 500 700 mA -20 -20 Specificationsa for Single Supply Test Conditions Unless Otherwise Specified Parameter Symbol V = 12 V, V+ V V- V =0V VAL = 0.8 V, VAH = 2.4 Vf Tempb Typc A Suffix D Suffix -55 to 125_C -40 to 85_C Mind Maxd Mind Maxd Unit Analog Switch Analog Signal Rangee Drain-Source On-Resistance rDS(on) Matching Between Channelsg VANALOG rDS(on) DrDS(on) Full Room 90 Room 5 Room 0.01 DG406 Room 0.04 DG407 Room 0.04 DG406 Room 0.04 DG407 Room 0.04 VD = 3 V,, 10 V,, IS = - 1 mA S Sequence E h Switch Each S i h On O Source Off Leakage Current IS(off) Drain Off L k C Leakage Current ID(off) VEN = 0 V VD = 10 V or 00.55 V VS = 0.5 V or 10 V Drain On L k Leakage C Current ID(on) VS = VD = 10 V Sequence Each S E h Switch S i h On O 0 12 120 0 12 V 120 W % nA Dynamic Characteristics Switching Time of Multiplexer tTRANS VS1 = 8 V, VS8 = 0 V, VIN = 2.4 V Room 300 450 450 Enable Turn-On Time tON(EN) Room 250 600 600 Enable Turn-Off Time tOFF(EN) VINH = 2.4 V,, VINL = 0 V VS1 = 5 V Room 150 300 300 Q CL = 1 nF, VS= 6 V, RS = 0 Room 20 Charge Injection 4 ns pC Siliconix E-76983--Rev. F, 30-Jun-97 DG406/407 Specifications for Single Supply Test Conditions Unless Otherwise Specified Parameter Symbol V V- V =0V V+ = 12 V, VAL = 0.8 V, VAH = 2.4 Vf Tempb Typc Room Full 13 Room Full -0.01 A Suffix D Suffix -55 to 125_C -40 to 85_C Mind Maxd Mind Maxd Unit Power Supplies Positive Supply Current I+ VEN = 0 V or 5 V V, VA = 0 V or 5 V Negative Supply Current I- 30 75 -20 -20 30 75 -20 -20 mA Notes: a. Refer to PROCESS OPTION FLOWCHART. b. Room = 25_C, Full = as determined by the operating temperature suffix. c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. e. Guaranteed by design, not subject to production test. f. VIN = input voltage to perform proper function. g. DrDS(on) = rDS(on) MAX - rDS(on) MIN. h. Worst case isolation occurs on Channel 4 due to proximity to the drain pin. Typical Characteristics rDS(on) vs. VD and Supply rDS(on) vs. VD and Temperature 160 80 120 rDS(on) - On-Resistance ( W ) rDS(on) - On-Resistance ( W ) 70 5 V 80 8 V 10 V 12 V 15 V 40 20 V -12 -4 4 VD - Drain Voltage (V) 12 20 rDS(on) vs. VD and Supply 25_C 0_C 40 30 -40_C 20 -55_C 10 V+ = 15 V V- = -15 V 120 V+ = 7.5 V 80 I D , I S - Current (pA) 200 160 10 V 120 12 V 15 V 80 20 V 22 V 0 0 4 8 12 VD - Drain Voltage (V) Siliconix E-76983--Rev. F, 30-Jun-97 16 20 -5 0 5 VD - Drain Voltage (V) 10 15 V+ = 15 V V- = -15 V VS = -VD for ID(off) VD = VS(open) for ID(on) 40 0 -40 -80 40 -10 ID , IS Leakage Currents vs. Analog Voltage V- = 0 V 240 rDS(on) - On-Resistance ( W ) 85_C 50 0 -15 0 -20 125_C 60 -120 -15 IS(off) DG406 ID(on), ID(off) DG407 ID(on), ID(off) -10 -5 0 5 10 VS , VD - Source Drain Voltage (V) 15 5 DG406/407 Typical Characteristics (Cont'd) ID , IS Leakages vs. Temperature 100 nA Switching Times vs. Bipolar Supplies 350 V+ = 15 V V- = -15 V VD = 14 V 10 nA 300 tTRANS ID(on), ID(off) Time (ns) I D , I S - Current 250 1 nA 100 pA 200 tON(EN) 150 IS(off) 10 pA 100 tOFF(EN) 1 pA 50 0.1 pA -55 -35 -15 0 5 25 45 65 85 105 5 125 10 Temperature (_C) 15 20 VSUPPLY - Supply Voltage (V) Switching Times vs. Single Supply Charge Injection vs. Analog Voltage 70 700 60 500 50 400 tTRANS Q (pC) Time (ns) V- = 0 V 600 300 40 V+ = 12 V, V- = 0 V 30 tON(EN) 200 V+ = 15 V, V- = -15 V 20 100 10 tOFF(EN) 0 5 10 15 0 -15 20 -10 V+ - Supply Voltage (V) -5 0 5 Off-Isolation vs. Frequency 15 Supply Currents vs. Switching Frequency -140 10 EN = 5 V AX = 0 or 5 V 8 -120 I+ 6 I - Current (mA) -100 ISOL (dB) 10 VS - Source Voltage (V) -80 -60 4 2 0 IGND -2 -4 -40 I- -6 -20 -8 0 -10 100 1k 10 k 100 k f - Frequency (Hz) 6 1M 10 M 10 100 1k 10 k 100 k 1M 10 M f - Frequency (Hz) Siliconix E-76983--Rev. F, 30-Jun-97 DG406/407 Typical Characteristics (Cont'd) tON/tOFF vs. Temperature 300 V+ = 15 V V- = -15 V I S - Source Current (A) 260 Switching Threshold vs. Supply Voltage 3 Time (ns) 220 tTRANS 180 tON(EN) 140 CCCCCCCCCC CCCCCCCCCC CCCCCCCCCC CCCCCCCCCC CCCCCCCCCC 2 1 100 tOFF(EN) 0 60 -55 -35 -15 5 25 45 65 85 105 0 125 Temperature (_C) 5 10 15 20 VSUPPLY - Supply Voltage (V) Schematic Diagram (Typical Channel) V+ GND VREF D A0 V+ Level Shift AX Decode/ Drive V- S1 V+ EN Sn V- Figure 1. Siliconix E-76983--Rev. F, 30-Jun-97 7 DG406/407 Test Circuits +15 V +2.4 V V+ EN A3 A2 "10 V S1 S2 - S15 DG406 A1 A0 #10 V S16 D GND Logic Input VO V- 35 pF 300 W -15 V Switch Output VO +15 V V+ EN A2 S1b DG407 A1 A0 "10 V VS1 0V * tTRANS S1 ON #10 V S8b 90% tTRANS S8 ON VO V- 50 W 90% VS8 Db GND 50% 0V 50 W +2.4 V tr <20 ns tf <20 ns 3V 35 pF 300 W -15 V * = S1a - S8a, S2b - S7b, Da Figure 2. Transition Time +15 V V+ A3 A2 A1 A0 -5 V S1 S2 - S16 DG406 D EN GND VO V- 300 W 50 W Logic Input 35 pF -15 V tr <20 ns tf <20 ns 3V 50% 0V tON(EN) A2 V+ S1b S1a - S8a S2b - S8b A1 A0 Switch Output VO -5 V VO DG407 EN Da and Db GND 90% 90% VO V- 50 W tOFF(EN) 0V +15 V 35 pF 300 W -15 V Figure 3. Enable Switching Time 8 Siliconix E-76983--Rev. F, 30-Jun-97 DG406/407 Test Circuits (Cont'd) +15 V Logic Input V+ EN +2.4 V A3 A2 A1 All S and Da +5 V tr <20 ns tf <20 ns 3V 50% 0V DG406 DG407 A0 GND VS VO D,Db Switch Output VO V- 50 W 300 W 35 pF 80% tOPEN 0V -15 V Figure 4. Break-Before-Make Interval Application Hints Sampling speed is limited by two consecutive events: the transition time of the multiplexer, and the settling time of the sampled signal at the output. rDS(on) VOUT RS = 0 tTRANS is given on the data sheet. Settling time at the load depends on several parameters: rDS(on) of the multiplexer, source impedance, multiplexer and load capacitances, charge injection of the multiplexer and accuracy desired. The settling time for the multiplexer alone can be derived from the model shown in Figure 5. Assuming a low impedance signal source like that presented by an op amp or a buffer amplifier, the settling time of the RC network for a given accuracy is equal to nt: CD(on) Figure 5. Simplified Model of One Multiplexer Channel The maximum sampling frequency of the multiplexer is: 1 fs = % Accuracy # Bits n 0.25 8 6 0.012 12 9 0.0017 15 11 N (tSETTLING + tTRANS) (1) where N = number of channels to scan tSETTLING = nt = n x rDS(on) x CD(on) For the DG406 then, at room temp and for 12-bit accuracy, using the maximum limits: fs + 1 16 (9 x 100 W x 10 -12F) ) 300 x 10 -12 s (2) or fs = 694 kHz Siliconix E-76983--Rev. F, 30-Jun-97 (3) 9 DG406/407 Application Hints (Cont'd) From the sampling theorem, to properly recover the original signal, the sampling frequency should be more than twice the maximum component frequency of the original signal. This assumes perfect bandlimiting. In a real application sampling at three to four times the filter cutoff frequency is a good practice. Therefore from equation 2 above: fc = 1 4 x fs = 173 kHz (4) From this we can see that the DG406 can be used to sample 16 different signals whose maximum component frequency can be as high as 173 kHz. If for example, two channels are used to double sample the same incoming signal then its cutoff frequency can be doubled. The block diagram shown in Figure 6 illustrates a typical data acquisition front end suitable for low-level analog signals. Differential multiplexing of small signals is preferred since this method helps to reject any common mode noise. This is especially important when the sensors are located at a distance and it may eliminate the need for individual amplifiers. A low rDS(on), low leakage multiplexer like the DG407 helps to reduce measurement errors. The low power dissipation of the DG407 minimizes on-chip thermal gradients which can cause errors due to temperature mismatch along the parasitic thermocouple paths. Please refer to Application Note AN203 for additional information. To Sensor 1 To Sensor 8 Analog Multiplexer Inst Amp S/H 12-Bit A/D Converter DG407 Controller Figure 6. Measuring low-level analog signals is more accurate when using a differential multiplexing technique. 10 Siliconix E-76983--Rev. F, 30-Jun-97