APA4801 Stereo 280mW 8 Speaker Driver with Mute Features Applications * * * * Operating Voltage Single Supply Dual Supply 3V to 7V 1.5V to 3.5V * * * * Output Power at 10% THD+N High Signal-to-Noise Ratio 100dB High Slew Rate 5V/ s Low Distortion -65dB into 8 into 16 * * * * Personal Computers Microphone Preamplifier General Description The APA4801 is an integrated class AB stereo headphone amplifier contained in an SO-8 or a DIP-8 plastic package with Mute feature . Besides the common Mute feature , the APA4801 further integrates a voltage divider inside the chip . Thus , the external resistors can be eliminated . The device has been primarily developed for portable digital audio applications . 280mW 160mW Large Output Voltage Swing Excellent Power Supply Ripple Rejection Flexible Mute Function Integrated Voltage Divider (VDD/2) to Elimi- Block Diagram nate External Resistors * * * * * Portable Digital Audio Low Power Consumption Short-circuit Elimination MUTE Out A 1 Mute 2 0dB Wide Temperature Range No Switch ON/OFF Clicks A B + + Available in 8 pin SOP or DIP Package 8 VDD 7 Out B 6 BIAS 5 Input B 0dB 130k 130k Input A 3 VSS 4 BIAS Ordering Information APA4801 Package Code J : PDIP-8 Temp. Range I : - 40 to 85 C Handling Code TU : Tube TR : Tape & Reel Handling Code Temp. Range Package Code K : SOP-8 ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Copyright ANPEC Electronics Corp. Rev. A.5 - Apr., 2001 1 www.anpec.com.tw APA4801 Function Pin Description Pin Name I/O Out A O Mute I Input A I VSS Function Description A channel output pin Chip disable control input, high active and low for normal operating A channel input terminal Power ground pin Input B I B channel input terminal BIAS I Right channel bias input pin OUT B O B channel output pin VDD Power input pin Absolute Maximum Ratings Symbol VDD tSC(O) TA TJ TSTG TS VESD Parameter Supply Voltage Output Short-circuit Duration, at TA=25C, Ptot=1W Operating Ambient Temperature range Maximum Junction Temperature Storage Temperature Range Soldering Temperature,10 seconds Electrostatic Discharge Rating 8 20 -40 to 85 150 -65 to +150 260 -3000 to 3000 *1 Unit V S C C C C V Note: 1. Human body model : C=100pF, R=1500, 3 positive pulses plus 3 negative pulses Thermal Characteristics Symbol R THJA Parameter Thermal Resistance from Junction to Ambient in Free Air Value Unit DIP-8 109 K/W SO-8 210 K/W Electrical Characteristics V IN Symbol Parameter VDD Power Supply Voltage VDD=5V IDD Supply Current VI(OS) Input Offset Voltage Copyright ANPEC Electronics Corp. Rev. A.5 - Apr., 2001 =0dBV, VDD=5V, TA=25C, f=1kHz (unless otherwise noted) Test Conditions No Load 2 APA4801 Min. Typ. Max. 2.7 5.5 Unit 2.5 5 mA mV 50 V www.anpec.com.tw APA4801 Electrical Characteristics Cont. Sym bol Param eter Test Conditions M in. I SD Shunt Current M utel M ute Input Voltage A V1 - A V2 Differential C hannel Voltage G ain ATT M ute Attenuation fIN =1k, V IN =1 Vrm s AC Characteristics (THD+N Total Harm onic P O =160m W, R L =8, f=1kHz )/S Distortion plus N oise to P O =100m W, R L =16 , f=1kHz Signal Ratio PO O utput Power (THD+N)/S=0.1% , f=1kHz, BW <80kHz R L =8 -0.5 APA4801 Typ. M ax. 200 0.8 0 0.5 75 0.05 0.05 O utput Power PSR R Power Supply Rejection Ratio S/N Signal to Noise Ratio V DD =3V IDD Supply C urrent V I(OS) Input O ffset Voltage ISD AC Characteristics ISD Shunt Current M utel M ute Input Voltage A V1 - A V2 Differential C hannel Voltage G ain ATT M ute Attenuation (THD+ Total Harm onic N)/S Distortion plus N oise to Signal Ratio S/N Signal to Noise Ratio PO PO O utput Power O utput Power PSR R Power Supply Rejection Ratio Copyright ANPEC Electronics Corp. Rev. A.5 - Apr., 2001 A V dB dB % mW 170 100 R L =16 PO 70 Unit (THD+N)/S=10% , f=1kHz, BW <80kHz R L =8 mW 280 R L =16 160 C B =4.7 F,V RIPPLE =200m Vrm s, f=120Hz R L =8 76 Vrm s No Load -0.5 fIN =1k ,V IN = 0.5Vrm s P O =50m W, R L =8 , f=1kHz P O =25m W, R L =16, f=1kHz dB 2.2 5 200 mA mV A 150 0.8 0 A V dB 70 0.1 0.1 0.5 dB % Vrm s (THD+N)/S=0.1% , f=1kHz, BW <80kHz R L =8 mW 45 R L =16 25 (THD+N)/S=10% , f=1kHz, BW <80kHz R L =8 80 R L =16 45 C B =4.7F,V RIPPLE =200m Vrm s, f=120Hz 76 3 mW dB www.anpec.com.tw APA4801 Test and Application Circuit 220F 1F VINB 4.7F Input B 5 6 VDD VDD Out B BIAS 7 8 100F BIAS 0dB + B + A APA4801 0dB MUTE 4 VSS 3 Input A 2 Mute 1 Out A 220F 1F 100k VINA VMUTE H : Speaker Action L : Mute on 1F Typical Characteristics THD+N vs Output Power THD+N vs Output Power 10 10 VDD= 5V RL=16 1 f=20Hz THD+N (%) THD+N (%) VDD= 5V RL=8 f=20kHz 0.1 1 f=20Hz f=20kHz 0.1 f=1kHz f=1kHz 0.01 10m 200m 0.01 10m 500m Output Power (W) Copyright ANPEC Electronics Corp. Rev. A.5 - Apr., 2001 100m 200m Output Power (W) 4 www.anpec.com.tw APA4801 Typical Characteristics Cont. THD+N vs Frequency THD+N vs Frequency 10 10 VDD = 5V PO=160mW RL=8 NO FILTERS VDD = 5V PO=100mW RL=16 NO FILTERS 1 THD+N (%) THD+N (%) 1 0.1 0.1 0.01 0.01 20 100 1k 20 10k 20k 100 1k 10k 20k Frequency (Hz) Frequency (Hz) THD+N vs Output Power THD+N vs Output Power 10 10 VDD= 3V RL=16 VDD = 3V RL=8 f=20kHz 1 THD+N (%) THD+N (%) 1 f=20kHz f=20Hz 0.1 f=20Hz f=1kHz 0.1 f=1kHz 0.01 10m 50m 0.01 10m 100m Output Power (W) Copyright ANPEC Electronics Corp. Rev. A.5 - Apr., 2001 50m 100m Output Power (W) 5 www.anpec.com.tw APA4801 Typical Characteristics Cont. THD+N vs Frequency THD+N vs Frequency 10 10 VDD = 3V PO=25mW RL=16 NO FILTERS VDD = 3V PO=50mW RL=8 NO FILTERS THD+N (%) THD+N (%) 1 1 0.1 0.1 0.0120 100 1k 0.01 20 10k 20k Frequency (Hz) 80 150 RL= 16 VDD = 5V f=1kHz THD+N<1% BW<80kHz 50 50 RL= 8 70 RL= 8 Power Dissipation (mW) Power Dissipation (mW) 10k 20k Power Dissipation vs Output Power 200 0 0 1k Frequency (Hz) Power Dissipation vs Output Power 100 100 100 150 50 RL= 16 40 30 VDD = 3V f=1kHz THD+N<1% BW<80kHz 20 10 0 200 Output Power (mW) Copyright ANPEC Electronics Corp. Rev. A.5 - Apr., 2001 60 0 20 40 60 Output Power (mW) 6 www.anpec.com.tw APA4801 Typical Characteristics Cont. Output Voltage (Mute Attenuation) Supply Current vs Supply Voltage +0 5 RL= 8 VDD =5V VIN =1Vrms BW<80kHz (shutdown) NO LOAD -20 4.5 3 Output Voltage (dBV) Supply Current (mA) 4 3.5 2 2.5 1 1.5 -40 -60 -80 0.5 0 2.5 3 3.5 4 4.5 5 -100 20 5.5 100 Supply Voltage (V) 250 f=1kHz R =8 300 L BW<80kHz 200 250 Output Power (mW) Output Power (mW) 100k Output Power vs Supply Voltage 350 10% THD+N 1% THD+N 150 100 0.1% THD+N f=1kHz RL=16 BW<80kHz 150 10% THD+N 100 1% THD+N 50 50 02.5 10k Frequency (Hz) Output Power vs Supply Voltage 200 1k 0.1% THD+N 3 3.5 4 4.5 5 0 5.5 Supply Voltage (V) Copyright ANPEC Electronics Corp. Rev. A.5 - Apr., 2001 2.5 3 3.5 4 4.5 5 5.5 Supply Voltage (V) 7 www.anpec.com.tw APA4801 Typical Characteristics Cont. Output Power vs Load Resistance Output Power vs Load Resistance 300 100 f=1kHz VDD=5V BW<80kHz Output Power (mW) Output Power (mW) 250 200 150 f=1kHz VDD=3V BW<80kHz 70 10% THD+N 100 60 50 10% THD+N 40 30 20 50 10 1% THD+N 0 8 16 24 32 40 48 56 1% THD+N 0 8 64 16 Supply Voltage (V) 24 32 40 48 56 64 Supply Voltage (V) Noise Floor Channel Separation Output Noise Voltage ( V) 1m RL=8 AV= -1 PO=160mW VDD =5V VDD =5V RL=8 BW<80kHz Output Level (dB) 100 10 1 20 100 1k Channel A to B 20 20k Frequency (Hz) Copyright ANPEC Electronics Corp. Rev. A.5 - Apr., 2001 Channel B to A 100 1k 10k 20k Frequency (Hz) 8 www.anpec.com.tw APA4801 Typical Characteristics Cont. Power Supply Rejection Ratio Frequency Response vs Output Capacitor Size +0 +5 RL=8 AV= -1 VRipple = 200mVrms VDD=5V -10 +0 -30 Output Level (dB) PSRR (dB) -20 CB=1F CB=2.2F -40 -50 -60 -5 CO=1000F CO=470F CO=220F CO=100F -10 -15 CI=10F VDD =5V RL=8 -70 CB=4.7F -8010 100 1k 10k -20 20 100k Frequency (Hz) 100 1k 10k 100k Frequency (Hz) Typical Application vs Frequency Response +5 VDD =5V RL=8 Output Level (dB) +0 CI=0.1F CO=470F -5 CI=1.0F CO=470F -10 -15 -20 20 100 1k 10k 100k Frequency (Hz) Copyright ANPEC Electronics Corp. Rev. A.5 - Apr., 2001 9 www.anpec.com.tw APA4801 Application Note Input Capacitor, Ci Output Coupling Capacitor, Cc In the typical application an input capacitor , Ci , is required to allow the amplifier to bias the input signal to the proper DC level for optimum operation . In this case , the external capacitor Ci and the internal resistance Ri form a high-pass filter with the corner frequency determined in the follow equation : fc (highpass)= 1/ (2RiCi) (1) The value of Ci is important to consider as it directly affects the low frequency performance of the circuit . Consider the APA4801 where Ri is 130k internal fixed . Equation is reconfigured as follow : Ci= 1/(2*130k*fc) (2) And the ceramic capacitor is recommanded In the typical single-supply SE configuration , an output coupling capacitor (Cc) is required to block the DC bias at the output of the amplifier thus preventing DC currents in the load . As with the input coupling capacitor , the output coupling capacitor and impedance of the load form a high-pass filter governed by equation . fc(highpass)= 1/(2RLCc) (4) For example , a 220F capacitor with an 32 speaker would attenuate low frequencies below 22Hz . The main disadvantage , from a performance standpoint, is the load impedance is typically small , which drives the low-frequency corner higher degrading the bass response . Large values of Cc are required to pass low frequencies into the load . Bias Capacitor, Cb As with any power amplifier , proper supply bypassing is critical for low noise performance and high power supply rejection . The capacitor location on both the bypass and power supply pins should be as close to the device as possible . The effect of a larger half supply bias capacitor is improved PSRR due to increased half-supply stability . Typical applications employ a 5V regulator with 10F and a 0.1F bias capacitors which aid in supply filtering . This does not eliminate the need for bypassing the supply nodes of the APA4801 . The selection of bias capacitors , especially Cb , is thus dependent upon desired PSRR requirements , click and pop performance . The capacitor is fed from a 50k source inside the amplifier. To keep the start-up pop as low as possible , the relationship shown in equation should be maintained. 1/(Cb*50k) 1/{Ci*Ri} (3) As an example , consider a circuit where Cb is 4.7F , Ci is 1F and Ri is 130k . Inserting these values into the equation we get 4.26 7.69 which satisfies the rule . Bias capacitor , Cb , values of 2.2F to 10F ceramic or tantalum low-ESR capacitors are recommended for the best THD and noise performance. Copyright ANPEC Electronics Corp. Rev. A.5 - Apr., 2001 Optimizing Depop Circuitry When the amplifier is in mute mode , both of the output stage and input bypass continues to be biased . And no pop noise will be heard during the transition out of mute mode . Power Supply Decoupling , Cs APA4801 is a high-performance CMOS audio amplifier that requires adequate power supply decoupling to ensure the output total harmonic distortion (THD) is as low as possible . Power supply decoupling also prevents the oscillations causing by long lead length between the amplifier and the speaker . The optimum decoupling is achieved by using two different type capacitors that target on different type of noise on the power supply leads . For higher frequency transients , spikes , or digital hash on the line , a good low equivalent-series-resistance (ESR) ceramic capacitor , typically 0.1F placed as close as possible to the device V lead works best . For filtering lowerDD frequency noise signals , a large aluminum electrolytic capacitor of 10F or greater placed near the audio power amplifier is recommended . 10 www.anpec.com.tw APA4801 Packaging Information PDIP-8 pin ( Reference JEDEC Registration MS-001) D E1 E 1 A2 A 1 E3 A1 L e2 e1 e3 Dim Millimeters Min. A A1 A2 D e1 e2 e3 E E1 E3 L 1 Inches Max. 5.33 0.38 2.92 9.02 Min. 3.68 10.16 0.015 0.115 0.355 0.56 1.78 0.014 0.045 7.11 10.92 3.81 0.240 2.54BSC 0.36 1.14 2.92 0.022 0.070 0.300 BSC 0.280 0.430 0.150 0.115 15 Copyright ANPEC Electronics Corp. Rev. A.5 - Apr., 2001 0.145 0.400 0.100BSC 7.62 BSC 6.10 Max. 0.210 15 11 www.anpec.com.tw APA4801 Packaging Information SOP-8 pin ( Reference JEDEC Registration MS-012) 0.015X45 E H e e1 e2 D A1 A 1 L 0.004max. Dim A A1 D E H L e1 e2 1 Millimeters Min. 1.35 0.10 4.80 3.80 5.80 0.40 0.33 Inches Max. 1.75 0.25 5.00 4.00 6.20 1.27 0.51 Min. 0.053 0.004 0.189 0.150 0.228 0.016 0.013 8 0 1.27BSC 0 Copyright ANPEC Electronics Corp. Rev. A.5 - Apr., 2001 Max. 0.069 0.010 0.197 0.157 0.244 0.050 0.020 0.50BSC 12 8 www.anpec.com.tw APA4801 Physical Specifications Terminal Material Lead Solderability Packaging Solder-Plated Copper (Solder Material : 90/10 or 63/37 SnPb Meets EIA Specification RSI86-91, ANSI/J-STD-002 Category 3. 2500 devices per reel Reflow Condition (IR/Convection or VPR Reflow) temperature Reference JEDEC Standard J-STD-020A APRIL 1999 Peak temperature 183C Pre-heat temperature Time Classification Reflow Profiles Convection or IR/ Convection Average ramp-up rate(183C to Peak) 3C/second max. 120 seconds max Preheat temperature 125 25C) 60 - 150 seconds Temperature maintained above 183C Time within 5C of actual peak temperature 10 -20 seconds Peak temperature range 220 +5/-0C or 235 +5/-0C Ramp-down rate 6 C /second max. 6 minutes max. Time 25C to peak temperature VPR 10 C /second max. 60 seconds 215-219C or 235 +5/-0C 10 C /second max. Package Reflow Conditions pkg. thickness 2.5mm and all bgas Convection 220 +5/-0 C VPR 215-219 C IR/Convection 220 +5/-0 C pkg. thickness < 2.5mm and pkg. volume 350 mm Copyright ANPEC Electronics Corp. Rev. A.5 - Apr., 2001 13 pkg. thickness < 2.5mm and pkg. volume < 350mm Convection 235 +5/-0 C VPR 235 +5/-0 C IR/Convection 235 +5/-0 C www.anpec.com.tw APA4801 Reliability test program Test item SOLDERABILITY HOLT PCT TST ESD Latch-Up Method MIL-STD-883D-2003 MIL-STD-883D-1005.7 JESD-22-B, A102 MIL-STD-883D-1011.9 MIL-STD-883D-3015.7 JESD 78 Description 245C , 5 SEC 1000 Hrs Bias @ 125 C 168 Hrs, 100 % RH , 121C -65C ~ 150C, 200 Cycles VHBM > 2KV, VMM > 200V 10ms , Itr > 100mA Carrier Tape & Reel Dimensions H J E F B P1 G C A I D K T2 M W L V T1 A E B C J K F P1 D Application 12 + 0.3 8.0 0.1 1.75 0.1 5.5 0.1 1.55 0.1 1.5 0.25 4.0 0.1 2.0 0.1 6.4 0.1 SOP 8N 12 - 0.1 G I H L V W M T1 T2 Application SOP 8N 5.2 0.1 2.1 0.1 0.30.013 3301 1001 13+0.5 2.20.1 12.5 0.5 2.0 0.2 13 -0.1 (mm) Cover Tape Dimensions 12 9.3 Carrier Width Cover Tape Width (mm) Copyright ANPEC Electronics Corp. Rev. A.5 - Apr., 2001 14 www.anpec.com.tw APA4801 Customer Service Anpec Electronics Corp. Head Office : 5F, No. 2 Li-Hsin Road, SBIP, Hsin-Chu, Taiwan, R.O.C. Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 7F, No. 137, Lane 235, Pac Chiao Rd., Hsin Tien City, Taipei Hsien, Taiwan, R. O. C. Tel : 886-2-89191368 Fax : 886-2-89191369 Copyright ANPEC Electronics Corp. Rev. A.5 - Apr., 2001 15 www.anpec.com.tw