FEATURES: * High-speed address/chip select access time Military: 20/25/30/35/45/55/70/85ns (max.) Commercial: 15/20/25/35/70ns (max.) Low power consumption Battery backup operation 2V data retention voltage (L Version only) Produced with advanced CMOS high-performance technology Inputs and outputs directly TTL-compatible Three-state outputs Available in: 28-pin DIP and SOJ Military product compliant to MIL-STD-883, Class B @ HEE CMOS STATIC RAM IDT7164S gy at 64K (8K x 8-BIT) IDT7164L Integrated Device Technology, Inc. DESCRIPTION: The IDT7164 is a 65,536 bit high-speed static RAM orga- nized as 8K x 8. It is fabricated using IDTs high-performance, high-reliability CMOS technology. Address access times as fast as 15ns are available and the circuit offers a reduced power standby mode. When CS goes HIGH or CS2 goes LOW, the circuit will automatically go to, and remain in, a low-power stand by mode. The low-power (L) version also offers a battery backup data retention capability at power supply levels as low as 2V. Ail inputs and outputs of the 1DT7164 are TTL-compatible and operation is from a single 5V supply, simplifying system designs. Fully static asynchronous circuitry is used, requiring no clocks or refreshing for operation. The IDT7164 is packaged in a 28-pin 300 mil DIP and SOU: and 28-pin 600 mil DIP. Military grade product is manufactured in compliance with the latest revision of MIL-STD-883, Class B, making it ideally suited to military temperature applications demanding the highest level of performance and reliability. FUNCTIONAL BLOCK DIAGRAM Ao ADDRESS DECODER Az Oo VO7 csi CS2 OE WE The IDT logo is a registered trademark of Integrated Device Technology, Inc. CONTROL LOGIC Vec 65,536 BIT GND MEMORY ARRAY VO CONTROL 2967 drw 01 MILITARY AND COMMERCIAL TEMPERATURE RANGES MAY 1996 1996 Integrated Device Technology, Inc. 2967/8 6.41 4(DT7164S/L CMOS STATIC RAM 64K (8K x 8-BIT} MILITARY AND COMMERCIAL TEMPERATURE RANGES PIN CONFIGURATIONS VS ncU1 28]Vcc Ad 2 27 LIWE A7U3 26 ICS2 AsL]4 25 LAs As()s5 24As AsCls D781 a, Ai AzsO}7 D283 22M0E AeLs = p2e-1 21 FlAio Aills 20 JCS1 P28-2 AoLJ 10 19/07 VOoK11 SO285 isos 010] 12 17 [Os VO2T) 13 167) 04 GNDC 14 180s pIP/soy 267 802 TOP VIEW PIN DESCRIPTIONS Name AO-A12 //00-1/07 csi CcS2 Address Data Select Select Write Enable Enable Ground WE OE Power 2967 thi 01 ABSOLUTE MAXIMUM RATINGS Symbol Rating Com'l. Mil. Unit VTERM)| Terminal Voltage | -0.5 to +7.0] -0.5to+7.0] V with Respect to GND TA Operating Oto+70 | -55to+125] C Temperature TBIAS Temperature ~55 to +125 | -65 10 +135] C Under Bias TSTG Storage ~55 to +125] -65to+150] C Temperature PT Power Dissipation 1.0 1.0 WwW lOUT DC Output 50 50 mA Current NOTES: 2967 tb! 03 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. . VTERM must not exceed VCC + 0.5V. TRUTH TABLE*2,9) cs2 Function Xx High-Z |Deselected Standby (ISB1 X | VHC] VHC or] X Cc Xx NOTES: 1. CSz2 will power-down C51, but C51 will not power-down CS2. 2. H=Vit, L= Vit, X = don't care. 3. Vic = 0.2V, Vic = Vcc - 0.2V 2967 tbl 02 RECOMMENDED OPERATING TEMPERATURE AND SUPPLY VOLTAGE Grade Temperature GND vcc Military -5BC to +125C ov 5V + 10% Commercial OC to +70C ov 5V + 10% 2967 tbl 04 RECOMMENDED DC OPERATING CONDITIONS Parameter Vv Min. 45 0 2.2 0.50) T 5.0 0 Max. 5.5 0 co +0 0.8 vec GND VIH VIL Vv NOTE: 2967 tol 05 1. Vi (min.) = 1.5V for pulse width less than 10ns, once per cycle. Vv Vv v Input HIGH LOW Vi 6.1IDT7164S/L CMOS STATIC RAM 64K (8K x 8-BIT) MILITARY AND COMMERCIAL TEMPERATURE RANGES CAPACITANCE (Ta = +25C, f = 1.0MHz) Symbol Parameter Conditions | Max. | Unit CIN Input Capacitance VIN = OV 8 pF cvo VO Capacitance VOUT = 0V 8 pF NOTE: 2967 tbl 06 1. This parameter is determined by device characterization, but is not production tested. DC ELECTRICAL CHARACTERISTICS (Vcc = 5.0V + 10%, VLC = 0.2V, VHC = VEC - 0.2V) 7164815 7164820 7164825 7164S30 7164L15 7164L20 7164L25 7164L30 Symbol Parameter Power| Coml.| Mil. |Com/lL./ Mil. [Com'l.| Mil. [ComL| Mil | Unit Icc1 | Operating Power Supply $s 110 100 110 90 110 _ 100 | mA Current, CS1 = ViL, CS2 = VIH, Outputs Open, VCC = Max., f = 0%) L 100 | 90 100 80 100 - 90 \cc2 | Dynamic Operating Current s 180 } 170 180 170 180 _ 170 | mA CS = VIL, CS2 = VIH, Outputs Open, VCC = Max., f = fMAX! L 150 - 150 160 150 160 150 ISB Standby Power Supply Current $s 20 _ 20 20 20 20 _ 20 mA (TTL Level), CS: 2 VIH or CS2 s VIL VCC = Max., Outputs Open, f = fMAX@) L 3 3 5 3 5 _ 5 \ISB1 Full Standby Power Supply Current Ss 15 _ 15 20 15 20 _ 20 mA (CMOS Level), f = 0), VCC = Max. 1. CS1 2 VHC and CS2 2 VHG, or L 0.2 _ 0.2 1 0.2 1 _ 1 2. CS2 < VLC DC ELECTRICAL CHARACTERISTICS") (Continued) (Vcc = 5.0V + 10%, VLC = 0.2V, VHC = Voc - 0.2V) 7164535 7164845 7164855 [7164S70!?)/a5(4 7164L35 7164L45 7164L55 _|7164L70)a5() Symbol Parameter Power| Coml.) Mil. | ComL| Mil. [Coml.| Mil. | ComLt Mil. | Unit Iec1 Operating Power Supply Ss 90 100 100 _ 100 90 100 | mA Current, CS1 = Vit, CS2 = VIH, Outputs Open, Vcc = Max., f = 08) L 80 90 _ 90 = 90 80 90 Icc2 | Dynamic Operating Current Ss 150 160 - 160 _ 160 150 160 | mA CS1 = Vit, CS2 = VIH, Outputs Open, Vcc = Max., f = fuax) L 130 | 140] | 130 | | 125 | 130 | 120 Isp Standby Power Supply Current Ss 20 20 ~ 20 > 20 20 20 mA (TTL Level), CS1 > Vin, or CS2 < VIL Voc = Max., Outputs Open, f = fmax") L 3 5 5 _ 5 3 5 IsB1 Fuil Standby Power Supply Current S$ 15 20 _ 20 _ 20 15 20 mA (CMOS Level), f = 08), Vcc = Max. 1. CS1 2 Vee and CS2 2 Vue, or L 0.2 1 _ 1 _ 1 0.2 1 2.CS2< Vic NOTES: 2967 tbl 07 4. All values are maximum guaranteed values. 2. 70 ns available in both military and commercial devices. 3. fmax = 1/trc (all address inputs are cycling at fax); f = 0 means no address input lines are changing. 4. Also available: 100ns military devices. 6.1 3IDT7164S/L CMOS STATIC RAM 64K (8K x 8-BIT) MILITARY AND COMMERCIAL TEMPERATURE RANGES DC ELECTRICAL CHARACTERISTICS (Voc = 5.0V + 10%) IDT7164S IDT7164L Symbol Parameter Test Condition Min. Max. Min. Max. Unit Mul Input Leakage Current Vec = Max., MIL. _ 10 - 5 pA Vin = GND to Voc COML, _ 5 _ 2 IILol Output Leakage Current] Vcc = Max., CS1 = Vin, MIL. _ 10 _ 5 pA Vout = GND to Vcc COML. _ 5 _ 2 VOL Output Low Valtage lo. = 8MA, Vcc = Min. 0.4 0.4 Vv lot = 10mA, Voc = Min. - 0.5 _ 0.5 VOH Output High Voltage loH =4mA, Vcc = Min. 2.4 _ 2.4 _ Vv 2967 thi 08 DATA RETENTION CHARACTERISTICS OVER ALL TEMPERATURE RANGES (L Version Only) (VLC = 0.2V, VHC = Vcc - 0.2V) Typ. Max. Vcc @ Vcc @ Symbol Parameter Test Condition Min. 2.0V 3.0V 2.0V 3.0V Unit Vor Vcc for Data Retention _- 2.0 _ _ _~ Vv IccDA Data Retention Current MIL. _ 10 15 200 300 pA COM'L. _ 10 15 60 90 tepr! Chip Deselect to Data 1. CS1 = Vic 0 _ ~ ns Retention Time CS2 2 VHC, or tr) Operation Recovery Time | 2. CS2< Vic tac!) ~ ns nun) Input Leakage Current _ _ = 2 2 pA NOTES: 2967 tbi 09 1. Ta= +25C. 2. trac = Read Cycle Time. 3. This parameter is guaranteed by device characterization, but is not production tested. AC TEST CONDITIONS input Pulse Levels GND to 3.0V Input Rise/Fall Times 5ns Input Timing Reference Levels 1.5V Output Reference Levels 1.5V AC Test Load See Figures 1 and 2 2967 tb) 10 4802 4800 DATA out DATA ouT 2552 30pF* 255Q 5pF* 2967 drw 03 2967 drw 04 Figure 2. AC Test Load Figure 1. AC Test Load (for tcizt, tcLz2, toLz, tcHz1, tcHz2, toHz, tow, and twHz) Includes scope and jig capacitances 6.1 4IDT7164S/L. CMOS STATIC RAM 64K (8K x 8-BIT) MILITARY AND COMMERCIAL TEMPERATURE RANGES AC ELECTRICAL CHARACTERISTICS (vcc = 5.0V + 10%, All Temperature Ranges) 7164815) 716420 7164825 7164830") 7164L15 7164120 7164L25 7164L30 Symbol Parameter Min. | Max. { Min. | Max.| Min. | Max. [ Min. | Max. | Unit Read Cycle tRC Read Cycle Time 15 20 _ 25 _ 30 _ ns taa Address Access Time 15 19 _ 25 _ 29 ns tacs1) |Chip Select-1 Access Tim _ 15 _ 20 - 25 _ 30 ns tacs2l) Chip Select-2 Access Time | 20 = 25 _ 30 - 35 | ns tctz1,2)| Chip Select-1, 2 to Output in Low-Z 5 5 5 _ 5 _ ns toe Output Enable to Output Valid 7 _ 8 12 ~ 15 ns to.z) | Qutput Enable to Output in Low-Z 0 0 _ 0 ~ 0 | ns tcHz1,2!| Chip Select-1, 2 to Output in High-Z | 8 = 9 - 13 13 | ns tonz") Output Disable to Output in High-Z _ 7 _ 8 _ 10 _ 12 ns toH Output Hold from Address Change 5 _ 5 _ 5 - 5 _ ns teu) | Chip Select to Power Up Time 0 0 _ 0 ~ 0 | ns tea) Chip Deselect to Power Down Time _ 15 _ 20 ~ 25 _ 30 ns Write Cycle two Write Cycle Time 15 _ 20 _ 25 _ 30 _ ns tow1,2 |Chip Select to End-of-Write 14 _ 15 _ 18 _ 22 _ ns taw Address Valid to End-of-Write 14 _ 15 ~ 18 _ 22 > ns tas Address Set-up Time 0 _ 0 _ 0 _ 0 _ ns twp Write Pulse Width 14 _ 18 21 23 _ ns twRt Write Recovery Time (C51, WE) 0 0 0 = 0 ns twR2 Write Recovery Time (CS2) 5 _ 5 _ 5 ~ 5 - ns twHz | Write Enable to Output in High-Z 6 _ 8 10 12 | ns tow Data to Write Time Overlap 8 10 _ 13 _ 13 _ ns tDH1 Data Hold from Write Time (CS1, WE) 0 ~ ns tbH2 Data Hold from Write Time (CS2) 5 ~ _ _ _- ns tow | Output Active from End-of-Write 4 _ 4 ~ 4 4 | ns NOTES: 2967 tbi 11 1. O to +70C temperature range only. 2. -55C to +125C temperature range only. Also available: 100ns military devices. 3. Both chip selects must be active for the device to be selected. 4. This parameter is guaranteed by device characterization, but is not production tested. 6.1 5IDT7164S/L CMOS STATIC RAM 64K (8K x 8-BIT) MILITARY AND COMMERCIAL TEMPERATURE RANGES AC ELECTRICAL CHARACTERISTICS (Continued) (Vcc = 5.0V + 10%, All Temperature Ranges) 7164835 7164845 | 7164sss@ | 7164S70/85!) 7164L35 716445") 7164L55@ | 7164L70/85") Symbol Parameter Min. | Max. | Min. | Max.| Min. | Max. Min. | Max. | Unit Read Cycle tRC Read Cycle Time 35 45 _ 55 70/85 |} ns TAA Address Access Time - 35 _ 45 _ 55 | 70/85 | ns tacs1%) |Chip Select-1 Access Time | 35} | 4] 55 | 70/85 | ns tacs2") |Chip Select-2 Access Time }|40]/ | 4] | 55 | 70/85 | ns tctz1,24) Chip Select-1, 2 to Output in Low-Z 5 _ 5 5 5 | ns toe Output Enable to Output Valid _ 18 _ 25 _ 30 | 35/40 | ns to.z) Output Enable to Output in Low-Z 0 _ 0 _ 0 o | ns tcHz1,2")|Chip Select-1, 2 to Output in High-Z | 15] | 2] | 25 | 30/35 | ns tonz | Output Disable to Output in High-Z | 15 _ 20 _ 25 | 30/35 | ns toH Output Hold from Address Change 5 5 5 _ 5 - ns tpu\4) | Chip Select to Power Up Time 0 _ 0 0 _ 0 | ns tp) ~-||Chip Deselect to Power Down Time | 35 _ 45 _ 55 | 70/85 | ns Write Cycle two Write Cycle Time 35 _ 45 _ 55 _ 70/85 | ns tcw1,2 |Chip Select to End-of-Write 25 _ 33 _ 50 _~ 60/75 _ ns tAWw Address Valid to End-of-Write 25 _ 33 - 50 _ 60/75 _ ns tas Address Set-up Time 0 _- 0 _ 0 0 _ ns twPe Write Pulse Width 25 _ 25 50 _ 60/75 _ ns twRi Write Recovery Time (Si, WE) 0 _ ~ 0 ns twRe Write Recovery Time (CS2) 5 _ _ _ 5 _ ns twuz) [Write Enable to Output in High-Z | 14 _ 18 _ 25 | 30/35 | ns tpw Data to Write Time Overlap 15 _- 20 _ 25 _ 30/35 | ns toH1 Data Hold fram Write Time (CS:1, WE) 0 0 _ ~ 0 ns tOH2 Data Hold from Write Time (CS2) 5 _ _ _~ 5 _ ns tow) Output Active from End-of-Write 4 _ 4 _ _ 4 - ns NOTES: 2967 tbl 11 1 2. 3. 4. 0 to +70C temperature range only. ~55C to +125C temperature range only. Also available: 100ns military devices. Both chip selects must be active for the device to be selected. This parameter is guaranteed by device characterization, but is not production tested. 6.1IDT7164S/L CMOS STATIC RAM 64K (8K x 8-BIT} MILITARY AND COMMERCIAL TEMPERATURE RANGES TIMING WAVEFORM OF READ CYCLE NO. 1) tRG ADDRESS CS2 DATA out K DATA VALID TIMING WAVEFORM OF READ CYCLE No. 2:2: 4 tRC q 2967 drw 05 ADDRESS K DATA ouT K Csi CS2 DATA ouT POWER SUPPLY Icc TAA os tOH oo ~ tOH DATA VALID 2967 drw 06 TIMING WAVEFORM OF READ CYCLE NO. 3": 4) \ / y N SN. tacs2 > A pt @$ ti 0 (5) ht tcHz2 >) am tacs1 a (5) Jet tc121(5) _>} pt = tcHz1 tru t DATA VALID \ _ CURRENT Iss NOTES: Eis Low. gQaens . WE is HIGH for Read cycle. _ . Device is continuously selected, CS: is LOW. CS is HIGH. Address valid prior to or coincident with CSi transition LOW and CSz2 transition HIGH. . Transition is measured +200mV from steady state. J tro 2967 drw 07 6.1iDT7164S/. CMOS STATIC RAM 64K (8K x 8-BIT) MILITARY AND COMMERCIAL TEMPERATURE RANGES TIMING WAVEFORM OF WRITE CYCLE NO. 1 (WE CONTROLLED TIMING)": 2 twe > ADDRESS _ x ose f/f // WAAAY oo WW TL + taw twRil3) _ {AS ___7 WE + (4) _ two), #t tow?) oataour twee L. 0w tH, 2 DATAIN DATA VALID 2967 drw 08 TIMING WAVEFORM OF WRITE CYCLE NO. 2 (CS CONTROLLED TIMING)" 2) at twc > ADDRESS _K _xX $$ tas-_____ <I twee 3) ose LILI LUT LLL LLLLLLL DARA t tcw ar| twri |) os AAR! AE KITTLLLLL LLL 1 at taw >- IDw _ tDH1.2 | DATAIN DATA VALID 2967 drw 09 N 1. WE, CS: or CS2 must be inactive during all address transitions. 2. Awrite occurs during the overlap of a LOW WE, a LOW CS: and a HIGH CS2. 3. twni,2 is measured from the earlier of CS: or WE going HIGH or CS2 going LOW to the end of the write cycle. 4. During this period, I/O pins are in the output state so that the input signals must not be applied. 5. Ifthe CS1 LOW transition or CS2 HIGH transition occurs simultaneously with or after the WE LOW transition, the outputs remain in a high-impedance state. 6. OEis continuously HIGH. If GE is LOW during a WE controlled write cycle, the write pulse width must be the larger of twe or (twHz +tow) to allow the 1/O drivers to turn off and data to be placed on the bus for the required tow. If OE is HIGH during a WE controlled write cycle, this requirement does not apply and the minimum write pulse width is as short as the specified twe. 7. Transition is measured +200mV from steady state. 6.1 8IDT7164S/L CMOS STATIC RAM 64K (8K x 8-BIT) LOW Vcc DATA RETENTION WAVEFORM MILITARY AND COMMERCIAL TEMPERATURE RANGES DATA t<| RETENTION _ MODE Voc 4.5V +. + 4.5V tcor + > VoR22V at tr cs 7 Lv \ vw \\AA\AAY Vor 2967 drw 10 ORDERING INFORMATION IDT 7164 Xx XX XXX xX Device Power Speed Package Process/ Type Temperature Range | Blank Commercial (0C to +70C) B Military (-55C to +125C) Compliant to MIL-STD-883, Class B 300 mil SOJ (SO28-5) 300 mil CERDIP (D28-3) 600 mil CERDIP (D28-1) 600 mil Plastic DIP (P28-1) 300 mil Plastic DIP (P28-2) Commercial Only Military Only Speed in nanoseconds Military Only Military Only Military Only Standard Power Low Power 2967 drw 11 6.1