AOZ8328 Low Capacitance 2.5 V TVS Diode General Description Features The AOZ8328 is a transient voltage suppressor array designed to protect high speed data lines from ESD and lightning. ESD protection for high-speed data lines: This AOZ8328 incorporates eight surge rated, low capacitance steering diodes and a TVS in a single package. During transient conditions, the steering diodes direct the transient to either the positive side of the power supply line or to ground. The AOZ8328 may be used to meet the ESD immunity requirements of IEC 61000-4-2, Level 4 and IEC 61000-4-5. The TVS diodes provide effective suppression of ESD voltages: 30 kV (air discharge) and 30 kV (contact discharge). The AOZ8328 comes in a Halogen Free and RoHS compliant DFN-10 3.0 mm x 2.0 mm package and is rated over a -40 C to +85 C ambient temperature range. The AOZ8328 is compatible with both lead free and SnPb assembly techniques. The small size, low capacitance and high ESD protection makes the AOZ8328 ideal for protecting high speed video and data communication interfaces. - IEC 61000-4-2, level 4 (ESD) immunity test - 30 kV (air discharge) and 30 kV (contact discharge) - IEC 61000-4-4 (EFT) 40 A (5/50 ns) - IEC 61000-4-5 (Lightning) 32 A - Human Body Model (HBM) 30 kV Small package saves board space Low insertion loss Protects four I/O lines Low clamping voltage Low operating voltage: 2.5 V Green product Pb-free device Applications 10/100/1000 Ethernet USB 2.0 power and data line protection Video graphics cards Monitors and flat panel displays Digital Video Interface (DVI) T1/E1 telecom ports Typical Application AOZ8328 TP1+ TP1TP2+ 1 2 3 RJ45 Connector 4 5 TP2- AOZ8328 TP3+ GbE Ethernet PHY 6 7 TP3- 8 TP4+ TP4- Figure 1. 10/100/1000 Ethernet Port Connection Rev. 2.0 January 2016 www.aosmd.com Page 1 of 9 AOZ8328 Ordering Information Part Number Ambient Temperature Range Package Environmental AOZ8328DI -40 C to +85 C 3.0 mm x 2.0 mm DFN-10 Green Product AOS Green Products (with "L" suffix) use reduced levels of Halogens, and are also RoHS compliant. Please visit www.aosmd.com/media/AOSGreenPolicy.pdf for additional information. Pin Configuration Line 1 IN 1 Line 2 IN 2 GND 3 Line 3 IN 4 Schematic 10 Line 1 OUT 9 Line 2 OUT 8 GND 7 Line 3 OUT 6 Line 4 OUT Pin 1 LINE 1 In Pin 4 LINE 3 In Pin 10 LINE 1 Out Pin 7 LINE 3 Out Pin 2 LINE 2 In Pin 5 LINE 4 In Pin 9 LINE 2 Out Pin 6 LINE 4 Out GND GND GND Line 4 IN 5 DFN-10 Center Tabs and Pins 3, 8 (Top View) Absolute Maximum Ratings Exceeding the Absolute Maximum ratings may damage the device. Parameter Rating VP - GND 2.5 V Peak Pulse Power (PPK), tP = 8/20 s(1) 450 W Peak Pulse Current (IPP), tP = 8/20 s(1) 32 A Storage Temperature (TS) -65 C to +150 C ESD Rating per IEC61000-4-2, Contact(2) 30 kV ESD Rating per IEC61000-4-2, Air(2) 30 kV ESD Rating per Human Body Model (3) 30 kV Notes: 1. Ratings with 2 pins connected together per the recommended configuration (ie. pin 1 connected to pin 10, pin 2 connected to pin 9, pin 4 connected to pin 7, and pin 5 connected to pin 6). 2. IEC 61000-4-2 discharge with CDischarge = 150 pF, RDischarge = 330 . 3. Human Body Discharge per MIL-STD-883, Method 3015 CDischarge = 100 pF, RDischarge = 1.5 k. Maximum Operating Ratings Parameter Rating Junction Temperature (TJ) Rev. 2.0 January 2016 -40 C to +125 C www.aosmd.com Page 2 of 9 AOZ8328 Electrical Characteristics TA = 25C unless otherwise specified. Symbol Parameter Conditions Min. Max. Units 2.5 V 1 A Positive Transients 4.5 V Negative Transient -4.5 V 8 V -8 V 16 V -18 V 4 pF VRWM Reverse Working Voltage Between any I/O pin and GND(4) IR Reverse Leakage Current VRWM = 2.5 V, between any I/O pin and GND VCL Channel Clamp Voltage Channel Clamp Voltage Positive Transients Typ. (3) IPP = 5 A, tp = 8/20 s, any I/O pin to Ground IPP = 10 A, tp = 8/20 s, any I/O pin to Ground(3) Negative Transient Channel Clamp Voltage Positive Transients IPP = 25 A, tp = 8/20 s, any I/O pin to Ground(3) Negative Transient Cj Junction Capacitance VR = 0 V, f = 1 MHz, any I/O pin to Ground 2.8 VR = 0 V, f = 1 MHz, between I/O 1.4 pins(3) pF Notes: 3. These specifications are guaranteed by design. 4. The working peak reverse voltage, VRWM, should be equal to or greater than the DC or continuous peak operating voltage level. Rev. 2.0 January 2016 www.aosmd.com Page 3 of 9 AOZ8328 Typical Performance Characteristics IO to GND Capacitance IO to IO Capacitance (T = 25C) Normalized Appearance Capacitance Normalized Appearance Capacitance (T = 25C) 1.2 Vbias = 0V Vbias = 1.5V Vbias = 2.5V 1.0 0.8 0.6 0.4 0.2 0 0 1.0 2.0 3.0 4.0 Frequency (MHz) 5.0 1.2 Vbias = 0V Vbias = 1.5V Vbias = 2.5V 1.0 0.8 0.6 0.4 0.2 0 6.0 0 Capacitance vs. Temperature 2.0 3.0 4.0 Frequency (MHz) 5.0 6.0 Clamping Voltage vs. Peak Pulse Current (IEC61000-4-5, tp = 8/20s) (f = 1MHz, Vbias = 0V) 20 1.4 1.2 Clamping Voltage, VCL (V) Normalized Capacitance 1.0 1.0 IO to GND IO to IO 0.8 0.6 0.4 0.2 0 16 12 8 4 0 25 35 Rev. 2.0 January 2016 45 55 65 Temperature (C) 75 85 5 10 15 20 25 Peak Pulse Current, IPP (A) www.aosmd.com Page 4 of 9 AOZ8328 Typical Performance Characteristics (Continued) Forward Voltage vs. Forward Current Insertion Loss (Any IO to GND) (IEC61000-4-5, tp = 8/20s) 20 0 16 -10 -15 12 dB (S21) Forward Voltage (V) -5 8 -20 -25 -30 -35 -40 4 -45 -50 0 5 10 15 Forward Current (A) 20 10 0 25 100 Frequency (MHz) 1000 Insertion Loss (IO to IO) 0 -5 -10 dB (S21) -15 -20 -25 -30 -35 -40 -45 -50 0 Rev. 2.0 January 2016 10 100 Frequency (MHz) www.aosmd.com 1000 Page 5 of 9 AOZ8328 Application Information The AOZ8328 TVS is design to protect four data lines from fast damaging transient over-voltage by clamping the over-voltage to a reference. When the transient on a protected data line exceeds the reference voltage, the steering diode is forward bias and conducts harmful ESD transients away from the sensitive circuitry under protection. PCB Layout Guidelines Printed circuit board layout is the key to achieving the highest level of surge immunity on power and data lines. The location of the protection devices on the PCB is the simplest and most important design rule to follow. The AOZ8328 devices should be located as close as possible to the noise source. The placement of the AOZ8328 devices should be used on all data and power lines that enter or exit the PCB at the I/O connector. In most systems, surge pulses occur on data and power lines that enter the PCB through the I/O connector. Placing the AOZ8328 devices as close as possible to the noise source ensures that a surge voltage will be clamped before the pulse can be coupled into adjacent PCB traces. In addition, the PCB should use the shortest possible traces. A short trace length equates to low impedance, which ensures that the surge energy will be dissipated by the AOZ8328 device. Long signal traces will act as antennas to receive energy from fields that are produced by the ESD pulse. By keeping line lengths as short as possible, the efficiency of the line to act as an antenna for ESD related fields is reduced. Good circuit board layout is critical for the suppression of ESD induced transients. The following guidelines are recommended: 1. Place the TVS near the I/O terminals or connectors to restrict transient coupling. 2. Fill unused portions of the PCB with ground plane. 3. Minimize the path length between the TVS and the protected line. 4. Minimize all conductive loops including power and ground loops. 5. The ESD transient return path to ground should be kept as short as possible. 6. Never run critical signals near board edges. 7. Use ground planes whenever possible. 8. Avoid running critical signal traces (clocks, resets, etc.) near PCB edges. 9. Separate chassis ground traces from components and signal traces by at least 4 mm. 10. Keep the chassis ground trace length-to-width ratio < 5:1 to minimize inductance. 11. Protect all external connections with TVS diodes. Minimize interconnecting line lengths by placing devices with the most interconnect as close together as possible. The protection circuits should shunt the surge voltage to either the reference or chassis ground. Shunting the surge voltage directly to the IC's signal ground can cause ground bounce. The clamping performance of TVS diodes on a single ground PCB can be improved by minimizing the impedance with relatively short and wide ground traces. The PCB layout and IC package parasitic inductances can cause significant overshoot to the TVS's clamping voltage. The inductance of the PCB can be reduced by using short trace lengths and multiple layers with separate ground and power planes. One effective method to minimize loop problems is to incorporate a ground plane in the PCB design. The AOZ8328 low capacitance TVS is designed to protect four high speed data transmission lines from transient over-voltages by clamping them to a fixed reference. The low inductance and construction minimizes voltage overshoot during high current surges. When the voltage on the protected line exceeds the reference voltage the internal steering diodes are forward biased, conducting the transient current away from the sensitive circuitry. Rev. 2.0 January 2016 www.aosmd.com Page 6 of 9 AOZ8328 Package Dimensions, DFN 3.0 x 2.0, 10L D/2 3X b1 D A B 1 2 LxN E/2 E 3X L1 L1 /2 N Pin #1 Dot by Marking bxN e TOP VIEW bbb C A B e1 e2 BOTTOM VIEW A SEATING PLANE aaa C C A1 A2 SIDE VIEW Dimensions in millimeters RECOMMENDED LAND PATTERN 0.65 0.60 0.40 2.56 1.40 1.00 0.50 (1.98) 0.58 0.95 0.25 UNIT: mm Symbols A A1 A2 b b1 D E e e1 e2 L L1 N aaa bbb Min. 0.50 0.00 0.15 0.25 2.90 1.90 0.25 0.95 Nom. 0.60 0.03 (0.15) 0.20 0.35 3.00 2.00 0.60 BSC 0.65 BSC 0.95 BSC 0.30 1.00 10.00 0.08 0.10 Max. 0.65 0.05 0.25 0.45 3.10 2.10 0.35 1.05 Note: 1. Controlling dimensions are in millimeters. Coverted inch dimensions are not necessarily exact. 2. The land pattern is only for reference. Rev. 2.0 January 2016 www.aosmd.com Page 7 of 9 AOZ8328 Tape and Reel Dimensions, DFN 3.0 x 2.0, 10L P2 Carrier Tape E1 A P1 A-A D1 D0 K0 E2 P0 T A0 E A B0 Feeding Direction UNIT: mm Package A0 B0 DFN 3x2_10L 2.20 0.05 3.15 0.05 K0 D0 D1 E 0.76 1.50 1.00 0.05 +0.1/-0.0 +0.05 E1 8.00 1.75 +0.3/-0.1 0.10 E2 P0 P1 3.50 0.05 4.00 0.10 4.00 0.10 P2 P2 2.00 0.20 0.05 0.02 Reel W1 S R K M H N UNIT: mm Tape Size Reel Size 12mm o180 M o180 0.5 N 60 0.5 W1 8.4 +0.5/-0.0 H 13.0 0.2 S 1.5 Min. K 13.5 Min. R 3.0 0.5 Leader / Trailer & Orientation Trailer Tape 300mm Min. Rev. 2.0 January 2016 Components Tape Orientation in Pocket www.aosmd.com Leader Tape 500mm Min. Page 8 of 9 AOZ8328 Part Marking AOZ8328DI (DFN-10) Assembly Location Code BEO A Part Number Code Option Code YWL T Year & Week Code Assembly Lot Code LEGAL DISCLAIMER Applications or uses as critical components in life support devices or systems are not authorized. AOS does not assume any liability arising out of such applications or uses of its products. AOS reserves the right to make changes to product specifications without notice. It is the responsibility of the customer to evaluate suitability of the product for their intended application. Customer shall comply with applicable legal requirements, including all applicable export control rules, regulations and limitations. AOS' products are provided subject to AOS' terms and conditions of sale which are set forth at: http://www.aosmd.com/terms_and_conditions_of_sale LIFE SUPPORT POLICY ALPHA AND OMEGA SEMICONDUCTOR PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. Rev. 2.0 January 2016 2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.aosmd.com Page 9 of 9