Page 1 of 11
Document No. 70-0298-03 │www.psemi.com ©2009-2010 Peregrine Semiconductor Corp. All rights reserved.
Figure 1. Functional Diagram
Figure 2. Package Photo
24-lead 4x4x0.85 mm QFN Package
Product Specification
SP5T Absorptive UltraCMOS™
High-Isolation RF Switch
450-4000 MHz, Vss
EXT
option
PE42451
Features
•
HaRP™-enhanced UltraCMOS™ device
•
Five symmetric, absorptive RF ports
•
High Isolation:
•
68 dB at 450 MHz
•
62 dB at 900 MHz
•
55 dB at 2100 MHz
•
53 dB at 2600 MHz
•
50 dB at 4000 MHz
•
IIP2 of 95 dBm, IIP3 of 58 dBm
•
High ESD tolerance of 3500 V HBM
•
Optional External Vss Control (Vss
EXT
)
•
Three pin CMOS logic control
•
No blocking capacitors required
•
Small RoHS-Compliant 24-lead 4x4 mm
QFN package
The PE42451 is a HaRP™-enhanced Absorptive SP5T RF
Switch developed on the UltraCMOS™ process technology.
This general purpose switch is comprised of five symmetric RF
ports and has very high isolation. An on-chip CMOS decode
logic facilitates a three-pin low voltage CMOS control interface
and an optional external Vss feature (Vss
EXT
). High ESD
tolerance and no blocking capacitor requirements make this the
ultimate in integration and ruggedness.
Peregrine’s HaRP™ technology enhancements deliver high
linearity and exceptional harmonics performance. It is an
innovative feature of the UltraCMOS™ process, providing
performance superior to GaAs with the economy and integration
of conventional CMOS.
Product Description
RF2
RF4
RF5
CMOS
Control/Driver
and ESD
V1 V2
ESD
RF1
V3
RF3
ESD
50Ω
ESD
50Ω
ESD
50Ω
ESD
50Ω
ESD
50Ω
RFC
Vss
EXT
(optional)
Product Specification
PE42451
Page 2 of 11
Document No. 70-0298-03 │ UltraCMOS™ RFIC Solutions ©2009-2010 Peregrine Semiconductor Corp. All rights reserved.
Table 1. Electrical Specifications @ 25 °C, V
DD
= 3.0 V (Z
S
= Z
L
= 50 Ω )
Notes: 1. Please refer to Maximum Operating Power in Table 2
Electrical Parameter Path Condition Min Typ Max Unit
Operating Frequency 450 4000 MHz
Insertion Loss, IL
RFC - RFX
RFC - RFX
RFC - RFX
RFC - RFX
RFC - RFX
450 MHz
900 MHz
2100 MHz
2600 MHz
4000 MHz
1.6
1.65
1.95
2.05
2.25
1.95
2.05
2.30
2.40
2.75
dB
dB
dB
dB
dB
Isolation, Iso
RFC/RFX - RFX
RFC/RFX - RFX
RFC/RFX - RFX
RFC/RFX - RFX
RFC/RFX - RFX
450 MHz
900 MHz
2100 MHz
2600 MHz
4000 MHz
58.5
53.0
46.5
46.5
41.5
68
62
55
53
50
dB
dB
dB
dB
dB
Return Loss, Active Port RFX 450 - 4000 MHz 16 dB
Return Loss, Terminated Port RFX 450 - 4000 MHz 15 dB
Input 1 dB compression
1
, P1dB
RFX - RFC All Bands,100% duty cycle 35 dBm
Input IP2 RFX - RFC All Bands, 100% duty cycle 95 dBm
Input IP3 RFX - RFC All Bands, 100% duty cycle 58 dBm
Switching Time, T
SW
"On"
"Off"
50% Control to 90% RF
50% Control to 10% RF 200
200
500
500
ns
ns
Table 2. Operating Ranges
Parameter Min Typ Max Units
V
DD
Supply Voltage 2.7 3.0 3.3 V
Vss
EXT
Negative Power Supply
Voltage
2
-3.3 -3.0 -2.7 V
I
DD
Max Power Supply Current
V
DD
= 3.3 V, P
MAX
= 33 dBm,
Temperature = -40°C
50 µA
Control Voltage High 0.7 x
V
DD
V
DD
V
Control Voltage Low 0 0.3 x
V
DD
V
I
CTRL
Control Current
3
1 µA
Maximum Operating Power
(RFX-RFC, All Bands (50Ω),
100% duty cycle)
33 dBm
Maximum power into
termination (RFX, All Bands
(50Ω),100% duty cycle)
24 dBm
Operating temperature range -40 +85 °C
Symbol
V
DD
Vss
EXT
I
DD
(max)
V
IH
V
IL
I
CTRL
P
MAX
P
MAX
T
OP
I
DD
Power Supply Current
V
DD
= 3.0 V, P
IN
= 0 dBm I
DD
14 µA
Note: 2. Applied only when external Vss power supply used.
Pin 20 must be grounded when using internal Vss supply.
3. Pull-down resistor in EVK schematic may increase
control current.
Product Specification
PE42451
Page 3 of 11
Document No. 70-0298-03 │www.psemi.com ©2009-2010 Peregrine Semiconductor Corp. All rights reserved.
Table 3. Pin Descriptions
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS™ device, observe the
same precautions that you would use with other ESD-
sensitive devices. Although this device contains
circuitry to protect it from damage due to ESD,
precautions should be taken to avoid exceeding the
specified rating.
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS™
devices are immune to latch-up.
Table 4. Absolute Maximum Ratings
Exceeding absolute maximum ratings may cause
permanent damage. Operation should be restricted to
the limits in the Operating Ranges table.
Symbol Parameter/Conditions Min Max Units
T
ST
Storage temperature range -60 +150 °C
P
MAX
Maximum Operating Power
(RFX-RFC, All Bands (50Ω),
100% duty cycle)
33 dBm
P
MAX
Maximum power into
termination (RFX, All Bands
(50Ω),100% duty cycle)
24 dBm
V
ESD
ESD Voltage HBM
6
, All Pins 3500 V
V
ESD
ESD Voltage MM
7
, All Pins 150 V
Notes: 6. Human Body Model ESD Voltage (HBM, MIL_STD 883
Method 3015.7)
7. Machine Model ESD Voltage (JESD22-A115-A)
Mode V3 V2 V1
All off 0 0 0
RF1 on 0 0 1
RF2 on 0 1 0
RF3 on 0 1 1
RF4 on 1 0 0
RF5 on 1 0 1
All off 1 1 0
Unsupported 1 1 1
Table 5. Truth Table
Exposed
Ground
Paddle
GND
RF5
GND
GND GND
Vdd
V1
V2
GND
RFC
GND
GND
Vss
EXT
/
GND
RF4
24
23
22
21
20
19
18
17
16
15
14
13
2
3
4
5
6
1
V3
RF1
GND GND
GND
RF3
GND
GND
RF2
GND
7
8
9
10
11
12
Figure 3. Pin Configuration (Top View)
Moisture Sensitivity Level
The Moisture Sensitivity Level rating for the PE42451 in
the 24-lead 4x4 QFN package is MSL1.
Note: 4. Blocking capacitors needed only when non-zero DC
voltage present.
5. Pin 20 must be grounded when using internal Vss supply
Switching Frequency
The PE42451 has a maximum 25 kHz switching rate
when the internal negative voltage generator is used
(pin 20=GND). The rate at which the PE42451 can be
switched is only limited to the switching time if an
external -3 V supply is provided (pin 20=Vss
EXT
).
Pin # Name Description
1, 3, 4, 6, 7, 9, 10,
12, 13, 15, 21, 23, 24 GND Ground
2 RF5
4
RF I/O
5 RF4
4
RF I/O
8 RF3
4
RF I/O
11 RF2
4
RF I/O
14 RF1
4
RF I/O
16 V
DD
Supply
17 V1 Switch control input, CMOS logic level
18 V2 Switch control input, CMOS logic level
19 V3 Switch control input, CMOS logic level
20 Vss
EXT
/
GND
5
External Vss Control / Ground
22 RFC
4
RF Common
Paddle GND Ground for proper device operation
Optional External Vss Control (
Vss
EXT
)
For proper operation, the Vss
EXT
control must be
grounded or at the Vss voltage specified in the
Operating Ranges table (Table 2). When the Vss
EXT
control pin on the package is grounded the switch
FET’s are biased with an internal low spur negative
voltage generator. For applications that require the
lowest possible spur performance, Vss
EXT
can be
applied to bypass the internal negative voltage
generator to eliminate the spurs.
Product Specification
PE42451
Page 4 of 11
Document No. 70-0298-03 │ UltraCMOS™ RFIC Solutions ©2009-2010 Peregrine Semiconductor Corp. All rights reserved.
Evaluation Kit
The SP5T switch EK Board was designed to ease
customer evaluation of Peregrine’s PE42451. The RF
common port is connected through a 50 Ω transmission
line via the top SMA connector. RF1, RF2, RF3 and
RF4 are connected through 50 Ω transmission lines via
side SMA connectors. A through 50 Ω transmission is
available via SMA connectors RFCAL1 and RFCAL2.
This transmission line can be used to estimate the loss
of the PCB over the environmental conditions being
evaluated.
The EVK board is constructed with four metal layers on
dielectric materials of Rogers 4003C and 4450 with a
total thickness of 32 mils. Layer 1 and layer 3 provide
ground for the 50 ohm transmission lines. The 50 ohm
transmission lines are designed in layer 2 for high
isolation purpose and use a stripline waveguide design
with a trace width of 9.4 mils and trace metal thickness
of 1.8 mils. The board stack up for 50 ohm transmission
lines has 8 mil thickness of Rogers 4003C between
layer 1 and layer 2, and 10 mil thickness of Rogers
4450 between layer 2 and layer 3. Please consult
manufacturer's guidelines for proper board material
properties in your application. The PCB should be
designed in such a way that RF transmission lines and
sensitive DC i/o traces such as Vss
EXT
are heavily
isolated from one another, otherwise the true
performance of the PE42451 will not be yielded.
Figure 4. Evaluation Board Layouts
Figure 5. Evaluation Board Schematic
Peregrine Specification 102/0569
Peregrine Specification 101/0479
RF CAL
USE PCB 101-0479-03
STRIPL INE
11
33
55
77
2
2
4
4
6
6
8
8
10
10
12
12
14
14
13 13
99
11 11
J
1
HEADER 14
1
2
RFCAL1
1
2
RFC
1
2
RFCAL2
1
2
RF1
R2
1M
1
2
R
F4
1
2
RF5
C6
1µF
1GND
2RF5
3GND
4GND
5RF4
6GND
7GND
8RF3
9GND
10 GND
11 RF2
12 GND
13
GND
14
RF1
15
GND
16
VDD
17
V1
18
V2
19
V3
20
VSS
21
GND
22
RFC
23
GND
24
GND
U1
PE4245x_24L_QFN
1
2
R
F3
1
2
RF2
C1
DNI
R1
0 OHM
R3
0 OHM
C2
100pF
R4
1M
R5
0 OHM
C3
100pF
R6
1M
R7
0 OHM
C4
100pF
R8
1M
R9
0 OHM
C5
100pF
RF
RF5
RF4
RFC
RF1
RF2RF3
V1
V2
V3
VDD
VSS
Product Specification
PE42451
Page 5 of 11
Document No. 70-0298-03 │www.psemi.com ©2009-2010 Peregrine Semiconductor Corp. All rights reserved.
Figure 8. Insertion Loss: All Paths
Performance Plots @ 25 °C and 3.0 V unless otherwise specified
Figure 6. Insertion Loss: RFC-RFX @ 25 °C Figure 7. Insertion Loss: RFC-RFX @ 3.0 V
Product Specification
PE42451
Page 6 of 11
Document No. 70-0298-03 │ UltraCMOS™ RFIC Solutions ©2009-2010 Peregrine Semiconductor Corp. All rights reserved.
Figure 11. Isolation: RFX-RFX @ 25 °C
Performance Plots @ 25 °C and 3.0 V unless otherwise specified
Figure 9. Isolation: RFC-RFX @ 25 °C Figure 10. Isolation: RFC-RFX @ 3.0 V
Figure 12. Isolation: RFX-RFX @ 3.0 V
Product Specification
PE42451
Page 7 of 11
Document No. 70-0298-03 │www.psemi.com ©2009-2010 Peregrine Semiconductor Corp. All rights reserved.
Figure 15. Return Loss: RFC @ 25 °C
Figure 13. Return Loss at active port @ 25 °C Figure 14. Return Loss at active port @ 3.0 V
Performance Plots @ 25 °C and 3.0 V unless otherwise specified (Continued)
Figure 17. Return Loss: All Paths, Terminated
Figure 16. Return Loss: RFC @ 3.0 V
Product Specification
PE42451
Page 8 of 11
Document No. 70-0298-03 │ UltraCMOS™ RFIC Solutions ©2009-2010 Peregrine Semiconductor Corp. All rights reserved.
0
20
40
60
80
100
120
0 1000 2000 3000 4000 5000 6000
Freque ncy [MHz]
IIP2 [dBm]
TX1
TX2
TX3
TX4
TX5
0
10
20
30
40
50
60
70
0 1000 2000 3000 4000 5000 6000
Freque ncy [MHz]
IIP3 [dBm]
TX1
TX2
TX3
TX4
TX5
Figure 19. Nominal Linearity Performance (IIP2) Figure 18. Nominal Linearity Performance (IIP3)
Performance Plots @ 25 °C and 3.0 V unless otherwise specified (Continued)
Product Specification
PE42451
Page 9 of 11
Document No. 70-0298-03 │www.psemi.com ©2009-2010 Peregrine Semiconductor Corp. All rights reserved.
Figure 20. Package Drawing
Peregrine Specification 19/0130
Max. 0.900
Nom. 0.850
Min. 0.800
A
Product Specification
PE42451
Page 10 of 11
Document No. 70-0298-03 │ UltraCMOS™ RFIC Solutions ©2009-2010 Peregrine Semiconductor Corp. All rights reserved.
Figure 21. Tape and Reel Drawing
Device Orientation in Tape
Top of
Device
Pin 1
Tape Feed Direction
A
0
= 4.35
B
0
= 4.35
K
0
= 1.1
Figure 22. Marking Specifications
42451
YYWW
ZZZZZ
YYWW = Date Code
ZZZZZ = Last five digits of Lot Number
Table 6. Ordering Information
Order Code Part Marking Description Package Shipping Method
PE42451MLIAA 42451 PE42451G-24QFN 4x4mm-cut off tape and reel Green 24-lead 4x4mm QFN Bulk or tape cut from reel
PE42451MLIAA-Z 42451 PE42451G-24QFN 4x4mm-3000C Green 24-lead 4x4mm QFN 3000 units / T&R
EK42451-01 PE42451 -EK PE42451-24QFN 4x4mm-EK Evaluation Kit 1 / Box
Product Specification
PE42451
Page 11 of 11
Document No. 70-0298-03 │www.psemi.com ©2009-2010 Peregrine Semiconductor Corp. All rights reserved.
Sales Offices
The Americas
Peregrine Semiconductor Corporation
9380 Carroll Park Drive
San Diego, CA 92121
Tel: 858-731-9400
Fax: 858-731-9499
Europe
Peregrine Semiconductor Europe
Bâtiment Maine
13-15 rue des Quatre Vents
F-92380 Garches, France
Tel: +33-1-4741-9173
Fax : +33-1-4741-9173
For a list of representatives in your area, please refer to our
Web site at: www.psemi.com
Data Sheet Identification
Advance Information
The product is in a formative or design stage. The data
sheet contains design target specifications for product
development. Specifications and features may change in
any manner without notice.
Preliminary Specification
The data sheet contains preliminary data. Additional data
may be added at a later date. Peregrine reserves the right
to change specifications at any time without notice in order
to supply the best possible product.
Product Specification
The data sheet contains final data. In the event Peregrine
decides to change the specifications, Peregrine will notify
customers of the intended changes by issuing a CNF
(Customer Notification Form).
The information in this data sheet is believed to be reliable.
However, Peregrine assumes no liability for the use of this
information. Use shall be entirely at the user’s own risk.
No patent rights or licenses to any circuits described in this
data sheet are implied or granted to any third party.
Peregrine’s products are not designed or intended for use in
devices or systems intended for surgical implant, or in other
applications intended to support or sustain life, or in any
application in which the failure of the Peregrine product could
create a situation in which personal injury or death might occur.
Peregrine assumes no liability for damages, including
consequential or incidental damages, arising out of the use of
its products in such applications.
The Peregrine name, logo, and UTSi are registered trademarks
and UltraCMOS, HaRP, MultiSwitch and DuNE are trademarks
of Peregrine Semiconductor Corp.
High-Reliability and Defense Products
Americas
San Diego, CA, USA
Phone: 858-731-9475
Fax: 848-731-9499
Europe/Asia-Pacific
Parc Cezanne 1
380 Avenue Archimède, Parc de la Duranne
13857 Aix-En-Provence Cedex 3, France
Phone: +33-4-4239-3361
Fax: +33-4-4239-7227
Peregrine Semiconductor, Asia Pacific (APAC)
Shanghai, 200040, P.R. China
Tel: +86-21-5836-8276
Fax: +86-21-5836-7652
Peregrine Semiconductor, Korea
#B-2607, Kolon Tripolis, 210
Geumgok-dong, Bundang-gu, Seongnam-si
Gyeonggi-do, 463-943 South Korea
Tel: +82-31-728-3939
Fax: +82-31-728-3940
Peregrine Semiconductor K.K., Japan
Teikoku Hotel Tower 10B-6
1-1-1 Uchisaiwai-cho, Chiyoda-ku
Tokyo 100-0011 Japan
Tel: +81-3-3502-5211
Fax: +81-3-3502-5213