1 Watt, GaAs pHEMT MMIC Power Amplifier, 27 GHz to 32 GHz HMC1132 Data Sheet APPLICATIONS 1 2 3 4 5 6 7 8 HMC1132 GND NC NC VDD1 NC NC VDD2 GND 9 10 11 12 13 14 15 16 Point-to-point radios Point-to-multipoint radios VSAT and SATCOM Military and space GND NC NC GND RFIN GND NC GND 24 23 22 21 20 19 18 17 GND NC NC GND RFOUT GND NC GND PACKAGE BASE 13528-001 Saturated output power (PSAT): 30.5 dBm at 22% power added efficiency (PAE) High output IP3: 35 dBm High gain: 22 dB DC supply: 6 V at 600 mA No external matching required 32-lead, 5 mm x 5 mm LFCSP package GND VGG NC NC NC NC NC GND FUNCTIONAL BLOCK DIAGRAM 32 31 30 29 28 27 26 25 FEATURES Figure 1. GENERAL DESCRIPTION The HMC1132 is a four-stage, GaAs pHEMT MMIC, 1 watt power amplifier that operates between 27 GHz and 32 GHz. The HMC1132 provides 22 dB of gain and 30.5 dBm of saturated output power at 22% PAE from a 6 V power supply. The HMC1132 exhibits excellent linearity and it is optimized for high capacity, point-to-point and point-to-multipoint radio Rev. 0 systems. The amplifier configuration and high gain make it an excellent candidate for last stage signal amplification before the antenna. The HMC1132 amplifier input/outputs (I/Os) are internally matched to 50 . The device is supplied in a compact, leadless QFN, 5 mm x 5 mm surface-mount package. Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 (c)2016 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com HMC1132 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Interface Schematics .....................................................................5 Applications ....................................................................................... 1 Typical Performance Characteristics ..............................................6 Functional Block Diagram .............................................................. 1 Theory of Operation ...................................................................... 10 General Description ......................................................................... 1 Applications Information ...............................................................11 Revision History ............................................................................... 2 Application Circuit......................................................................11 Specifications..................................................................................... 3 Evaluation Board ............................................................................ 12 Electrical Specifications ............................................................... 3 Bill of Materials ........................................................................... 12 Absolute Maximum Ratings............................................................ 4 Evaluation Board Schematic ..................................................... 13 ESD Caution .................................................................................. 4 Outline Dimensions ....................................................................... 14 Pin Configuration and Function Descriptions ............................. 5 Ordering Guide............................................................................... 14 REVISION HISTORY 7/2016--Revision 0: Initial Version Rev. 0 | Page 2 of 14 Data Sheet HMC1132 SPECIFICATIONS ELECTRICAL SPECIFICATIONS TA = 25C, VDD = VDD1 = VDD2 = 6 V, IDD = 600 mA. Table 1. Parameter FREQUENCY RANGE GAIN Gain Variation over Temperature RETURN LOSS Input Output POWER Output Power for 1 dB Compression Saturated Output Power OUTPUT THIRD-ORDER INTERCEPT SUPPLY VOLTAGE QUIESCENT SUPPLY CURRENT Symbol P1dB Min 27 20 28 PSAT IP3 VDD IDD 4 400 Typ Max 32 22 0.036 Unit GHz dB dB/C 6 14 dB dB 30 dBm 30.5 35 dBm dBm 6 700 Test Conditions/Comments Measurement taken at 6 V at 600 mA, POUT / tone = 20 dBm V mA Rev. 0 | Page 3 of 14 HMC1132 Data Sheet ABSOLUTE MAXIMUM RATINGS Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Table 2. Parameter Drain Voltage Bias RF Input Power (RFIN)1 Channel Temperature Continuous PDISS (T = 85C) (Derate 61 mw/C Above 85C) Thermal Resistance (RTH) Junction to Ground Paddle Maximum Peak Reflow Temperature Storage Temperature Range Operating Temperature Range ESD Sensitivity (Human Body Model) 1 Rating 6.5 V 18 dBm 175C 5.49 W 16.4C/W 260C -40C to +150C -40C to +85C Class 0, passed 150 V ESD CAUTION Maximum PIN is limited to 18 dBm or thermal limits constrained by maximum power dissipation (see Figure 31), whichever is lower. Rev. 0 | Page 4 of 14 Data Sheet HMC1132 32 31 30 29 28 27 26 25 GND VGG NC NC NC NC NC GND PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 1 2 3 4 5 6 7 8 HMC1132 TOP VIEW (Not to Scale) 24 23 22 21 20 19 18 17 GND NC NC GND RFOUT GND NC GND NOTES 1. NC = NO CONNECT. 2. EXPOSED PAD. EXPOSED PAD MUST BE CONNECTED TO RF/DC GROUND. 13528-002 GND NC NC VDD1 NC NC VDD2 GND 9 10 11 12 13 14 15 16 GND NC NC GND RFIN GND NC GND Figure 2. Pin Configuration Table 3. Pad Function Descriptions Pin No. 1, 4, 6, 8, 9, 16, 17, 19, 21, 24, 25, 32 2, 3, 7, 10, 11, 13, 14, 18, 22, 23, 26 to 30 5 12, 15 Mnemonic GND Description Ground. These pins are exposed ground paddles that must be connected to RF/dc ground. NC 20 RFOUT 31 VGG No Connect. These pins are not connected internally. However, all data was measured with these pins connected to RF/dc ground externally. RF Input. This pin is dc-coupled and matched to 50 . See Figure 4 for the RFIN interface schematic. Drain Bias Voltage. External by pass capacitors of 100 pF, 10 nF, and 4.7 F are required. See Figure 5 for the VDD1 and VDD2 interface schematic. RF Output. This pin is ac-coupled and matched to 50 . See Figure 6 for the RFOUT interface schematic. Gate Control for Amplifier. Adjust VGG to achieve the recommended bias current. External bypass capacitors of 100 pF, 10 nF, and 4.7 F are required. See Figure 7 for the VGG interface schematic. Exposed Paddle. The exposed pad must be connected to RF/dc ground. RFIN VDD1, VDD2 EPAD RFOUT Figure 3. GND Interface 13528-006 GND 13528-003 INTERFACE SCHEMATICS Figure 6. RFOUT Interface VGG Figure 4. RFIN Interface 13528-007 13528-004 RFIN Figure 7. VGG Interface 13528-005 VDD1 ,VDD2 Figure 5. VDD1 and VDD2 Interface Rev. 0 | Page 5 of 14 HMC1132 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS 30 28 26 20 GAIN (dB) 0 S22 S21 S11 -10 22 20 +85C +25C -40C 18 -20 16 26 27 28 29 30 31 32 33 34 FREQUENCY (GHz) 14 27 13528-008 -30 25 28 29 30 31 32 33 34 FREQUENCY (GHz) Figure 8. Broadband Gain and Return Loss vs. Frequency 13528-011 RESPONSE (dB) 24 10 Figure 11. Gain vs. Frequency at Various Temperatures 0 0 -2 +85C +25C -40C -5 RETURN LOSS (dB) RETURN LOSS (dB) -4 -6 -8 +85C +25C -40C -10 -10 -15 -12 -20 28 29 30 31 32 33 34 FREQUENCY (GHz) -25 27 13528-009 -16 27 29 30 31 32 33 34 FREQUENCY (GHz) Figure 9. Input Return Loss vs. Frequency at Various Temperatures Figure 12. Output Return Loss vs. Frequency at Various Temperatures 35 35 +85C +25C -40C 5V 5.5V 6V 33 P1dB (dBm) 33 31 29 31 29 27 25 26 27 28 29 30 31 32 FREQUENCY (GHz) 33 Figure 10. P1dB vs. Frequency at Various Temperatures 25 26 27 28 29 30 31 32 FREQUENCY (GHz) Figure 13. P1dB vs. Frequency at Various Supply Voltages Rev. 0 | Page 6 of 14 33 13528-013 27 13528-010 P1dB (dBm) 28 13528-012 -14 HMC1132 35 35 33 33 PSAT (dBm) 31 +85C +25C -40C 29 28 29 30 31 32 33 25 26 13528-014 27 FREQUENCY (GHz) 29 30 31 32 33 35 500mA 600mA 700mA 500mA 600mA 700mA 33 PSAT (dBm) 33 31 29 31 29 27 28 29 30 31 32 33 FREQUENCY (GHz) 25 26 13528-015 27 35 35 IP3 (dBm) 40 30 +85C +25C -40C 29 30 31 32 30 31 33 FREQUENCY (GHz) 32 33 30 500mA 600mA 700mA 25 13528-016 28 29 Figure 18. PSAT vs. Frequency at Various Supply Currents (IDD) 40 27 28 FREQUENCY (GHz) Figure 15. P1dB vs. Frequency at Various Supply Currents (IDD) 25 27 13528-018 27 20 26 28 Figure 17. PSAT vs. Frequency at Various Supply Voltages 35 25 26 27 FREQUENCY (GHz) Figure 14. PSAT vs. Frequency at Various Temperatures P1dB (dBm) 29 27 25 26 IP3 (dBm) 31 13528-017 27 5V 5.5V 6V Figure 16. Output IP3 vs. Frequency at Various Temperatures, POUT/Tone = 20 dBm 20 26 27 28 29 30 31 32 33 FREQUENCY (GHz) Figure 19. Output IP3 vs. Frequency at Various Supply Currents, POUT/Tone = 20 dBm Rev. 0 | Page 7 of 14 13528-019 PSAT (dBm) Data Sheet HMC1132 Data Sheet 60 40 50 35 IM3 (dBc) IP3 (dBm) 40 5V 5.5V 6V 30 27GHz 28GHz 29GHz 30GHz 31GHz 32GHz 30 20 25 27 29 28 32 31 30 33 FREQUENCY (GHz) 0 10 13528-020 20 26 12 50 50 40 40 IM3 (dBc) 27GHz 28GHz 29GHz 30GHz 31GHz 32GHz 22 24 22 24 30 27GHz 28GHz 29GHz 30GHz 31GHz 32GHz 20 10 14 16 18 20 22 24 POUT/TONE (dBm) 0 10 13528-021 12 12 16 18 20 POUT/TONE (dBm) Figure 24. Output IM3 at VDD = 6 V Figure 21. Output Third-Order Intermodulation Distortion (IM3) at VDD = 5.5 V 40 14 13528-024 10 0 10 1000 40 1000 35 875 20 750 IDD (mA) 25 15 10 5 -8 -6 -4 -2 0 2 4 6 8 10 INPUT POWER (dBm) 12 625 25 750 20 15 POUT GAIN PAE IDD 10 5 500 14 13528-022 POUT GAIN PAE IDD 875 30 Figure 22. Power Compression at 27 GHz 0 -10 -8 -6 -4 -2 0 2 4 6 8 10 12 INPUT POWER (dBm) Figure 25. Power Compression at 29.5 GHz Rev. 0 | Page 8 of 14 IDD (mA) 30 POUT (dBm), GAIN (dB), PAE (%) 35 POUT (dBm), GAIN (dB), PAE (%) 20 625 500 14 13528-025 IM3 (dBc) 60 0 -10 18 Figure 23. Output IM3 at VDD = 5 V 60 20 16 POUT/TONE (dBm) Figure 20. Output IP3 vs. Frequency at Various Supply Voltages, POUT/Tone = 20 dBm 30 14 13528-023 10 Data Sheet HMC1132 1000 40 30 25 875 30 20 PAE (%) 750 20 IDD (mA) 25 15 POUT GAIN PAE IDD +85C +25C -40C -6 -4 -2 0 2 4 6 8 10 12 500 14 0 26 INPUT POWER (dBm) 27 28 29 30 31 32 33 FREQUENCY (GHz) Figure 26. Power Compression at 32 GHz 13528-029 -8 5 Figure 29. PAE vs. Frequency at Various Temperatures, PIN = 10 dBm 40 GAIN (dB), P1dB (dBm), PSAT (dBm) 40 35 30 GAIN P1dB PSAT 25 15 500 550 600 650 700 IDD (mA) 30 GAIN P1dB PSAT 25 20 15 5.0 13528-027 20 35 5.2 5.5 5.7 6.0 VDD (V) Figure 27. Gain and Power vs. Supply Current at 29.5 GHz Figure 30. Gain and Power vs. Supply Voltage at 29.5 GHz 0 5 13528-030 0 -10 625 13528-026 5 GAIN (dB), P1dB (dBm), PSAT (dBm) 15 10 10 -10 POWER DISSIPATION (W) +85C +25C -40C -20 ISOLATION (dB) -30 -40 -50 -60 4 3 2 27GHz 28GHz 29GHz 30GHz 31GHz 32GHz -80 26 27 28 29 30 31 32 33 34 FREQUENCY (GHz) 1 -10 -5 0 5 10 INPUT POWER (dBm) Figure 31. Power Dissipation at 85C Figure 28. Reverse Isolation vs. Frequency at Various Temperatures Rev. 0 | Page 9 of 14 15 13528-031 -70 13528-028 POUT (dBm), GAIN (dB), PAE (%) 35 HMC1132 Data Sheet THEORY OF OPERATION The architecture of the HMC1132 power amplifier is shown in Figure 32. The amplifier consists of a cascade of four, singlestage amplifiers. This approach provides a high P1dB as well as a high gain that is flat across the operating frequency range. VDD1 provides drain bias to the first three gain stages, whereas VDD2 provides drain bias to the fourth gain stage. VGG provides gate bias to all four gain stages, allowing control of the total quiescent drain current. RFIN and RFOUT provide dc paths to GND as a way of increasing the overall ESD robustness of the device. VDD1 VDD2 RFIN VGG Figure 32. Architecture and Simplified Block Diagram Rev. 0 | Page 10 of 14 13528-034 RFOUT Data Sheet HMC1132 APPLICATIONS INFORMATION The following is the recommended bias sequence during power-down: The HMC1132 is a GaAs, pHEMT, MMIC power amplifier. Capacitive bypassing is required for VDD1 and VDD2 as well as for VGG (see Figure 33). Drain bias voltage must be applied to both VDD1 and VDD2, and gate bias voltage must be applied to VGG. Though the RFIN and RFOUT ports ac couple the signal, dc paths to GND are provided to increase the ESD robustness of the device. External dc blocking of RFIN and/or RFOUT is desirable when appreciable levels of dc are expected to be present. 1. 2. 3. 4. The VDD = 6 V and IDD = 600 mA bias conditions are the operating points recommended to optimize the overall performance of the device. Unless otherwise noted, the data shown was obtained using the recommended bias condition. Operation of the HMC1132 at different bias conditions may provide performance that differs from what is shown in the Typical Performance Characteristics section. Biasing the HMC1132 for higher drain current typically results in higher P1dB, PSAT, and gain, though at the expense of increased power consumption. All measurements for this device were taken using the typical application circuit shown in Figure 33, configured as shown on the evaluation printed circuit board (PCB). The following is the recommended bias sequence during power-up: 1. 2. 3. 4. 5. Turn off the RF signal. Decrease the gate bias voltage to -2 V to achieve an IDD = 0 mA (approximately). Decrease the drain bias voltages to 0 V. Increase the gate bias voltage to 0 V. Connect the evaluation board to ground. Set the gate bias voltage to -2 V. Set the drain bias voltages to 6 V. Increase the gate bias voltage to achieve a quiescent IDD = 600 mA. Apply the RF signal. APPLICATION CIRCUIT VGG C20 10nF C10 100pF 32 31 30 29 28 27 26 25 C30 4.7F 1 2 3 4 5 6 7 8 24 23 22 21 20 19 18 17 J2 RFOUT 9 10 11 12 13 14 15 16 J1 RFIN HMC1132 C23 4.7F C13 10nF C3 100pF C25 4.7F C15 10nF VDD2 C5 100pF Figure 33. Typical Application Circuit Rev. 0 | Page 11 of 14 13528-032 VDD1 HMC1132 Data Sheet EVALUATION BOARD The evaluation board and populated components are designed to operate over the ambient temperature range of -40C to +85C. During operation, to control the temperature of the HMC1132, attach the evaluation board to a temperature controlled plate. For proper bias sequence, see the Applications Information section. The evaluation board schematic is shown in Figure 35. A fully populated and tested evaluation board (see Figure 34), is available from Analog Devices, Inc., upon request. 13528-033 2 1 The HMC1132 evaluation board is a 2-layer board fabricated using Rogers 4350 and best practices for high frequency RF design. The RF input and RF output traces have a 50 characteristic impedance. The circuit board is attached to a heat sink using SN96 solder and provides a low thermal resistance path. Components are mounted using SN63 solder allowing rework of the surface-mount components without compromising the circuit board to heat sink attachment. Figure 34. Evaluation Printed Circuit Board (PCB) BILL OF MATERIALS Table 4. Bill of Materials for Evaluation PCB EV1HMC1132LP5D Item J1, J2 J3, J4 J5, J6 C3, C5, C10 C13, C15, C20 C23, C25, C30 U1 Heat Sink PCB Description Connector, SRI K connector. SRI PN 25-146-1000-92. DC pins. Connector, SRI K connector. Not populated. 100 pF capacitors, 0402 package. 10,000 pF capacitors, 0402 package. 4.7 F capacitors, Case A package. HMC1132LP5DE amplifier. Used for thermal transfer from the HMC1132LP5DE amplifier. 131393 evaluation board. Circuit board material: Rogers 4350. Rev. 0 | Page 12 of 14 Data Sheet HMC1132 EVALUATION BOARD SCHEMATIC VG1 + NC 26 GND 25 27 NC 28 NC 29 NC 30 NC C23 4.7F C13 10nF GND GND 23 22 21 RFOUT 20 J2 K_SRI-NS 19 18 17 16 15 GND VD2 NC 24 VD7 C3 100pF C5 100pF J3 C15 10nF + C25 4.7F J4 VG1 10 9 VD7 10 9 VD2 8 7 VD5 8 7 VD4 6 5 VD3 6 5 VD6 4 3 VD1 4 3 VD8 2 1 VG2 2 1 87759-1050 J5 K_SRI-NS DEPOP 87759-1050 THRUCAL J6 K_SRI-NS DEPOP Figure 35. Evaluation Board Schematic Rev. 0 | Page 13 of 14 13528-035 VD3 NC GND 9 8 GND NC 7 RFOUT NC 6 GND RFIN 14 K_SRI-NS NC U1 HMC1132LP5DE GND VD1 5 NC 13 RFIN NC 12 4 NC NC J1 GND NC 3 VG GND 2 GND GND 1 11 + 32 C10 100pF 31 C20 10nF 10 C30 4.7F HMC1132 Data Sheet OUTLINE DIMENSIONS PIN 1 INDICATOR 0.30 0.25 0.18 24 1 0.50 BSC 3.15 3.00 SQ 2.85 EXPOSED PAD 8 17 TOP VIEW 6 BSC SIDE VIEW 0.55 0.50 0.35 1.53 1.34 1.15 COPLANARITY 0.08 PIN 1 INDICATOR 32 25 16 9 BOTTOM VIEW 3.50 REF 0.50 MIN FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. PKG-000000 SEATING PLANE 08-06-2015-A 5.10 5.00 SQ 4.90 Figure 36. 32-Lead Lead Frame Chip Scale Package [LFCSP] 5 mm x 5 mm Body and 1.34 mm Package Height (HCP-32-2) Dimensions shown in millimeters ORDERING GUIDE Model 1 HMC1132LP5DE Temperature Range -40C to +85C MSL Rating 2 MSL3 Package Description 3, 4 32-Lead Lead Frame Chip Scale Package [LFCSP] Package Option HCP-32-2 Package Marking 5 H1132 XXXX HMC1132LP5DETR -40C to +85C MSL3 32-Lead Lead Frame Chip Scale Package [LFCSP] HCP-32-2 H1132 XXXX EV1HMC1132LP5D Evaluation board When ordering the evaluation fixture only, reference the model number, EV1HMC1132LP5D. Maximum peak reflow temperature of 260C. 3 HMC1132LP5DE lead finish is NiPdAu. 4 The HMC1132LP5DE is a premolded copper alloy lead frame. 5 HMC1132LP5DE 4-digit lot number is represented by XXXX. 1 2 (c)2016 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D13528-0-7/16(0) Rev. 0 | Page 14 of 14