Copyright © 2014
Microsemi
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1
Rev. 1.2., November 25, 2014
Analog Mixed Signal Group
One Enterprise Aliso Viejo, CA 92656 USA
CONFIDENTIAL
PD70224
IdealBridge™ Dual MOSFET-based Bridge Rectifier
Figure 1
Description
PD70224 is a dual pack of MOSFET-based full-bridge
rectifiers. It contains low-R
DS
0.16Ω N-channel MOSFETs
for much higher overall efficiency and higher output
power, particularly when used in Powered Devices for
Power over Ethernet (PoE) applications. The entire drive
circuitry for driving the MOSFETs is on-chip, including a
charge pump for driving the high-side N-channel
MOSFETs. The total forward drop (bridge offset)
introduced by the IdealBridge™ rectifier is only 192mV
at 0.6A, compared to a standard bridge rectifier that
typically presents 2000mV of forward drop.
PD70224 IdealBridge™ can support over 1A current,
making it the ideal choice not only for modern energy-
saving 2-pair applications compliant with IEEE802.3af
and IEEE802.3at (Type 1 and Type 2), but also 4-pair
Powered Devices such as UPOE and POH (Power over
HDBase-T, 95W).
In addition, PD70224 is capable of helping to identify at
the physical layer itself whether a 2-pair PSE or a 4-pair
PSE is providing power over the cable. It does that by
sensing the voltage on the line (un-rectified) side of the
pairs.
Features
♦ Active circuit with low forward-drop to
replace dissipative passive diode bridges
♦ Self-contained drive circuitry for MOSFETs
♦ Designed to support IEEE802.3af/at, UPOE
and Power over HDBase-T (PoH)
♦ Integrated 0.16Ω N-Channel MOSFETs for
0.32Ω total path resistance
♦ “Power present” indicator signals for
identifying 4-pair bridge power
♦ Low leakage, < 10µA during detection
♦ Wide operating voltage range up to 57V
♦ -40°C to +85°C ambient
♦ Available in 40 pin package
♦ RoHS Compliant
Applications
• Power over Ethernet (all IEEE
compliant 2-pair modes)
• Proprietary 4-pair standards, UPOE
(Universal PoE) and POH
Copyright © 2014
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Rev. 1.2., November 25, 2014
Analog Mixed Signal Group
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CONFIDENTIAL
PD70224
IdealBridge™ Dual MOSFET-based Bridge Rectifier
Pin Configuration and Pinout
Figure 2: Internal Construction and Pinout
Ordering Information
*Year / Week / Lot number
Ambient
Temperature
Type Package Part Number Packaging
Type
Part Marking
-
RoHS
compliant, Pb-
free,
MSL3
MLP
-
Quad (40
lead)
PD7022
4
ILQ
Bulk/Tube
Microsemi Logo
MSC
PD70224
YYWWX*
PD7022
4
ILQ
-
TR
Tape and
Reel
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Analog Mixed Signal Group
One Enterprise Aliso Viejo, CA 92656 USA
CONFIDENTIAL
PD70224
IdealBridge™ Dual MOSFET-based Bridge Rectifier
Pin Number
PD70224
MLP-Quad
40 lead
Pin Designator Description
1, 2, 3
OUTP
Rectified positive (upper) rail shared by both bridges
4 N.A. Not applicable (pin not present)
5, 6, 7, 8
IN2B
Input “2” of bridge rectifier number B
9 N.A. Not applicable (pin not present)
10, 11, 12 OUTN Rectified negative (lower) rail shared by both bridges
13, 14 IN2A Input “2” of bridge rectifier number A. Same as Pins 39
and 40.
Note: These pins are not shorted to pins 39 and 40 inside
the device. The device functionality relies on a copper
trace on the PCB, between pins 13, 14, 39 and 40.
15 N.A. Not applicable (pin not present)
16 SUPP_SA Input power supply detect pin for bride rectifier number A.
Goes high when pairs connected to this bridge are
powered by the PSE
N.A. Not applicable (pin not present)
17 SUPP_SB Input power supply detect pin for bride rectifier number B.
Goes high when pairs connected to this bridge are
powered by the PSE
18
N.A.
Not applicable (pin not present)
19, 20 IN1A Input “1” of bridge rectifier number A. Same as Pins 33
and 34.
Note: These pins are not shorted to pins 33 and 34 inside
the device. The device functionality relies on a copper
trace on the PCB,
between pins 33, 34, 19 and 20.
21, 22, 23 OUTN Rectified negative (lower) rail shared by both bridges,
same as Pins 10, 11 and 12
24
N.A.
Not applicable (pin not present)
25, 26, 27, 28 IN1B Input “1” of bridge rectifier number B
29
N.A.
Not
applicable (pin not present)
30, 31, 32 OUTP Rectified positive (upper) rail shared by both bridges.
Same as Pins 1, 2 and 3
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Analog Mixed Signal Group
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CONFIDENTIAL
PD70224
IdealBridge™ Dual MOSFET-based Bridge Rectifier
33, 34 IN1A Input “1” of bridge rectifier number A. Same as Pins 19
and 20.
Note: These pins are not shorted to pins 19 and 20 inside
the device. The device functionality relies on a copper
trace on the PCB, between pins 33, 34, 19 and 20.
35 N.A. Not applicable (pin not present)
36 WA_EN While this input is low (referenced to OUTN) the chip work
according to internal flow diagram. When this input is
high, it enable wall adapter feature, i.e. turn OFF internal
switches and act as regular diode bridge.
N.A.
Not applicable (pin not present)
37
N.C
Not connected; do not connect externally (leave floating)
38 N.A. Not applicable (pin not present)
39, 40 IN2A Input “2” of bridge rectifier number A. Same as Pins 13
and 14.
Note: These pins are not shorted to pins 13 and 14 inside
the device. The device functionality relies on a copper
trace on the PCB, between pins 13, 1
4, 39 and 40.
41
EPAD1
Connect to OUTP on PCB
42 EPAD2 Connect to OUTN on PCB
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Rev. 1.2., November 25, 2014
Analog Mixed Signal Group
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CONFIDENTIAL
PD70224
IdealBridge™ Dual MOSFET-based Bridge Rectifier
Figure 3: Block Diagram
Copyright © 2014
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Rev. 1.2., November 25, 2014
Analog Mixed Signal Group
One Enterprise Aliso Viejo, CA 92656 USA
CONFIDENTIAL
PD70224
IdealBridge™ Dual MOSFET-based Bridge Rectifier
Figure 4: Principle of Operation
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Rev. 1.2., November 25, 2014
Analog Mixed Signal Group
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CONFIDENTIAL
PD70224
IdealBridge™ Dual MOSFET-based Bridge Rectifier
Absolute Maximum Ratings
Performance is not necessarily guaranteed over this entire range. These are maximum stress ratings only.
Exceeding these ratings, even momentarily, can cause immediate damage, or negatively impact long-term
operating reliability.
Min Max Units
IN1
A, IN1B, IN2A, IN2
B
to OUTN
-
0.3
7
4
V
IN1A to IN2A
-
0.3
7
4
V
IN1B to IN2B
-
0.3
7
4
V
IN1A, IN1B, IN2
A
, IN2
B to OUTP
-
7
4
V
IN1A, IN2A to IN1B -0.3 74 V
IN1A, IN2A to IN2B
-
0.3
7
4
V
OUTP to OUTN
-
0.3
7
4
V
OUTP to IN1A, IN1B, IN2A, IN2B -0.3 74 V
SUPP_SA, SUPP_SB to OUTN
-
0.3
7
4
V
WA_EN to OUTN
-
0.3
5.5
V
I
INA
, I
INB
(currents through bridge A or B)
1.5
A
Junction Temperature
150
°C
Lead Soldering Temperature (40s, reflow) 260 °C
Storage Temperature
-
65
150
°C
ESD rating HBM ±1250 * V
MM ±100 V
CDM
±
2
0
00
V
(*) All pins pass 1250v, Except IN1A and IN2A that Pass 1000v
Note: EPAD1 is connected by copper plane on PCB to OUTP, and EPAD2 is similarly connected to OUTN. OUTN is ground for IC.
Operating Ratings
Performance is generally guaranteed over this range as further detailed below under Electrical Characteristics.
Min
Max
Units
IN1A, IN1
B to OUTN
57
V
IN2A, IN2B to OUTN 57 V
WA_EN to OUTN -0.3 5 V
Junction Temperature
-
40
125
°C
Port
Current
(I
INx
)
0
1
.5
A
Note: Corresponding Ambient Temperature is -40 to 85 °C
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CONFIDENTIAL
PD70224
IdealBridge™ Dual MOSFET-based Bridge Rectifier
Thermal Properties
Thermal Resistance Min Typ Max Units
θ
JA
31
°C/W
θ
JL
2.5
°C/W
θ
JC
5 °C/W
Note: The θ
Jx
numbers assume no forced airflow. Junction Temperature is calculated using T
J
= T
A
+ (P
D
x θ
JA
). In particular, θ
JA
is a
function of the PCB construction. The stated number above is for a four-layer board in accordance with JESD-51 (JEDEC).
Electrical Characteristics
Unless otherwise specified under conditions, the Min and Max ratings stated below apply over the entire
specified operating ratings of the device. Typ values stated are either by design or by production testing at 25°C
ambient.
Symbol Parameter Conditions Min Typ Max Units
V
INx
Input Voltage for Bridge
“x”, where x is “A” or “B”
.
57 V
∆I
Q
Differential Quiescent
Current
I(Vin=10.1V) – I(Vin=2.5V);
2.5V < V
INx
< 10.1V;
No load between OUTP &
OUTN;
No load on SUPP_Sx pins.
6
10
µA
I
Q
Quiescent Current
(single bridge)
10.2V < V
INx
< 23V;
No load between OUTP &
OUTN;
No load on SUPP_Sx pins.
85 µA
Quiescent Current
(both bridge combined)
V
INx
= 55V;
No load between OUTP &
OUTN;
No load on SUPP_Sx pins.
900 µA
V
TURN_ON
Active turn-on voltage of
FET
s
23.1 27.5 32 V
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CONFIDENTIAL
PD70224
IdealBridge™ Dual MOSFET-based Bridge Rectifier
Symbol
Parameter
Conditions
Min
Typ
Max
Units
V
HYST
Turn-on voltage
hysteresis
0.4 V
T
ALT
Alternate input voltage
polarity – Delay time
required (Vin = 0V) while
alternating input voltage
polarity
200 ms
V
OFFSET
Bridge offset @ Off state V
INx
< V
TURN_ON
, two body
diodes in series
I
INx
= 40mA
1.8 V
R
DS
FET Drain to Source
Resistance
I
D
= 0.6A
T
J
= 25
o
C
0.16
0.26
Ω
I
D
= 0.6A;
-
40
o
C
≤
T
J
≤
125
o
C
0.38 Ω
I
R
Leakage Current
(Reverse)
V
OUTP
– V
OUTN
= 57V 80 µA
V
BFD
Backfeed Voltage Between input terminals
with 100kΩ resistor across
them and 57V between
OUTP and OUTN
2.7 V
I
MAX_Off
Maximum Forward
Current (per bridge)
below V
TURN_ON
0.45 A
I
MAX_On
Maximum input Current
above V
TURN_ON.
Per bridge, while only
one bridge out of the two
is active.
1.5 A
I
MAX_LOAD
Maximum Load Current
above V
TURN_ON.
Per
device while two bridges
are active and each
bridge is supporting half
load
2 A
V
D_SUPP
Maximum voltage drop
between INx to SUPP_Sx
pins
Supp_Sx Loaded with
100kΩ resistor
2 V
I
MAX
_S
UPP
Max
imum
c
u
rrent
to
10
mA
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CONFIDENTIAL
PD70224
IdealBridge™ Dual MOSFET-based Bridge Rectifier
consume from SUPP_Sx
pins
V
IH
WA_EN - Input high logic 1.35 V
V
IL
WA_EN
-
Input low logic
1.05
V
2
3
4
5
6
7
8
9
10
70 75 80 85 90 95 100 105
Input Current (A)
Input Voltage (V)
PD70224 SOA
1mS
10mS
100mS
1S
Single Pulse
Temp = 25degC
Figure 5: Safe Operating Area
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Analog Mixed Signal Group
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CONFIDENTIAL
PD70224
IdealBridge™ Dual MOSFET-based Bridge Rectifier
Applications Information
PD70224 application is described in the following paragraph
Peripheral devices
PD applications utilizing PD70224 IC should use 1nF/100V ceramic capacitor at Bridge A inputs and at Bridge B
inputs.
A unidirectional 58V TVS should be placed between device output pins.
An 10K ohm resistor should be placed on SUPP_SA and SUPP_SB lines between PD70224 and PD70210A device.
When WA_EN function is not used connect WA_EN pin to OUTN Pin.
When WA_EN function is used connect a 10V/100nF capacitor between WA_EN pin and OUTN Pin.
The Devices are presented in Figure 6
and
Figure 7.
Operation with an External DC Source
PD applications utilizing PD70224 IC may be operated with an external power source (DC wall adaptor). There
are two cases of providing power with an external source, the cases are presented in Figure 6
and
Figure 7.
1) External source connected to application’s low voltage supply rails. External source voltage level is
dependent on DCDC output characteristics. This connection is not affected by the PD70224 use.
2) External source connected to PD device output connection toward the application (VPP to VPN
OUT
).
External source voltage level is dependent on DCDC input requirements.
Figure 6: External Power Input connected to Application supply Rails
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CONFIDENTIAL
PD70224
IdealBridge™ Dual MOSFET-based Bridge Rectifier
Figure 7: External Power Input connected to PD70210A Output
External source connected to PD device output (Figure 7)
PD70224 WA_EN pin will be used for protecting the PSE when an external adapter is connected.
In this mode the risk to PSE side exists, when a higher voltage external adapter is hot connected to the system.
When WA_EN input voltage is higher than its threshold level, PD70224 internal FETs are disabled, converting the
device into standard diode bridge.
The PD70210A has a specific input pin, to disable the isolation switch, when an External adapter is connected.
In this case WA_EN resistors divider depends on the “turn off” threshold of the PD70210A and of PD70224.
Figure 8 is zooming into the resistors to be selected in external adapter connection.
Figure 8: External Power Input resistors dividers
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CONFIDENTIAL
PD70224
IdealBridge™ Dual MOSFET-based Bridge Rectifier
R1 and R2 sets a rough threshold for Pfet Q1 enable, to detect whether external adapter exists or not. It should
be set to be lower threshold than PD70224 and PD70210A disable levels.
R3, R4 and R5 sets PD70210A disable threshold and PD70224 disable threshold.
PD70210A disable threshold should be set so that it will always be lower than PD70224 disable threshold.
1 Volt is a good choice for the margin between the two.
So in case of 44V-57V external adapter. The disable setting can be selected as follows:
Pfet enable threshold = 35V.
PD70224 disable threshold = 43V.
R1 and R2 setting should be so that the value of Q1 VGS < 20V at max voltage condition of external adapter.
While external adapter voltage is above 35V, Q1 will be above its VGS
th
value.
 _ 1
1 2
Suppose VGS
th
is 3.5V thus we will set VGS=5V.
R1 is selected as 2KΩ.
2 1 _ 

Using R1=2KΩ, Vext_adapter=30V and VGS= maximum VGS
th
=3.5V. we get R2 value.
2 15Ω
70210__ __70210x 4
3 4"
2 1 _ 

2 60ΩR3, R4 and R5 are set using the two equations below:
Copyright © 2014
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Analog Mixed Signal Group
One Enterprise Aliso Viejo, CA 92656 USA
CONFIDENTIAL
PD70224
IdealBridge™ Dual MOSFET-based Bridge Rectifier
(I)
70224__ __70224x
$%
$&'$('$%"
(II)
70210__ __70210x
$('$%
$&'$('$%"
Set R3, R4 and R5 up to few KΩ.
At equation (I) set Vext_adapter_PD70224 =44V and from PD70224 data sheet PD70224 _WA_EN=1.35V.
At equation (II) set Vext_adapter_PD70210A=(minimum Vext_adapter_PD70224 -1V) and from PD_IC data
sheet PD70210A_WA_EN=2.4V.
R5 is selected as 620 Ω.
Solving the two equations plus accuracy and verifying that PD70210A is always disconnected before PD70224,
we get the optimum resistors values for an adapter of adapter of 36V and above.
3 15Ω
4 820Ω
5 620Ω
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CONFIDENTIAL
PD70224
IdealBridge™ Dual MOSFET-based Bridge Rectifier
Package Outline Drawing 40 Pin QFN 6x8 mm
Dim
M
ILLIMETERS
I
NCHES
MIN MAX MIN MAX
A
0.80
1.00
0.031
0.039
A1
0.00
0.05
0
0.002
A3
0.20 REF
0.008 REF
b
0.18
0.30
0.007
0.012
D
6.00 BSC
0.236 BSC
E
8.00 BSC
0.315 BSC
D2
4.25
4.5
0.167
0.177
E2
6.35
6.6
0.250
0.260
E3
3.50
3.75
0.138
0.148
E4
2.20
2.46
0.087
0.097
e
0.50 BSC
0.020 BSC
K
0.30
-
0.012
-
L1
0.37
0.57
0.014
0.022
L2
0.30
0.50
0.012
0.020
Note:
1. Dimensions do not include protrusions; these shall not exceed 0.155mm (.006”) on any side. Lead dimension shall not include solder coverage.
2. Dimensions are in millimeters, inches for reference only.
e
b
D2
L2
K
D
E
A
A1
A3
x
x
x
x
X - depopulated pin
xx
x x
E2
E4
E3
1
13
21
33
L1
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Analog Mixed Signal Group
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CONFIDENTIAL
PD70224
IdealBridge™ Dual MOSFET-based Bridge Rectifier
PD70224 Recommended PCB layout for 40 Pin QFN 6x8 mm
Recommended PCB layout pattern for PD70224 is described in the following three figures.
Pad of pins number 4, 9, 15, 18, 24, 29, 35 and 38 are missing from the layout because it do not exist in package.
Figure 9: PD70224 Top layer Copper Recommended PCB Layout (mm)
Figure 10: PD70224 Top layer Solder Mask, Solder Paste and Vias Recommended PCB Layout (mm)
Figure 11:
PD70224 Bottom layer Copper and Solder Paste Recommended PCB Layout for Thermal Pad Array (mm)
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PD70224
IdealBridge™ Dual MOSFET-based Bridge Rectifier
Design example
Next four figures illustrates the layout of PD70224 EVB evaluation board for reference.
The board is two layers PCB.
U2 is PD70224.
This board can be ordered from Microsemi.
Figure 12: PD70224 EVB PCB Silk Top
Figure 13: PD70224 EVB PCB Top Copper
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Rev. 1.2., November 25, 2014
Analog Mixed Signal Group
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CONFIDENTIAL
PD70224
IdealBridge™ Dual MOSFET-based Bridge Rectifier
Figure 14: PD70224 EVB PCB Silk Bottom
Figure 15: PD70224 EVB PCB Bottom Copper
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CONFIDENTIAL
PD70224
IdealBridge™ Dual MOSFET-based Bridge Rectifier
The information contained in the document (unless it is publicly available on the Web without access restrictions) is
PROPRIETARY AND CONFIDENTIAL information of Microsemi and cannot be copied, published, uploaded, posted,
transmitted, distributed or disclosed or used without the express duly signed written consent of Microsemi. If the recipient of
this document has entered into a disclosure agreement with Microsemi, then the terms of such Agreement will also apply
. This document and the information contained herein may not be modified, by any person other than authorized personnel
of Microsemi. No license under any patent, copyright, trade secret or other intellectual property right is granted to or
conferred upon you by disclosure or delivery of the information, either expressly, by implication, inducement, estoppels
or otherwise. Any license under such intellectual property rights must be approved by Microsemi in writing signed by an
officer of Microsemi.
Microsemi reserves the right to change the configuration, functionality and performance of its products at anytime without
any notice. This product has been subject to limited testing and should not be used in conjunction with life-support or other
mission-critical equipment or applications. Microsemi assumes no liability whatsoever, and Microsemi disclaims any
express or implied warranty, relating to sale and/or use of Microsemi products including liability or warranties relating to
fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right.
Any performance specifications believed to be reliable but are not verified and customer or user must conduct and complete
all performance and other testing of this product as well as any user or customers final application. User or customer shall
not rely on any data and performance specifications or parameters provided by Microsemi. It is the customer’s and user’s
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information contained herein is provided “AS IS, WHERE IS” and with all faults, and the entire risk associated with such
information is entirely with the User. Microsemi specifically disclaims any liability of any kind including for consequential,
incidental and punitive damages as well as lost profit. The product is subject to other terms and conditions which can be
located on the web at http://www.microsemi.com/legal/tnc.asp
Revision History
Revision Level /
Date
Para. Affected
Description
0.7 / 14 May 2014 Initial Release – Preliminary version
0.72 / 22 May 2014 Add dimensions to reccomended layout add IMAX_LOAD
0.73 / 23 June 2014 Update leadframe for thermal pad
1.0 / 20 Aug 2014 Update maximum SUPP_Sx current, application information , adding
SOA graph. Update MSL level.
1.1 / 29 October 2014 Updating ESD
1.2 / 22 November 2014 Remove Watermark, Updating ESD with IN1A / IN2A 1000v note
© 2014 Microsemi Corp.
All rights reserved.
For support contact: sales_AMSG@microsemi.com
Visit our web site at: www.microsemi.com Catalog Number: DS_PD70224