MITSUBISHI <CONTROL / DRIVER IC> M56693FP/GP Bi-CMOS & DMOS 32BIT SERIAL-INPUT LATCHED DRIVER DESCRIPTION The M56693 is a semiconductor integrated circuit that has a built- PIN CONFIGURATION (TOP VIEW) in, 32-bit shift register and a latch of CMOS structure with serial Operating temperature: -20 - 75C APPLICATION 23 HVO12 24 HVO13 25 HVO14 26 HVO15 27 HVO16 28 HVO17 29 HVO18 20 HVO 9 37 19 HVO 8 18 HVO 7 38 M56693FP 39 17 HVO 6 40 16 HVO 5 41 15 HVO 4 42 14 HVO 3 43 13 HVO 2 44 12 HVO 1 VH SOUT VDD N.C LGND 1 Vacuum Fluorescent Display ANODE DRIVER FUNCTION CLK 6 LAT 7 BLK 8 SIN 9 VH 10 PGND 11 Driver supply voltage: VH=120V 21 HVO10 36 5 Latch circuit included for each stage 22 HVO11 35 4 Cascade connections possible through serial output 34 3 Serial input-serial/parallel output HVO23 HVO24 HVO25 HVO26 HVO27 HVO28 HVO29 HVO30 HVO31 HVO32 PGND 2 FEATURES 30 HVO19 Employed are BI-CMOS and high pressure proof DMOS processing technology. 31 HVO20 33 HVO22 parallel output driver of high pressure proof DMOS structure. 32 HVO21 input and serial/parallel output, and a 32-bit totem-pole-type The M56693 comprises a 32-bit D type flip-flop with a 32 latches connected to its output. Outline 44P6N-A (FP) In accordance with truth table 1, inputting data to SIN and clock pulse to CLK allows SIN signal to be put into the internal shift register when the clock changes from "H" to "L", and simultaneously shift register data to be shifted sequentially. 25 N.C 26 HVO12 27 HVO13 28 HVO14 29 HVO15 30 HVO16 31 HVO17 22 HVO10 40 21 HVO 9 41 20 HVO 8 42 43 19 HVO 7 M56693GP 18 N.C 14 HVO 3 48 13 HVO 2 HVO 1 12 15 HVO 4 47 11 16 HVO 5 46 10 17 HVO 6 45 9 44 8 latch. 23 HVO11 39 7 be output if BLK input is turned to "H", irrespective of data from the 24 N.C 38 6 from the latch to be output if BLK input is turned to "L", and "L" to 37 CLK LAT BLK SIN VH PGND retained if LAT is turned to "L". Driver output HVOn allows data N.C N.C HVO23 HVO24 HVO25 HVO26 HVO27 HVO28 HVO29 HVO30 HVO31 HVO32 PGND 1 VH 2 SOUT 3 VDD 4 LGND 5 pass data through if LAT input is turned to "H", and data to be 32 HVO18 In accordance with truth table 2, parallel output allows the latch to 33 HVO19 in the series. 34 HVO20 M56693 SIN when more than one M56693 is used to expand bits 35 HVO21 36 HVO22 Serial output SOUT is used by connecting to the next stage Outline 48P6D-A (GP) N.C: no connection MITSUBISHI <CONTROL / DRIVER IC> M56693FP/GP Bi-CMOS & DMOS 32BIT SERIAL-INPUT LATCHED DRIVER BLOCK DIAGRAM (Note : Pin No. in paretheses are of M56693GP) HVO 1 (12) 12 HVO 2 (13) 13 HVO 3 (14) 14 HVO30 HVO31 HVO32 41 (46) 42 (47) 43 (48) Output protect circuit VDD 1 10 3 VH (2)(10) 11 (4) PGND 44 (1)(11) 8 BLK (8) LAT Q Q Q Q Q Q L D L D L D L D L D L D 7 5 (7) LGND (5) 9 SIN D Q D Q D Q D Q D Q D Q T T T T T T (9) 4 6 CLK 2 SOUT (3) N.C (18)(24)(25) (37)(38) (6) TRUTH TABLE Truth table 1. Shift register section CLK Shift register operation DATA is shifted. H or L No changes. Truth table 2. Latch and driver sections Dn LAT BLK HVOn X X H Output all "L" H H L H L H L L X L L Latch's data output. Dn=nth bit DFF retention data HVOn=nth bit driver output L="L" level H="H" level X="L" level or "H" level MITSUBISHI <CONTROL / DRIVER IC> M56693FP/GP Bi-CMOS & DMOS 32BIT SERIAL-INPUT LATCHED DRIVER PIN FUNCTION DESCRIPTION Pin name VDD LGND VH PGND CLK SIN SOUT LAT BLK HVO1 - 32 Function Logic stage supply voltage Logic stage ground Output stage supply voltage Output stage ground Clock input for the internal shift resister. The data enter the internal shift resisters and the data in the shift registers will be shifted in order by High to Low change of the clock. Serial data input Serial data output Latch input. When the LATCH is set to "H", the data in the shift resister will enter the each latch circuit. When the LATCH input is set to "L", the data will be held. Enable input for output control. When the BLK input is set to "L", data in the latch circuit will appear at outputs. When the BLK input is set to "H", all outputs will be set to "L". Output driver (push-pull) ABSOLUTE MAXIMUM RATINGS (Ta=25C, unless otherwise noted) Symbol VDD VH VI VO VHVO Pd Tstg Parameter Logic stage supply voltage Output stage supply voltage Logic inputs voltage Logic outputs voltage Outputs voltage Power dissipation range Storage temperature range Conditions Data output High supply voltage output pin Ta 25C Ratings -0.3 - 7 -0.3 - 120 -0.3 - VDD+0.3 -0.3 - VDD+0.3 -0.3 - VH 940 -55 - 150 Unit V V V V V mW C Ratings 4.5 - 5.5 10 - 110 -20 - 75 Unit RECOMMENDED OPERATING CONDITIONS Symbol VDD VH Topr Parameter Supply voltage Supply voltage Operating temperature Conditions V V C ELECTRICAL CHARACTERISTICS (VDD=5V, VH=110V and Ta=25C, unless otherwise noted) Symbol Parameter IDD Supply current 1 IH Supply current 2 IIH "H" input current IIL VHVOH VHVOL VOH VOL IHVOH IHVOL VTH VTL "L" input current Driver output voltage Logic output voltage "H" output current "L" output current Output protect operating voltage Test conditions Min. No load Output all "L", no load Output all "H", no load VIH=5V Input pin VIL = 0V SIN, LAT, CLK BLK IHVOH = -0.5mA IHVOL = 0.5mA IOH = -0.1mA IOL = 0.1mA High supply voltage output pin High supply voltage output pin 100 4.5 Limits Typ. 1 0 2 0 0 Max. 2 50 4 2 -2 -20 106 0.7 4.95 0.04 -100 -1 1 3.4 3.1 -3 3 2 0.4 Unit mA A mA A A A V V mA mA V V MITSUBISHI <CONTROL / DRIVER IC> M56693FP/GP Bi-CMOS & DMOS 32BIT SERIAL-INPUT LATCHED DRIVER SWITCHING CHARACTERISTICS (VDD=5V, VH=110V and Ta=25C, unless otherwise noted) Symbol Parameter fCLK tPLH(SO) tPHL(SO) tPLH(OUT) tPHL(OUT) trout tfout Test conditions Clock frequency Min. Limits Typ. Max. Duty = 45 - 55% Logic output propagation time CL = 15pF Driver output propagation time 8 300 300 2 1 2.5 2 120 100 1 0.16 1.3 RO = 220K CO = 50pF Driver output rise and fall time 0.35 TEST CIRCUIT input VDD VH SOUT PG CL DUT (1) Pulse generator characteristics tr20ns tf20ns (2) Capacitance CL includes connection floating capacitance and probe input capacitance. : RO=220K : CO=50pF HVOn 50 CO RO TIMING WAVEFORM 1/fmax CLK 50% 50% SIN 50% 50% 50% th trso tsu tfso SOUT 90% 50% 90% 50% 10% 10% tPHL(SO) tPLH(SO) BLK 50% 50% trOUT HVOn 10% tPLH(OUT) 90% 50% tfOUT 90% 50% tPHL(OUT) 10% Unit MHz ns ns s s s s MITSUBISHI <CONTROL / DRIVER IC> M56693FP/GP Bi-CMOS & DMOS 32BIT SERIAL-INPUT LATCHED DRIVER TYPICAL CHARACTERISTICS Driver output VON-IOH Thermal derating 10 IOH(mA) Ta=+75C 0.5 0 8 Ta=+25C Ta=-20C 6 "H" output current Power dissipation Pd (W) 1.0 0.94 4 2 0 0 25 50 75 0 100 2 Duty cycle vs Permissible output current 1 - 13 1 - 8 9 9 7 24 6 32 4 3 2 1 IOH (mA) 16 8 Output current IOH (mA) 10 10 14 9 Output current 8 Duty cycle vs Permissible output current 10 5 6 "H" output voltage VON (V) Temperature Ta (C) 8 4 5 7 6 16 4 24 3 32 2 1 0 0 20 40 60 80 100 Duty cycle (%) Note * Ta=25C * Repeated frequency >100Hz * Figure in the circle represents the number of concurrently operating output circuits. * Current value denotes a numerical value per circuit. 0 0 20 40 60 80 100 Duty cycle (%) Note * Ta=75C * Repeated frequency >100Hz * Figure in the circle represents the number of concurrently operating output circuits. * Current value denotes a numerical value per circuit. Note 1. VDD=5V and VH=110V, unless otherwise noted 2. Thermal derating characteristics represent those of an individual IC unit. 3. Allowable duty cycle output current characteristics represent that when a standard substrate is mounted. (Standard substrate: 70x70x1.6mm glass epoxy)