w DATA SHEET SURFACE-MOUNT CERAMIC MULTILAYER CAPACITORS High-voltage: NP0/X7R (Pb Free & RoHS compliant) 1K V TO 4K V Product specification - Sep 30, 2005 V. 1 10 pF to 33 nF g Product specification Surface-Mount Ceramic Multilayer Capacitors SCOPE High-voltage 2 13 1K V to 4K V FEATURES Supplied in tape on reel Nickel-barrier end termination APPLICATIONS PCs, hard disk, game PCs Power supplies LCD panel ADSL, modem This specification describes Highvoltage NP0/X7R series chip capacitors with lead-free terminations. NP0/X7R ORDERING INFORMATION Components may be ordered by using either a Phycomp's unique 12NC or Phycomp clear text code. PHYCOMP ORDERING CODE 12NC CODE 2 2 X X X X X X X X X X Capacitance value(1) Carrier type 50 blister 38 paper 54 bulk Tolerance 5 5% 6 10% Rated voltage - Termination 00 1K V; NiSn 02 2K V; NiSn 04 3K V; NiSn 50 4K V; NiSn Temperature characteristic 1 NP0 5 X7R Size 1 1206 2 1210 3 1808 4 1812 Packaging(2) 1 reel: 180 mm; 7" 5 reel: 330 mm; 13" 4 bulk case SCM042 (1) Refer to "Conversion table of capacitance & last 2 digits of 12NC" (2) Quantity on reel depends on thickness classification; see section "Thickness classification and packing quantities for 1K V to 4K V". Conversion table of capacitance & last 2 digits of 12NC for NP0 CAP. (pF) LAST 2 DIGITS OF 12NC CAP. (pF) LAST 2 DIGITS OF 12NC CAP. (pF) LAST 2 DIGITS OF 12NC CAP. (pF) LAST 2 DIGITS OF 12NC CAP. (pF) LAST 2 DIGITS OF 12NC 1.0 10 8.2 22 68 34 560 46 4,700 58 1.2 11 10 23 82 35 680 47 5,600 59 1.5 12 12 24 100 36 820 48 6,800 61 1.8 13 15 25 120 37 1,000 49 8,200 62 2.2 14 18 26 150 38 1,200 51 10,000 63 2.7 15 22 27 180 39 1,500 52 12,000 64 3.3 16 27 28 220 41 1,800 53 15,000 65 3.9 17 33 29 270 42 2,200 54 18,000 66 4.7 18 39 31 330 43 2,700 55 22,000 67 5.6 19 47 32 390 44 3,300 56 6.8 21 56 33 470 45 3,900 57 www.yageo.com Sep 30, 2005 V.1 g Product specification Surface-Mount Ceramic Multilayer Capacitors High-voltage NP0/X7R 3 13 1K V to 4K V Conversion table of capacitance & last 2 digits of 12NC for X7R CAP. (pF) LAST 2 DIGITS OF 12NC CAP. (pF) LAST 2 DIGITS OF 12NC CAP. (pF) LAST 2 DIGITS OF 12NC CAP. (pF) LAST 2 DIGITS OF 12NC 100 10 680 21 4,700 32 33,000 43 220,000 54 120 11 820 22 5,600 33 39,000 44 270,000 55 150 12 1,000 23 6,800 34 47,000 45 330,000 56 180 13 1,200 24 8,200 35 56,000 46 390,000 57 220 14 1,500 25 10,000 36 68,000 47 470,000 58 270 15 1,800 26 12,000 37 82,000 48 560,000 59 330 16 2,200 27 15,000 38 100,000 49 680,000 61 390 17 2,700 28 18,000 39 120,000 51 820,000 62 470 18 3,300 29 22,000 41 150,000 52 560 19 3,900 31 27,000 42 180,000 53 CTC CAP. LAST 2 DIGITS (pF) OF 12NC CODE Size Temp. code Char. Capacitance Tolerance Rated voltage 1206 CG = NP0 225 = 2,200,000 pF; J = 5% 1210 2R = X7R the third digit signifies K = 10% the multiplying factor: 1808 0=x1 1812 1 = x 1,0 2 = x 1,00 E = 1K V Termination Packing Series G = 3K V 0 = No marking 0 = conv. ceramic 3 = 330 mm; 13" paper D = BME B = 180 mm; 7" blister H = 4K V F = 330 mm; 13" blister F = 2K V B = NiSn Marking 2 = 180 mm; 7" paper P = Bulk case 3 = x 1,000 4 = x 10,000 5 = x 100,000 6 = x 1,000,000 8 = x 0.01 9 = x 0.1 Example: 1808CG100JGBB00 www.yageo.com Sep 30, 2005 V.1 g Product specification Surface-Mount Ceramic Multilayer Capacitors High-voltage NP0/X7R 1K V to 4K V 4 13 CONSTRUCTION The capacitor consists of a rectangular block of ceramic dielectric in which a number of interleaved metal electrodes are contained. This structure gives rise to a high capacitance per unit volume. The inner electrodes are connected to the two end terminations and finally covered with a layer of plated tin (NiSn). The terminations are lead-free. A cross section of the structure is shown in Fig.1. terminations electrodes MLB457 ceramic material Fig. 1 Surface mounted multilayer ceramic capacitor construction DIMENSION Table 1 For dimension see Table 1 TYPE CC1206 CC1210 CC1808 CC1812 L1 (mm) 3.20.20 3.2 0.20 4.5 0.30 4.5 0.30 W (mm) 1.60.20 2.5 0.20 2.0 0.30 3.2 0.30 W T T (mm) L2 L4 L1 L3 MBB211 Fig. 2 Surface mounted multilayer ceramic capacitor dimension L2/L3 (mm) L4 (mm) Refer to table 2 to 4 min. 0.25 0.25 0.25 0.25 max. 0.75 0.75 0.75 0.75 min. 1.40 1.40 2.20 2.20 www.yageo.com Sep 30, 2005 V.1 g Product specification Surface-Mount Ceramic Multilayer Capacitors High-voltage NP0/X7R 5 13 1K V to 4K V CAPACITANCE RANGE & THICKNESS FOR NP0 1K/2K V Table 2 For NP0 1K/2K V sizes from 1206 to 1812 CAPACITANCE (pF) 1K V 1206 1210 1808 1812 2K V 1206 1.25 0.20 1.00 0.10 1210 1808 1812 1.25 0.20 1.25 0.20 1.25 0.20 10 12 15 18 22 27 33 0.8 0.10 39 47 56 68 82 100 120 1.25 0.20 1.25 0.20 150 180 220 0.8 0.10 1.00 0.10 1.25 0.20 270 330 0.85 0.10 390 1.15 0.15 470 0.85 0.10 560 680 1.15 0.15 820 1,000 1,200 1.15 0.15 1,500 1,800 2,200 1.25 0.20 2,700 3,300 NOTE 1. Values in shaded cells indicate thickness class in mm. 2. Capacitance range < 10 pF is on request. www.yageo.com Sep 30, 2005 V.1 g Product specification Surface-Mount Ceramic Multilayer Capacitors High-voltage NP0/X7R 1K V to 4K V 6 13 CAPACITANCE RANGE & THICKNESS FOR NP0 3K/4K V Table 3 For NP0 3K/4K V sizes from 1808 to 1812 CAPACITANCE (pF) 3K V 1808 1812 4K V 1808 1812 10 12 15 1.5 0.10 18 22 1.5 0.10 27 33 39 1.15 0.15 1.15 0.15 47 56 same 68 82 100 120 150 180 220 1.6 0.20 2.0 0.20 270 330 390 1.6 0.20 470 560 680 NOTE 1. Values in shaded cells indicate thickness class in mm. 2. Capacitance range < 10 pF is on request. www.yageo.com Sep 30, 2005 V.1 g Product specification Surface-Mount Ceramic Multilayer Capacitors High-voltage NP0/X7R 7 13 1K V to 4K V CAPACITANCE RANGE & THICKNESS FOR X7R 1K/2K/3K V Table 4 For X7R 1K/2K/3K V sizes from 1206 to 1812 CAPACITANCE (pF) 1K V 1206 470 0.8 0.10 1210 1808 1812 1808 1812 3K V 1808 1.25 0.20 1,000 1.25 0.20 1.15 0.15 1.35 0.15 2,200 3,300 1.6 0.20 1.35 0.15 2.0 0.20 1.35 0.15 1.35 0.15 4,700 6,800 1210 1.6 0.20 680 1,500 2K V 1206 1.25 0.20 1.25 0.20 1.25 0.20 1.6 0.20 1.6 0.20 10,000 15,000 22,000 1.6 0.20 33,000 2.0 0.20 2.0 0.20 1.25 0.20 1.6 0.20 47,000 NOTE 1. Values in shaded cells indicate thickness class in mm. www.yageo.com Sep 30, 2005 V.1 g Product specification Surface-Mount Ceramic Multilayer Capacitors High-voltage NP0/X7R 1K V to 4K V 8 13 THICKNESS CLASSES AND PACKING QUANTITY Table 5 DESCRIPTION SIZE CODE THICKNESS CLASSIFICATION (mm) 8 mm TAPE WIDTH/AMOUNT PER REEL O180 mm, 7" O330 mm, 13" 12 mm TAPE WIDTH /AMOUNT PER REEL Paper Blister Paper Blister O180 mm, 7" Blister 0603 0.8 0.10 4,000 --- --- --- --- 0805 0.6 0.10 4,000 --- --- --- --- 0.8 0.10 4,000 --- --- --- --- 0.85 0.10 4,000 --- --- --- --- 1.25 0.20 --- 3,000 --- --- --- 0.6 0.10 4,000 --- 20,000 --- --- 0.8 0.10 4,000 --- --- --- --- 0.85 0.10 4,000 --- 15,000 --- --- 1.00 0.10 --- 3,000 --- 10,000 --- 1.15 0.15 --- 3,000 --- 10,000 --- 1.25 0.20 --- 3,000 --- --- --- 0.6 0.10 --- 4,000 --- 15,000 --- 0.85 0.10 --- 4,000 --- 10,000 --- 1.15 0.15 --- 3,000 --- 10,000 --- 1.25 0.20 --- 3,000 --- --- --- 1.6 0.20 --- 2,000 --- --- --- 1.15 0.15 --- --- --- --- 1,500 1.25 0.20 --- --- --- --- 3,000 1.35 0.15 --- --- --- --- 1,000 1.5 0.10 --- --- --- --- 1,000 1.6 0.20 --- --- --- --- 2,000 2.0 0.20 --- --- --- --- 2,000 0.85 0.10 --- --- --- --- 2,000 1.15 0.15 --- --- --- --- 1,500 1.25 0.20 --- --- --- --- 1,000 1.35 0.15 --- --- --- --- 1,000 1.5 0.10 --- --- --- --- 1,000 1.6 0.20 --- --- --- --- 1,000 2.0 0.20 --- --- --- --- 2,000 1206 1210 Mid/High voltage 1808 1812 www.yageo.com Sep 30, 2005 V.1 g Product specification Surface-Mount Ceramic Multilayer Capacitors High-voltage NP0/X7R 9 13 1K V to 4K V ELECTRICAL CHARACTERISTICS NP0/X7R DIELECTRIC CAPACITORS; NISN TERMINATIONS Unless otherwise stated all electrical values apply at an ambient temperature of 201 C, an atmospheric pressure of 86 to 106 kPa, and a relative humidity of 63 to 67%. Table 6 VALUE DESCRIPTION Capacitance range (1) Capacitance tolerance (1) Dissipation factor NP0 X7R 10 pF to 33 nF 5% and 10% (D.F.) (1): Insulation resistance after 1 minute at Ur (DC) 0.1% 2.5% Rins 10 G or Rins x C 500 seconds whichever is less Maximum capacitance change as a function of temperature (temperature characteristic/coefficient): NP0 X7R Operating temperature range: NP0/X7R 30 ppm/C 15% -55 C to +125 C NOTE 1. NP0: frequency = 1 MHz for C 1 nF, measuring at voltage 1 Vrms; frequency = 1 KHz for C > 1 nF, measuring at voltage 1 Vrms X7R: frequency = 1 KHz for C 10 F, measuring at voltage 1 Vrms. www.yageo.com Sep 30, 2005 V.1 g Product specification Surface-Mount Ceramic Multilayer Capacitors High-voltage NP0/X7R 10 13 1K V to 4K V TESTS AND REQUIREMENTS Table 7 Test condition, procedure and requirements TEST Mounting Visual inspection and dimension check Capacitance TEST METHOD PROCEDURE REQUIREMENTS IEC 6038421/22 4.3 The capacitors may be mounted on printed-circuit boards or ceramic substrates No visible damage 4.4 Any applicable method using x 10 magnification In accordance with specification 4.5.1 NP0: f = 1 MHz for C 1 nF, measuring at voltage 1 Vrms at 20 C; f = 1 KHz for C > 1 nF, measuring at voltage 1 Vrms at 20 C Within specified tolerance X7R: f = 1 KHz for C 10 F, measuring at voltage 1 Vrms at 20 C Dissipation factor (D.F.) 4.5.2 NP0: f = 1 MHz for C 1 nF, measuring at voltage 1 Vrms at 20 C; f = 1 KHz for C > 1 nF, measuring at voltage 1 Vrms at 20 C In accordance with specification X7R: f = 1 KHz for C 10 F, measuring at voltage 1 Vrms at 20 C Insulation resistance Voltage proof 4.5.3 At Ur (DC) for 1 minute In accordance with specification 4.5.4.2 Test voltage (DC) applied for 1 minute No breakdown or flashover Ur 100 V: 2.5 x Ur applied to NP0/X7R series 100 V < Ur 200 V: 1.5 x Ur +100 V applied to NP0/X7R series 200 V < Ur 500 V: 1.3 x Ur +100 V applied to NP0/X7R series Ur > 500 V: 1.3 x Ur applied to NP0/X7R series I: 7.5 mA Temperature characteristic Adhesion 4.6 Between minimum and maximum temperature NP0: lC/Cl: 30 ppm/C X7R: lC/Cl: 15% 4.15 A force applied for 10 seconds to the line joining the terminations and in a plane parallel to the substrate for size 0603: a force of 5 N applied for size 0402: a force of 2.5 N applied No visible damage www.yageo.com Sep 30, 2005 V.1 g Product specification Surface-Mount Ceramic Multilayer Capacitors Table 7 High-voltage NP0/X7R 11 13 1K V to 4K V Test condition, procedure and requirements (continued) TEST Bond strength of plating on end face TEST METHOD PROCEDURE REQUIREMENTS IEC 6038421/22 Mounting in accordance with IEC 60384-22 paragraph 4.3 No visible damage Conditions: bending 1 mm at a rate of 1 mm/s, radius jig 340 mm NP0: lC/Cl: 1% or 0.5 pF whichever is greater 4.8 X7R: lC/Cl: 10% Resistance to soldering heat 4.9 Precondition: 150 +0/-10 C for 1 hour, then keep for 24 1 hours at room temperature Preheating: for size 1206: 120 to 150 C for 1 minute Preheating: for size >1206: 100 to 120 C for 1 minute and 170 to 200 C for 1 minute Solder bath temperature: 260 5 C Dipping time: 10 0.5 seconds The termination shall be well tinned NP0: lC/Cl: 0.5% or 0.5 pF whichever is greater X7R: lC/Cl: 10% D.F.: within initial specified value Rins: within initial specified value Recovery time: 24 2 hours. Solderability 4.10 Unmounted chips completely immersed in a solder bath at 235 5 C The termination shall be well tinned. Dipping time: 2 0.5 seconds Depth of immersion: 10 mm Rapid change of temperature 4.11 Preconditioning; 150 +0/-10 C for 1 hour, then keep for 24 1 hours at room temperature No visual damage 5 cycles with following detail: 30 minutes at lower category temperature; 30 minutes at upper category temperature X7R: lC/Cl: 15% NP0: lC/Cl: 1% or 1 pF whichever is greater D.F.: within initial specified value Rins: within initial specified value Recovery time 24 2 hours. Damp heat, with Ur load 4.13 Initial measurements; after 150 +0/-10 C for 1 hour, then keep for 24 1 hours at room temperature NP0: lC/Cl: 2% or 1 pF whichever is greater Duration and conditions: 500 12 hours at 40 2 C; 90 to 95% RH; Ur applied X7R: lC/Cl: 15% Final measurement: perform a heat treatment at 150 +0/-10 C for 1 hour, final measurements shall be carried out 24 1 hours after recovery at room temperature without load. NP0: D.F.: 2 x initial value max. X7R 100 V: D.F. 5% NP0: Rins 2,500 M or Rins x Cr 25 seconds, whichever is less X7R: Rins 500 M or Rins x Cr 25 seconds, whichever is less www.yageo.com Sep 30, 2005 V.1 g Product specification Surface-Mount Ceramic Multilayer Capacitors Table 7 High-voltage NP0/X7R 12 13 1K V to 4K V Test condition, procedure and requirements (continued) TEST Endurance TEST METHOD PROCEDURE REQUIREMENTS IEC 6038421/22 Preconditioning; Initial measurements; after 150 +0/-10 C for 1 hour, then keep for 24 1 hours at room temperature NP0: lC/Cl: 2% or 1 pF whichever is greater 4.14 X7R: lC/Cl: 15% Duration and conditions: 1,000 12 hours at upper category temperature with 1.5 x Ur voltage applied NP0: D.F.: 2 x initial value max. Final measurement: perform a heat treatment at 150 +0/-10 C for 1 hour, final measurements shall be carried out 24 1 hours after recovery at room temperature without load. NP0: Rins 4,000 M or Rins x Cr 40 seconds, whichever is less X7R 100 V: D.F. 5% X7R: Rins 1,000 M or Rins x Cr 50 seconds, whichever is less www.yageo.com Sep 30, 2005 V.1 g Product specification Surface-Mount Ceramic Multilayer Capacitors High-voltage NP0/X7R 1K V to 4K V 13 13 REVISION HISTORY REVISION DATE CHANGE NOTIFICATION DESCRIPTION Version 1 Sep 30, 2005 - - Thickness revised Version 0 Sep 12, 2005 - - New www.yageo.com Sep 30, 2005 V.1