SERIAL PRESENCE DETECT PC100 SODIMM PC100 SODIMM(144pin) SPD Specification (128Mb B-die base) Rev. 0.1 February 2000 Rev 0.1 Feb. 2000 SERIAL PRESENCE DETECT PC100 SODIMM M464S0924BT1-L1H/L1L, C1H/C1L * Organization : 8MX64 * Composition : 8MX16 *4 * Used component part # : K4S281632B-TL1H/L1L, C1H/C1L * # of rows in module : 1 row * # of banks in component : 4 banks * Feature : 1,000 mil height & double sided component * Refresh : 4K/64ms * Contents : Byte # Function described Function Supported -1H -1L Hex value -1H 0 # of bytes written into serial memory at module manufacturer 1 Total # of bytes of SPD memory device 2 Fundamental memory type 3 # of row address on this assembly 4 # of column address on this assembly 5 # of module Rows on this assembly 6 Data width of this assembly 64 bits 40h 7 ...... Data width of this assembly - 00h 8 Voltage interface standard of this assembly 9 SDRAM cycle time from clock @CAS latency of 3 10ns 10 SDRAM access time from clock @CAS latency of 3 6ns 11 DIMM configuraion type 12 Refresh rate & type 13 Primary SDRAM width 14 Error checking SDRAM width 15 Minimum clock dealy for back-to-back random column address 16 SDRAM device attributes : Burst lengths supported 17 SDRAM device attributes : # of banks on SDRAM device 18 SDRAM device attributes : CAS latency 19 SDRAM device attributes : CS latency 20 SDRAM device attributes : Write latency 21 SDRAM module attributes 22 SDRAM device attributes : General Note -1L 128bytes 80h 256bytes (2K-bit) 08h SDRAM 04h 12 0Ch 1 9 09h 1 1 Row 01h LVTTL 01h 10ns A0h 6ns 60h Non parity A0h 2 60h 2 00h 15.625us, support self refresh 80h x16 10h None 00h tCCD = 1CLK 01h 1, 2, 4, 8 & full page 8Fh 4 banks 04h 2&3 06h 0 CLK 01h 0 CLK 01h Non-buffered/Non-Registered & redundant addressing 00h +/- 10% voltage tolerance, Burst Read Single bit Write 0Eh precharge all, auto precharge 23 SDRAM cycle time @CAS latency of 2 10ns 12ns A0h C0h 2 24 SDRAM access time @CAS latency of 2 6ns 7ns 60h 70h 2 25 SDRAM cycle time @CAS latency of 1 - - 00h 00h 2 26 SDRAM access time @CAS latency of 1 - - 00h 00h 2 27 Minimum row precharge time (=tRP) 20ns 20ns 14h 14h 28 Minimum row active to row active delay (tRRD) 20ns 20ns 14h 14h 29 Minimum RAS to CAS delay (=tRCD) 20ns 20ns 14h 14h 30 Minimum activate precharge time (=tRAS) 50ns 50ns 32h 31 Module Row density 32 32h 1 Row of 64MB 10h Command and Address signal input setup time 2ns 20h 33 Command and Address signal input hold time 1ns 10h 34 Data signal input setup time 2ns 20h Rev 0.1 Feb. 2000 SERIAL PRESENCE DETECT PC100 SODIMM SERIAL PRESENCE DETECT INFORMATION Byte # Function described Function Supported -1H 35 36~61 Data signal input hold time Superset information (maybe used in future) 62 SPD data revision code 63 Checksum for bytes 0 ~ 62 64 Manufacturer JEDEC ID code 65~71 Manufacturing location 73 Manufacturer part # (Memory module) 74 Manufacturer part # (DIMM configuration) 75 Manufacturer part # (Data bits) 76 77 Hex value -1H 10h - 00h - Note -1L 1ns Current release Intel spd 1.2A ...... Manufacturer JEDEC ID code 72 -1L 12h 0Dh 3Dh Samsung CEh Samsung 00h Onyang Korea 01h M 4Dh 4 34h Blank 20h ...... Manufacturer part # (Data bits) 6 36h ...... Manufacturer part # (Data bits) 4 34h 78 Manufacturer part # (Mode & operating voltage) S 53h 79 Manufacturer part # (Module depth) 0 30h 80 ...... Manufacturer part # (Module depth) 9 39h 81 Manufacturer part # (Refresh, # of banks in Comp. & inter- 2 32h 82 Manufacturer part # (Composition component) 4 34h 83 Manufacturer part # (Component revision) B 42h 84 Manufacturer part # (Package type) T 54h 85 Manufacturer part # (PCB revision & type) 1 31h 86 Manufacturer part # (Hyphen) "-" 2Dh 87 Manufacturer part # (Power) 88 Manufacturer part # (Minimum cycle time) 1 1 31h 31h 89 Manufacturer part # (Minimum cycle time) H L 48h 4Ch 90 Manufacturer part # (TBD) 91 Manufacturer revision code (For PCB) 92 ...... Manufacturer revision code (For component) 93 Manufacturing date (Week) 94 L/C 4Ch / 43h Blank 20h 1 31h B-die (3rd Gen.) 42h - - 3 Manufacturing date (Year) - - 3 95~98 Assembly serial # - - 4 99~12 Manufacturer specific data (may be used in future) Undefined - 5 126 System frequency for 100MHz 127 Intel Specification details Detailed 100MHz Information 100MHz 128+ Unused storage locations Undefined 64h 8Fh 8Dh - 5 Note : 1. The bank select address is excluded in counting the total # of addresses. 2. This value is based on the component specification. 3. These bytes are programmed by code of Date Week & Date Year with BCD format. 4. These bytes are programmed by Samsung s own Assembly Serial # system. All modules may have different unique serial #. 5. These bytes are Undefined and can be used for Samsung s own purpose. Rev 0.1 Feb. 2000 SERIAL PRESENCE DETECT PC100 SODIMM M464S1724BT1-L1H/L1L, C1H/C1L * Organization : 16MX64 * Composition : 8MX16 *8 * Used component part # : K4S281632B-TL1H/L1L, C1H/C1L * # of rows in module : 2 rows * # of banks in component : 4 banks * Feature : 1,250 mil height & double sided component * Refresh : 4K/64ms * Contents : Byte # Function described Function Supported -1H -1L Hex value -1H 0 # of bytes written into serial memory at module manufacturer 1 Total # of bytes of SPD memory device 2 Fundamental memory type 3 # of row address on this assembly 4 # of column address on this assembly 5 # of module Rows on this assembly 6 Data width of this assembly 64 bits 40h 7 ...... Data width of this assembly - 00h 8 Voltage interface standard of this assembly 9 SDRAM cycle time from clock @CAS latency of 3 10ns 10 SDRAM access time from clock @CAS latency of 3 6ns 11 DIMM configuraion type 12 Refresh rate & type 13 Primary SDRAM width 14 Error checking SDRAM width 15 Minimum clock dealy for back-to-back random column address 16 SDRAM device attributes : Burst lengths supported 17 SDRAM device attributes : # of banks on SDRAM device 18 SDRAM device attributes : CAS latency 19 SDRAM device attributes : CS latency 20 SDRAM device attributes : Write latency 21 SDRAM module attributes 22 SDRAM device attributes : General Note -1L 128bytes 80h 256bytes (2K-bit) 08h SDRAM 04h 12 0Ch 1 9 09h 1 2 Rows 02h LVTTL 01h 10ns A0h 6ns 60h Non parity A0h 2 60h 2 00h 15.625us, support self refresh 80h x16 10h None 00h tCCD = 1CLK 01h 1, 2, 4, 8 & full page 8Fh 4 banks 04h 2&3 06h 0 CLK 01h 0 CLK 01h Non-buffered/Non-Registered & redundant addressing 00h +/- 10% voltage tolerance, Burst Read Single bit Write 0Eh precharge all, auto precharge 23 SDRAM cycle time @CAS latency of 2 10ns 12ns A0h C0h 2 24 SDRAM access time @CAS latency of 2 6ns 7ns 60h 70h 2 25 SDRAM cycle time @CAS latency of 1 - - 00h 00h 2 26 SDRAM access time @CAS latency of 1 - - 00h 00h 2 27 Minimum row precharge time (=tRP) 20ns 20ns 14h 14h 28 Minimum row active to row active delay (tRRD) 20ns 20ns 14h 14h 29 Minimum RAS to CAS delay (=tRCD) 20ns 20ns 14h 14h 30 Minimum activate precharge time (=tRAS) 50ns 50ns 32h 31 Module Row density 32 32h 2 Rows of 64MB 10h Command and Address signal input setup time 2ns 20h 33 Command and Address signal input hold time 1ns 10h 34 Data signal input setup time 2ns 20h Rev 0.1 Feb. 2000 SERIAL PRESENCE DETECT PC100 SODIMM SERIAL PRESENCE DETECT INFORMATION Byte # Function described Function Supported -1H 35 36~61 Data signal input hold time Superset information (maybe used in future) 62 SPD data revision code 63 Checksum for bytes 0 ~ 62 64 Manufacturer JEDEC ID code 65~71 Manufacturing location 73 Manufacturer part # (Memory module) 74 Manufacturer part # (DIMM configuration) 75 Manufacturer part # (Data bits) 76 77 Hex value -1H 10h - 00h - Note -1L 1ns Current release Intel spd 1.2A ...... Manufacturer JEDEC ID code 72 -1L 12h 0Eh 3Eh Samsung CEh Samsung 00h Onyang Korea 01h M 4Dh 4 34h Blank 20h ...... Manufacturer part # (Data bits) 6 36h ...... Manufacturer part # (Data bits) 4 34h 78 Manufacturer part # (Mode & operating voltage) S 53h 79 Manufacturer part # (Module depth) 1 31h 80 ...... Manufacturer part # (Module depth) 7 37h 81 Manufacturer part # (Refresh, # of banks in Comp. & inter- 2 32h 82 Manufacturer part # (Composition component) 4 34h 83 Manufacturer part # (Component revision) B 42h 84 Manufacturer part # (Package type) T 54h 85 Manufacturer part # (PCB revision & type) 1 31h 86 Manufacturer part # (Hyphen) "-" 2Dh 87 Manufacturer part # (Power) 88 Manufacturer part # (Minimum cycle time) 1 L/C 1 31h 4Ch / 43h 31h 89 Manufacturer part # (Minimum cycle time) H L 48h 4Ch 90 Manufacturer part # (TBD) 91 Manufacturer revision code (For PCB) 92 ...... Manufacturer revision code (For component) 93 Manufacturing date (Week) 94 Blank 20h 1 31h B-die (3rd Gen.) 42h - - 3 Manufacturing date (Year) - - 3 95~98 Assembly serial # - - 4 99~125 Manufacturer specific data (may be used in future) Undefined - 5 126 System frequency for 100MHz 127 Intel Specification details Detailed 100MHz Information 100MHz 128+ Unused storage locations Undefined 64h CFh CDh - 5 Note : 1. The bank select address is excluded in counting the total # of addresses. 2. This value is based on the component specification. 3. These bytes are programmed by code of Date Week & Date Year with BCD format. 4. These bytes are programmed by Samsung s own Assembly Serial # system. All modules may have different unique serial #. 5. These bytes are Undefined and can be used for Samsung s own purpose. Rev 0.1 Feb. 2000