74LVX244MX_NL - Fairchild Semiconductor

Februa ry 199 3

Revised April 2005

74LVX244 Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs

74LVX244

Low Volta ge Octal Buffer/Line Driv er with

3-STATE Outputs

General Descript ion

The LVX244 is an octal non -invertin g buffer and line driv er

designed to be employed as a memory address driver,

clock drive r and bu s oriented transmitter or receive r which

provides improved PC board density . The inputs tolerate up

to 7V allowing interface of 5V systems to 3V systems.

Features

■Input voltage translation from 5V to 3V

■Ideal for low power/low noise 3.3V applications

■Guaranteed simultaneous switching noise level and

dynamic thresh ol d per for man ce

Ordering Code:

Devices also available in Tape and R eel. Specif y by appending suffix le tter “X” to the ordering co de.

Pb-Free package per JEDEC J-STD-020B.

Logic Symbol

IEEE/IEC

Connection Diagram

Pin Descriptions

Truth Tables

HIGH Voltage Leve l L

LOW Voltage Lev el

Immaterial Z

High Impedance

Order Number Package Number Package Description

74LVX244M M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

74LVX244SJ M20D Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74LVX244MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Pin Names Description

OE1, OE23-STAT E Output En ab le Inputs

I0–I7Inputs

O0–O7Outputs

Inputs Outputs

OE1In(Pins 12, 14, 16, 18)

LL L

LH H

HX Z

Inputs Outputs

OE2In(Pin s 3, 5, 7, 9)

LL L

LH H

HX Z

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74LVX244

Absolute Maximum Ratings(Note 1) Recommended Operating

Conditions (Note 2)

Note 1: The “Absolute Maximum Ratings” are thos e values bey ond which

the saf ety of the device cannot be guarante ed. The device s hould not be

operated at these limits. The parametric values defined in the Electrical

Characteristics tables are not guaranteed at the absolute maximum ratings.

The “R ecomm ended Ope rating Condition s” tabl e will d efine th e cond itions

for actu al device operation.

Note 2: Unu s ed inputs m us t be held HIG H or LOW. They may no t float.

DC Electrical Characteristics

Noise Characteristics (Note 3)

Note 3: Input tr

3 ns

Supply Voltage (VCC)



0.5V to



7.0V

DC Input Diode Current (IIK)



0.5V



20 mA

DC Input Voltage (VI)



0.5V to 7V

DC Output Diode Current (IOK)



0.5V



20 mA

VCC



0.5V



20 mA

DC Output Voltage (VO)



0.5V to VCC



0.5V

DC Output Source

or Sink Curren t (IO)

25 mA

DC VCC or Ground Current

(ICC or IGND)

75 mA

Stora ge Temperatu re (TSTG)



C to



150

Power Dissipation 180 mW

Supply Voltage (VCC) 2.0V to 3.6V

Input Voltage (VI)0V to 5.5V

Output Voltage (Vo) 0V to VCC

Operating Temperature (TA)



C to



Input Rise and Fall Time (

V) 0 ns/V to 100 ns/V

Symbol Parameter VCC TA





C to



CUnits Conditions

Min Typ Max Min Max

VIH HIGH Level Input 2.0 1.5 1.5

Voltage 3.0 2.0 2.0 V

3.6 2.4 2.4

VIL LOW Level Input 2.0 0.5 0.5

Voltage 3.0 0.8 0.8 V

3.6 0.8 0.8

VOH HIGH Level Output 2.0 1.9 2.0 1.9 VIN

VIH or VIL IOH



Voltage 3.0 2.9 3.0 2.9 V IOH



3.0 2.58 2.48 IOH



4 mA

VOL LOW Level Output 2.0 0.0 0.1 0.1 VIN

VIH or VIL IOL

Voltage 3.0 0.0 0.1 0.1 V IOL

3.0 0.36 0.44 IOL

4 mA

IOZ 3-STATE Output 3.6

0.25

2.5

VIH or VIL

Off-State Current VOUT

VCC or GND

IIN Input Leakage Current 3.6

0.1

1.0

5.5V or GND

ICC Qui escent Supply Current 3.6 4.0 40.0

VCC or GND

Symbol Parameter VCC TA

CUnits CL (pF)

(V) Typ Limit

VOLP Quiet Output Maximum Dynamic VOL 3.3 0.5 0.8 V 50

VOLV Quiet Output Minimum Dynamic VOL 3.3



0.5



0.8 V 50

VIHD Minimum HIGH Level Dynamic Input Voltage 3.3 2.0 V 50

VILD Maximum LOW Level Dynamic Input Voltage 3.3 0.8 V 50

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74LVX244

AC Electrical Characteristics

Note 4: Parameter guaranteed by design. tOSLH

|tPLHm



tPLHn|, tOSHL

|tPHLm



tPHLn|

Capacitance

Note 5: CPD is defined as t he v alue of the int ernal equ iv alent capacit anc e which is calcula te d f rom t he opera tin g c urrent co ns umption without load.

Symbol Parameter VCC TA





C to



CUnits Conditions

(V) Min Typ Max Min Max

tPLH Propagati on Delay 2.7 6.1 11.4 1.0 13.5

15 pF

tPHL Time 8.614.91.017.0 C

50 pF

3.3

0.3 4.7 7.1 1.0 8.5 CL

15 pF

7.210.61.012.0 C

50 pF

tPZL 3-STATE Output 2.7 7.1 13.8 1.0 16.5

15 pF,

tPZH Enable Time RL

1 k

9.617.31.020.0 C

50 pF,

1 k

3.3

0.3 5.5 8.8 1.0 10.5 CL

15 pF,

1 k

8.012.31.014.0 C

50 pF,

1 k

tPLZ 3-STATE Output 2.7 11.6 16.0 1.0 19.0 ns CL

50 pF,

tPHZ Disable Time 3.3

0.3 9.7 11.4 1.0 13.0 RL

1 k

tOSLH Output to Output 2.7 1.5 1.5 ns CL

50 pF

tOSHL Skew (Note 4) 3.3 1.5 1.5

Symbol Parameter TA





C to



CUnits

Min Typ Max Min Max

CIN Input Capacitance 4 10 10 pF

COUT Output Capacitance 6 pF

CPD Power Dissipation Capacitance (Note 5) 19 pF

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74LVX244

Physical Dimensions inches (millimeters) unless otherwise noted

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

Package Number M20B

5 www.fairchildsemi.com

74LVX244

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

Package Number M20D

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74LVX244 Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Package Number MTC20

Fairchild does no t assume any responsibility for use of any circui try described, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

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instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical compon ent in any componen t of a life support

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