Si9979
Vishay Siliconix
Document Number: 70012
S-41209—Rev. E, 21-Jun-04
www.vishay.com
1
3-Phase Brushless DC Motor Controller
FEATURES
Hall-Effect Commutation
60 or 120 Sensor Spacing
Integral High-Side Drive for all N-Channel MOSFET
Bridges
PWM Input
Quadrature Selection
Tachometer Output
Reversible
Braking
Output Enable Control
Cross Conduction Protection
Current Limiting
Undervoltage Lockout
Internal Pull-Up Resistors
DESCRIPTION
The Si9979 is a monolithic brushless dc motor controller with
integral high-side drive circuitry. The Si9979 is configured to
allow either 60 or 120 commutation sensor spacing. The
internal low-voltage regulator allows operation over a wide
input voltage range, 20- to 40-V dc.
The Si9979 provides commutation from Hall-effect sensors.
The integral high-side drive, which utilizes combination
bootstrap/charge pump supplies, allows implementation of an
all n-channel MOSFET 3-phase bridge. PWM, direction,
quadrature select, and braking inputs are included for control
along with a tachometer output. Protection features include
cross conduction protection, current limiting, and undervoltage
lockout. The FAULT output indicates when undervoltage, over
current, disable, or invalid sensor shutdown has occurred.
The Si9979 is available in both standard and lead (Pb)-free
48-pin SQFP packages and is specified to operate over the
commercial temperature range of 0 to 70C (C suffix), and the
industrial temperature range of −40 to 85 C (D suffix).
FUNCTIONAL BLOCK DIAGRAM
INA
INC
BRK
PWM
TACH
QS
V+
GTA
F/R
EN
VDD
RT
VDD
Input
Logic
VDD
VREF
VREF
VREF
VDD
VREF
CAPACAPB
Low-Side
U.V. Lockout
VREF
+IS
IS+
RT/CT
42
43
2
4
5
6
10
9
11
8
18
17
34
20
19
Low-Voltage
Regulator
High-Side
U.V. Lockout
Bootstrap Reg.
Charge Pump
SA
35
GTB
30
Bootstrap Reg.
Charge Pump
SB
31
CAPA
36
CAPB
32
GBA
33
GBB
29
VDD
13-16, 21-24 GND
CAPC
GTC
26
Bootstrap Reg.
Charge Pump
SC
27
CAPC
28
GBC
25
One Shot
37-41, 44-48
FAULT
7
INBVDD
3
60/120
VDD
1
VREF
End of Life. Last Available Purchase Date is 31-Dec-2014
Si9979
Vishay Siliconix
www.vishay.com
2
Document Number: 70012
S-41209—Rev. E, 21-Jun-04
ABSOLUTE MAXIMUM RATINGS
Voltage on Pin 42 50 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage on Pins 14, 10, 11 0.3 V to VDD + 0.3 V. . . . . . . . . . . . . . . . . . . . .
Voltage on Pins 590.3 V to 5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage on Pins 26, 28, 30, 32, 34, 36 60 V. . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage on Pins 27, 31, 35 2 to 50 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating Temperature
C Suffix 0 to 70_C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
D Suffix 40 to 85_C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage Temperature 65 to 150_C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Junction Temperature (TJ) 150_C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Dissipation (PD)
C Suffix 0.70 W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
D Suffix 0.55 W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
RECOMMENDED OPERATING RANGE
V+ +20 to 40 VDC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
RT10 kW Min. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SPECIFICATIONS
Test Conditions
Unless Otherwise Specified
Limits
Parameter Symbol
Unless Other
w
ise Specified
V+ = 20 to 40 V, IDD = 0 mA MinaTypbMaxaUnit
Power
Supply Voltage Range V+ 20 40
V
Logic Voltage VDD 20 mA v IDD v 0 mA 14.5 16 17.5 V
Supply Current I+ 4.5
mA
Logic Current IDD 20 mA
Internal ReferencedVREF 4.2 V
Commutation Inputs (INA, INB, INC, 60/120)
High-State VIH 4.0
V
Low-State VIL 1.0 V
High-State Input Current IIH VIH = VDD 10
mA
Low-State Input Current IIL VIL = 0 V 50 mA
Logic Inputs (F/R, EN, QS, PWM, BRK)
High-State VIH 2.0
V
Low-State VIL 0.8 V
High-State Input Current IIH VIH = 5.5 V 10
mA
Low-State Input Current IIL VIL = 0 V 125 mA
Outputs
Low-Side Gate Drive, High State VGBH 14 16 17.5
Low-Side Gate Drive, Low State VGBL 0.1
High Side Gate Drive High State
VGTH
TA = 0 to 70_CC Suffix 16 18
V
High-Side Gate Drive, High State VGTH TA = 40 to 85_CD Suffix 16 20 V
High-Side Gate Drive, Low State VGTL 0.1
Capacitor VoltagedVCAP V+ = 40 V 55
Low-Side Switching, Rise Time trL 70
Low-Side Switching, Fall Time tfL Risetime = 1 to 10 V
Falltime = 10 to 1 V
25
High-Side Switching, Rise Time trH
Falltime = 10 to 1 V
CL = 600 pF 100
ns
High-Side Switching, Fall Time tfH
CL = 600 pF
40 ns
Break Before Make Time
tBLH 100
Break-Before-Make Time tBHL 300
TACH Output/FAULT Output VOL IOL = 1.0 mA 0.15 0.4 V
TACH Output Pulsewidth tT300 600 ns
Si9979
Vishay Siliconix
Document Number: 70012
S-41209—Rev. E, 21-Jun-04
www.vishay.com
3
SPECIFICATIONS
Limits
Test Conditions
Unless Otherwise Specified
V+ = 20 to 40 V, IDD = 0 mA
Parameter UnitMaxa
Typb
Mina
Test Conditions
Unless Otherwise Specified
V+ = 20 to 40 V, IDD = 0 mA
Symbol
Protection
Low-Side Undervoltage Lockout UVLL 12.2
Low-Side Hysteresis VH0.8 V
High-Side Undervoltage Lockout UVLH SA, B, C = 0 V VDD 3.3
Current Limit
Comparator Input Bias Current IIB 5mA
Comparator Threshold Voltage
VTH
TA = 0 to 70_CC Suffix 90 100 110
mV
Comparator Threshold Voltage VTH TA = 40 to 85_CD Suffix 85 100 125 mV
Common Mode Voltage VCM 0 1 V
One Shot Pulse Width
t
RT = 10 k, CT = 0.001 mF 8 10 12
ms
One Shot Pulse Width tpRT = 10 k, CT = 0.01 mF 80 100 120 ms
Notes
a. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.
b. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
c. The reference voltage is not available for external use.
d. VCAP = (V+) + (VDD).
COMMUTATION TRUTH TABLE
Inputs Outputs Conditions
Sensors
(60_Spacing)
Sensors
(120_Spacing) Top Drive Bottom Drive
INAINBINCINAINBINCEN F/R BR
KIS+GT-
A
GT-
B
GT-
C
GB
A
GB
B
GB
CFAULT
0 0 0 1 0 1 1 1 0 0 1 0 0 0 1 0 1
1 0 0 1 0 0 1 1 0 0 1 0 0 0 0 1 1
1 1 0 1 1 0 1 1 0 0 0 1 0 0 0 1 1
1 1 1 0 1 0 1 1 0 0 0 1 0 1 0 0 1
0 1 1 0 1 1 1 1 0 0 0 0 1 1 0 0 1
0 0 1 0 0 1 1 1 0 0 0 0 1 0 1 0 1
0 0 0 1 0 1 1 0 0 0 0 1 0 1 0 0 1
1 0 0 1 0 0 1 0 0 0 0 0 1 1 0 0 1
1 1 0 1 1 0 1 0 0 0 0 0 1 0 1 0 1
1 1 1 0 1 0 1 0 0 0 1 0 0 0 1 0 1
0 1 1 0 1 1 1 0 0 0 1 0 0 0 0 1 1
0 0 1 0 0 1 1 0 0 0 0 1 0 0 0 1 1
X X X X X X 0 X 0 X 0 0 0 0 0 0 0 Disable
X X X X X X 0 X 1 X 0 0 0 1 1 1 0 Power Down
L L L L L L 1 X 1 0 0 0 0 1 1 1 1 Brake
L L L L L L 1 X 1 1 0 0 0 1 1 1 0 Over I in BRK
L L L L L L 1 X 0 1 0 0 0 0 0 0 0 Over I
1 0 1 1 1 1 1 X 0 X 0 0 0 0 0 0 0
1 0 1 1 1 1 1 X 1 X 0 0 0 1 1 1 0
0 1 0 0 0 0 1 X 0 X 0 0 0 0 0 0 0
0 1 0 0 0 0 1 X 1 X 0 0 0 1 1 1 0
Notes: L. Any valid sensor combination
X. Don’t care
60/120
EN
F/R
QS
PWM
INB
INC
GND
CAPA
SA
GBC
GTA
GBA
CAPB
SB
GTB
GBB
CAPC
BRK
SC
TACH
GTC
FAULT
SQFP-48
1
2
3
4
5
6
7
8
9
10
11
12
46 45 44 43 42 41 40 39 38 37
15 16 17 18 19 20 21 22 23 24
36
35
34
33
32
31
30
29
28
27
26
Top View
GNDGND
GNDGND
GND
V+
GND
GNDGND
GNDGND
GNDGND
GNDGND
48 47
GND
GND
13 14
GND
GND
25
VDD
INA
IS
IS+
/CT
RT
RT
Si9979
Vishay Siliconix
www.vishay.com
4
Document Number: 70012
S-41209—Rev. E, 21-Jun-04
PIN CONFIGURATION AND ORDERING INFORMATION
ORDERING INFORMATION
Standard
Part Number
Lead (Pb)-Free
Part Number
Temperature
Range Package
Si9979CS Si9979CS—E3 0 to 70_C
SQFP
-
48
Si9979DS Si9979DS—E3 40 to 85_C
SQFP
-4
8
NOTE: Si9979CS and Si9979DS are supplied in trays.
PIN DESCRIPTION
Pins 13: INA, INB, INC
INA, INB, and INC are the commutation sensor inputs, and are
intended to be driven by open collector Hall effect switches.
These inputs have internal pull up resistors tied to VDD, which
eliminates the need for external pull up resistors.
Pin 4: 60/120
The 60/120 input allows the use of the Si9979 with either a 60_
or 120_ commutation sensor spacing. An internal pull up
resistor, which is tied to VDD, sets the default condition to 60_
spacing. 120_ spacing is selected by pulling this input to
ground.
Pin 5: EN (Enable)
A logic “1” on this input allows commutation of the motor. This
is the default condition as this pin is pulled up internally. When
this pin is pulled to ground, all gate drive outputs are turned off.
Pin 6: F/R (Forward/Reverse)
A logic “1” on this input selects commutation for motor rotation
in the “forward” direction. This is the default condition as this
pin is pulled up internally. When this pin is pulled to ground, the
commutation sensor logic levels are inverted internally,
causing reverse rotation.
Pin 7: QS (Quadrature Select)
This input determines whether the bottom MOSFETs or both
bottom and top MOSFETs switch in response to the PWM
signal. A logic “1” on this input enables only the bottom
MOSFETs. This is the default condition as this pin is pulled up
internally. When this pin is pulled to ground, both the bottom
and top MOSFETs are enabled.
Pin 8: PWM
An open collector (drain) or TTL compatible signal is applied
to this input to control the motor speed. The QS input
determines which MOSFETs are switched in response to the
PWM signal. If no PWM signal is being used, this input is left
open. It is pulled up internally, which allows the MOSFETs to
follow the commutation sequence.
Si9979
Vishay Siliconix
Document Number: 70012
S-41209—Rev. E, 21-Jun-04
www.vishay.com
5
PIN DESCRIPTION (CONT’D)
Pin 9: BRK
With this input at logic “1”, the top MOSFETs are turned off and
the bottom MOSFETs are turned on, shorting the motor
windings together. This provides a braking torque which is
dependent on the motor speed. This is the default condition as
this pin is pulled up internally. When this pin is pulled to ground,
the MOSFETs are allowed to follow the commutation
sequence.
Pin 10: TACH
This output provides a minimum 300-nanosecond output
pulse for every commutation sensor transition, yielding a 6
pulse per electrical revolution tachometer signal. This output
is open drain.
Pin 11: FAULT
The FAULT output switches low to indicate that at least one of
the following conditions exists, controller disable (EN),
undervoltage lockout, invalid commutation sensor code
shutdown, or overcurrent shutdown. This output is open drain.
Pin 17: RT/CT
The junction of the current limit one shot timing resistor and
capacitor is connected to this pin. This one-shot is triggered by
the current limit comparator when an overcurrent condition
exists. This action turns off all the gate drives for the period
defined by RT and CT , thus stopping the flow of current.
Pin 18: RT
One side of the current limit one shot timing resistor is
connected to this pin.
Pin 19: IS+
This is the sensing input of the current limit comparator and
should be connected to the positive side of the current sense
resistor. When the voltage across the current sense resistor
exceeds 100 mV, the comparator switches and triggers the
current limit one-shot. The one-shot turns off all the gate drives
for the period defined by RT and CT
, thus stopping the flow of
current. If the overcurrent condition remains after the
shutdown period, the gate drives will be held off until the
overcurrent condition no longer exists.
Pin 20: IS
This pin is the ground reference for the current limit
comparator. It should be connected directly to the ground side
of the current sense resistor to enhance noise immunity.
Pins 1216: 2124, 3741, 4448, GND
These pins are the return path for both the logic and gate drive
circuits. Also, they serve to conduct heat out of the package,
into the circuit board.
Pin 25: GBC
This is the gate drive output for the bottom MOSFET in
Phase C.
Pin 26: GTC
This is the gate drive output for the top MOSFET in Phase C.
Pin 27: SC
This pin is negative supply of the high-side drive circuitry. As
such, it is the connection for the negative side of the bootstrap
capacitor, the top MOSFET Source, the bottom MOSFET
Drain, and the Phase C output.
Pin 28: CAPC
This pin is the positive supply of the high-side circuitry. The
bootstrap capacitor for Phase C is connected between this pin
and SC.
Pin 29: GBB
This is the gate drive output for the bottom MOSFET in Phase
B.
Pin 30: GTB
This is the gate drive output for the top MOSFET in Phase B.
Pin 31: SB
This pin is negative supply of the high-side drive circuitry. As
such, it is the connection for the negative side of the bootstrap
capacitor, the top MOSFET Source, the bottom MOSFET
Drain, and the Phase B output.
Pin 32: CAPB
This pin is the positive supply of the high-side circuitry. The
bootstrap capacitor for Phase B is connected between this pin
and SB.
Pin 33: GBA
This is the gate drive output for the bottom MOSFET in
Phase A.
Si9979
Vishay Siliconix
www.vishay.com
6
Document Number: 70012
S-41209—Rev. E, 21-Jun-04
PIN DESCRIPTION (CONT’D)
Pin 34: GTA
This is the gate drive output for the top MOSFET in Phase A.
Pin 35: SA
This pin is negative supply of the high-side drive circuitry. As
such, it is the connection for the negative side of the bootstrap
capacitor, the top MOSFET Source, the bottom MOSFET
Drain, and the Phase A output.
Pin 36: CAPA
This pin is the positive supply of the high-side circuitry. The
bootstrap capacitor for Phase A is connected between this pin
and SA.
Pin 42: V+
The supply voltage for the Si9979 is connected between this
pin and ground. The internal logic and high-side supply
voltages are derived from V+.
Pin 43: VDD
VDD is the internal logic and gate drive voltage. It is necessary
to connect a capacitor between this pin and ground to insure
that the current surges seen at the turn on of the bottom
MOSFETs does not trip the undervoltage lockout circuitry.
APPLICATION CIRCUITS
FIGURE 1. Three-Phase Brushless DC Motor Controller
To
Motor
Windings
A
B
C
18
25
7
4
20
29
10
19
42
43
1
2
3
5
6
9
34
35
36
30
31
32
Si9979
C
R
To
Commutation
Sensors
V+
FAULT
GND
RS
Q1
Q4
Q2
Q5
Q3
Q6
17
26
27
28
35
CT
TACH
PWM IN
1 mF
RT
CBA
CBB
CBC
11
8
LITTLE FOOT
CAPA
CAPC
CAPB
V+
VDD
INA
INB
INC
EN
F/R
BRK
PWM
FAULT
SA
GTA
SB
GTB
SC
GTC
GBA
GBB
GBC
IS
GND
IS+
RT/CT
QS
TACH
60/120
RT
GND
1216, 2124
3741, 4448
Si9979
Vishay Siliconix
Document Number: 70012
S-41209—Rev. E, 21-Jun-04
www.vishay.com
7
APPLICATION CIRCUITS
Notes:
1) If driving single phase
BLDC, tie INA, INB, and INC
together and drive with single
hall.
2) If it is being used as an H-
bridge controller, tie INA, INB,
and INC to GND. Use F/R in-
put to change active diagonal
pair of MOSFETs.
3) There is no TACH output
when connected in this con-
figuration.
To
Motor
Windings
A
B
18
25
7
4
20
29
10
19
42
43
1
2
3
5
6
9
34
35
36
30
31
32
Si9979
C
R
To
Commutation
Sensor
V+
FAULT
GND
RS
Q1
Q4
Q2
Q5
17
26
27
28
35
CT
TACH
PWM IN
1 mF
RT
CBA
CBB
11
8
LITTLE FOOT
1216, 2124
3741, 4448
V+
VDD
INA
INB
INC
EN
F/R
BRK
PWM
FAULT
SA
GTA
SB
GTB
SC
GTC
GBA
GBB
GBC
IS
GND
IS+
RT/CT
QS
TACH
60/120
RT
GND
CAPC
CAPB
CAPA
FIGURE 2. Single H-Bridge Controller
To
Motor
Windings
A
B
C
18
25
7
4
20
29
10
19
42
43
1
2
3
5
6
9
34
35
36
30
31
32
Si9979
C
R
V+
FAULT
GND
RS
Q1
Q4
Q2
Q5
Q3
Q6
17
26
27
28
35
CT
TACH
PWM IN
1 mF
RT
CBA
CBB
CBC
11
8
1
7
4
CP0
0
3
2
6
5
CP1
MR
CLK
MC14022
LITTLE FOOT
CAPA
CAPC
CAPB
V+
VDD
INA
INB
INC
EN
F/R
BRK
PWM
FAULT
SA
GTA
SB
GTB
SC
GTC
GBA
GBB
GBC
IS
GND
IS+
RT/CT
Q
S
TACH
60/120
RT
GND
1216, 2124
3741, 4448
FIGURE 3. Three-Phase AC Motor Controller
Si9979
Vishay Siliconix
www.vishay.com
8
Document Number: 70012
S-41209—Rev. E, 21-Jun-04
APPLICATION CIRCUITS
V+
C1
1 mF
V+
VDD
Si9979
VDD
VDD’ = VDD VBE
FIGURE 4. External VDD Regulator
1
A2
L1
36
CAVITY MARK
D
D1
37
48
112
13
24
b
e
25
L
R 0.2
R 0.2
C
A
* For reference only
Package Information
Vishay Siliconix
Document Number: 72823
29-Jan-04
www.vishay.com
1
SQFP: 48-LEAD (7X7X1.4 MM) SQUARE (POWER IC ONLY)
MILLIMETERS INCHES*
Dim Min Max Min Max
A1.40 1.60 0.055 0.063
A10.05 0.15 0.002 0.006
A21.35 1.45 0.053 0.057
b0.17 0.26 0.006 0.010
C0.117 0.177 0.005 0.007
D8.70 9.30 0.343 0.366
D16.90 7.10 0.270 0.280
e0.50 TYP 0.020 TYP
L0.45 0.75 0.018 0.030
L10.90 1.10 0.035 0.043
10_7_0_7_
ECN: S-40084—Rev. A, 02-Feb-04
DWG: 5928
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Revision: 01-Jan-2019 1Document Number: 91000
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