SEMICONDUCTOR
TECHNICAL DATA
QUAD MDTL
LINE RECEIVERS
EIA–232D
Order this document by MC1489/D
PIN CONNECTIONS
P SUFFIX
PLASTIC PACKAGE
CASE 646
D SUFFIX
PLASTIC PACKAGE
CASE 751A
(SO–14)
Input D
13
Response
Control B
Input A
Response
Control A
1
Ground
Input B
2
Output C
Response
Control C
Output D
VCC
14
Response
Control D
Output A
Input C
Output B
8
9
10
11
12
7
5
3
4
6
1
MOTOROLA ANALOG IC DEVICE DATA
The MC1489 monolithic quad line receivers are designed to interface data
terminal equipment with data communications equipment in conformance
with the specifications of EIA Standard No. EIA–232D.
•Input Resistance – 3.0 k to 7.0 kΩ
•Input Signal Range – ± 30 V
•Input Threshold Hysteresis Built In
•Response Control
a) Logic Threshold Shifting
b) Input Noise Filtering
ORDERING INFORMATION
Device Operating
Temperature Range Package
MC1489P, AP
TA=0to+75
°
C
Plastic
MC1489D, AD
T
A =
0
to
+
75°C
SO–14
Representative Schematic Diagram
(1/4 of Circuit Shown)
MDTL Logic Output
Interconnecting
Cable
Interconnecting
Cable
MDTL Logic Input
Line Receiver
MC1489
Simplified Application
Line Driver
MC1488
3.8 k
Input 1
RF
Response Control 2
1.7 k
5.0 k
10 k
7 GND
3 Output
14 VCC
9.0 k
MC1489 MC1489A
RF6.7 kΩ1.6 kΩ
Motorola, Inc. 1996 Rev 5
MC1489, A
2MOTOROLA ANALOG IC DEVICE DATA
MAXIMUM RATINGS (TA = + 25°C, unless otherwise noted)
Rating Symbol Value Unit
Power Supply Voltage VCC 10 Vdc
Input Voltage Range VIR ± 30 Vdc
Output Load Current IL20 mA
Power Dissipation (Package Limitation, SO–14
and Plastic Dual In–Line Package)
Derate above TA = + 25°CPD
1/θJA 1000
6.7 mW
mW/°C
Operating Ambient Temperature Range TA0 to + 75 °C
Storage Temperature Range Tstg – 65 to + 175 °C
ELECTRICAL CHARACTERISTICS (Response control pin is open.) (VCC = + 5.0 Vdc ± 10%, TA = 0 to + 75°C, unless otherwise noted)
Characteristics Symbol Min Typ Max Unit
Positive Input Current (VIH = + 25 Vdc)
(VIH = + 3.0 Vdc) IIH 3.6
0.43 –
–8.3
–mA
Negative Input Current (VIH = – 25 Vdc)
(VIH = – 3.0 Vdc) IIL – 3.6
– 0.43 –
–– 8.3
–mA
Input Turn–On Threshold V oltage
(TA = + 25°C, VOL
p
0.45 V) MC1489
MC1489A
VIH 1.0
1.75 –
1.95 1.5
2.25
Vdc
Input T urn–Off Threshold V oltage
(TA = + 25°C, VOH
q
2.5 V, IL = – 0.5 mA) MC1489
MC1489A
VIL 0.75
0.75 –
0.8 1.25
1.25
Vdc
Output Voltage High (VIH = 0.75 V, IL = – 0.5 mA)
(Input Open Circuit, IL = – 0.5 mA) VOH 2.5
2.5 4.0
4.0 5.0
5.0 Vdc
Output Voltage Low (VIL = 3.0 V, IL = 10 mA) VOL –0.2 0.45 Vdc
Output Short–Circuit Current IOS –– 3.0 – 4.0 mA
Power Supply Current (All Gates “on,” Iout = 0 mA, VIH = + 5.0 Vdc) ICC –16 26 mA
Power Consumption (VIH = + 5.0 Vdc) PC– 80 130 mW
SWITCHING CHARACTERISTICS (VCC = 5.0 Vdc ±1%, TA = + 25°C, See Figure 1.)
Propagation Delay T ime (RL = 3.9 kΩ) tPLH –25 85 ns
Rise T ime (RL = 3.9 kΩ) tTLH –120 175 ns
Propagation Delay T ime (RL = 390 kΩ) tPHL – 25 50 ns
Fall T ime (RL = 390 kΩ) tTHL –10 20 ns
Vin
VR
All diodes
1N3064
or equivalent
Eo
R
tTLH and tTHL
measured
10% – 90%
Figure 1. Switching Response
C
1/4
MC1489A
RL
5.0 Vdc
50% 50%
3.0 V
Ein
tTHL
CL = 15 pF = total parasitic capacitance which includes
probe and wiring capacitances
1.5 V 1.5 V
tTLH
tPLH
Response Node
VO
Ein
CL
C, capacitor is for noise filtering.
R, resistor is for threshold shifting.
EO
Figure 2. Response Control Node
TEST CIRCUITS
MC1489, A
3
MOTOROLA ANALOG IC DEVICE DATA
TYPICAL CHARACTERISTICS
(VCC = 5.0 Vdc, TA = +25°C, unless otherwise noted)
Vin, INPUT VOLTAGE (V)
10
0
–10
–8.0
–6.0
–4.0
–2.0
0
2.0
4.0
6.0
8.0
10
–25 –20 –15 –10 –5.0 5.0 15 2520
I , INPUT CURRENT (mA)
L
Figure 3. Input Current
II
VI
RT
1
RT
5.0 k
Vth
5.0 V
RT
13 k
Vth
5.0 V
6.0
5.0
4.0
3.0
2.0
1.0
0
3.02.01.00–2.0 –1.0–3.0 VI, INPUT VOLTAGE (V)
VILH
V , OUTPUT VOLTAGE (Vdc)
O
VIHL
EO
Vth
RT
VI
RT
11 k
Vth
–5.0 V
Figure 4. MC1489 Input Threshold
Voltage Adjustment
RT
1
VI, INPUT VOLTAGE (V)
3.0
4.0
5.0
6.0
1.0 2.00 4.0–2.0 –1.0–3.0
2.0
1.0
0
3.0
V , OUTPUT VOLTAGE (Vdc)
O
RT
5.0 k
Vth
5.0 V
RT
11 k
Vth
–5.0 V
Figure 5. MC1489A Input Threshold
Voltage Adjustment
EO
Vth
RT
Vin
VIHL
VILH
MC1489 VIH
MC1489 VIL
T, TEMPERATURE (
°
C) +120+600–60
0
0.2
0.4
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
2.2
2.4
V , INPUT THRESHOLD VOLTAGE (Vdc)
IH
MC1489A VIL
MC1489A VIH
Figure 6. Input Threshold Voltage
versus Temperature
VIH MC1489A
VIH MC1489
VIL MC1489
VIL MC1489A
VCC, POWER SUPPLY VOLTAGE (V)
4.0 5.0 6.0
03.0
2.0
1.0
INPUT THRESHOLD VOLT AGE (Vdc)
Figure 7. Input Threshold versus
Power Supply Voltage
MC1489, A
4MOTOROLA ANALOG IC DEVICE DATA
APPLICATIONS INFORMATION
General Information
The Electronic Industries Association (EIA) has released
the EIA–232D specification detailing the requirements for the
interface between data processing equipment and data
communications equipment. This standard specifies not only
the number and type of interface leads, but also the voltage
levels to be used. The MC1488 quad driver and its
companion circuit, the MC1489 quad receiver, provide a
complete interface system between DTL or TTL logic levels
and the EIA–232D defined levels. The EIA–232D
requirements as applied to receivers are discussed herein.
The required input impedance is defined as between
3000 Ω and 7000 Ω for input voltages between 3.0 and 25 V
in magnitude; and any voltage on the receiver input in an
open circuit condition must be less than 2.0 V in magnitude.
The MC1489 circuits meet these requirements with a
maximum open circuit voltage of one VBE.
The receiver shall detect a voltage between – 3.0 and
– 25 V as a Logic “1” and inputs between 3.0 and 25 V as a
Logic “0.” On some interchange leads, an open circuit of
power “OFF” condition (300 Ω or more to ground) shall be
decoded as an “OFF” condition or Logic “1.” For this reason,
the input hysteresis thresholds of the MC1489 circuits are all
above ground. Thus an open or grounded input will cause the
same output as a negative or Logic “1” input.
Device Characteristics
The MC1489 interface receivers have internal feedback
from the second stage to the input stage providing input
hysteresis for noise rejection. The MC1489 input has typical
turn–on voltage of 1.25 V and turn–off of 1.0 V for a typical
hysteresis of 250 mV. The MC1489A has typical turn–on of
1.95 V and turn–off of 0.8 V for typically 1.15 V of hysteresis.
Each receiver section has an external response control
node in addition to the input and output pins, thereby allowing
the designer to vary the input threshold voltage levels. A
resistor can be connected between this node and an external
power supply. Figures 2, 4 and 5 illustrate the input threshold
voltage shift possible through this technique.
This response node can also be used for the filtering of
high frequency, high energy noise pulses. Figures 8 and 9
show typical noise pulse rejection for external capacitors of
various sizes.
These two operations on the response node can be
combined or used individually for many combinations of
interfacing applications. The MC1489 circuits are particularly
useful for interfacing between MOS circuits and MDTL/MTTL
logic systems. In this application, the input threshold voltages
are adjusted (with the appropriate supply and resistor values)
to fall in the center of the MOS voltage logic levels (see
Figure 10).
The response node may also be used as the receiver input
as long as the designer realizes that he may not drive this
node with a low impedance source to a voltage greater than
one diode above ground or less than one diode below
ground. This feature is demonstrated in Figure 11 where two
receivers are slaved to the same line that must still meet the
EIA–232D impedance requirement.
PW, INPUT PULSE WIDTH (ns)
500 pF
MC1489
6
5
4
3
2
110,000100010010
300 pF
100 pF
10 pF
E , AMPLITUDE (V)
in
Figure 8. Typical Turn On Threshold versus
Capacitance from Response Control Pin to GND
MC1489A
PW, INPUT PULSE WIDTH (ns)
12 pF 500 pF
100 pF 300 pF
6
5
4
3
2
110,000100010010
E , AMPLITUDE (V)
in
Figure 9. Typical Turn On Threshold versus
Capacitance from Response Control Pin to GND
MC1489, A
5
MOTOROLA ANALOG IC DEVICE DATA
Figure 10. Typical Translator Application –
MOS to DTL or TTL
Response–Control Pin 1/2 MC1489
Response–Control Pin
Input
VCC
8.0 k
VCC
Input Output
Output
+5.0 Vdc
+5.0 Vdc
DTL or TTL
R
+5.0 Vdc
–VDD
MC1489
–VGG
MOS
Logic
Figure 11. Typical Paralleling of Two MC1489, A Receivers to Meet EIA–232D
8.0 k
MC1489, A
6MOTOROLA ANALOG IC DEVICE DATA
OUTLINE DIMENSIONS
NOTES:
1. LEADS WITHIN 0.13 (0.005) RADIUS OF TRUE
POSITION AT SEATING PLANE AT MAXIMUM
MATERIAL CONDITION.
2. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
3. DIMENSION B DOES NOT INCLUDE MOLD
FLASH.
4. ROUNDED CORNERS OPTIONAL.
17
14 8
B
A
F
HG D K
C
N
L
J
M
SEATING
PLANE
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A0.715 0.770 18.16 19.56
B0.240 0.260 6.10 6.60
C0.145 0.185 3.69 4.69
D0.015 0.021 0.38 0.53
F0.040 0.070 1.02 1.78
G0.100 BSC 2.54 BSC
H0.052 0.095 1.32 2.41
J0.008 0.015 0.20 0.38
K0.115 0.135 2.92 3.43
L0.300 BSC 7.62 BSC
M0 10 0 10
N0.015 0.039 0.39 1.01
____
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
–A–
–B–
G
P7 PL
14 8
71 M
0.25 (0.010) B M
S
B
M
0.25 (0.010) A S
T
–T–
F
RX 45
SEATING
PLANE
D14 PL K
C
J
M
_
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A8.55 8.75 0.337 0.344
B3.80 4.00 0.150 0.157
C1.35 1.75 0.054 0.068
D0.35 0.49 0.014 0.019
F0.40 1.25 0.016 0.049
G1.27 BSC 0.050 BSC
J0.19 0.25 0.008 0.009
K0.10 0.25 0.004 0.009
M0 7 0 7
P5.80 6.20 0.228 0.244
R0.25 0.50 0.010 0.019
____
P SUFFIX
PLASTIC PACKAGE
CASE 646–06
ISSUE L
D SUFFIX
PLASTIC PACKAGE
CASE 751A–03
(SO–14)
ISSUE F
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola
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MC1489/D
*MC1489/D*
◊
