5 V Low Power
EIA RS-485 Transceiver
ADM485
Rev. F
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FEATURES
Meets EIA RS-485 standard
5 Mbps data rate
Single 5 V supply
–7 V to +12 V bus common-mode range
High speed, low power BiCMOS
Thermal shutdown protection
Short-circuit protection
Driver propagation delay: 10 ns typical
Receiver propagation delay: 15 ns typical
High-Z outputs with power off
Superior upgrade for LTC485
APPLICATIONS
Low power RS-485 systems
DTE/DCE interface
Packet switching
Local area networks (LNAs)
Data concentration
Data multiplexers
Integrated services digital network (ISDN)
FUNCTIONAL BLOCK DIAGRAM
A
GND
B
V
CC
R
D
RO
RE
DE
DI
ADM485
00078-001
1
2
3
4
8
7
6
5
Figure 1.
GENERAL DESCRIPTION
The ADM485 is a differential line transceiver suitable for high
speed bidirectional data communication on multipoint bus
transmission lines. It is designed for balanced data transmission
and complies with EIA standards RS-485 and RS-422. The part
contains a differential line driver and a differential line receiver.
Both the driver and the receiver can be enabled independently.
When disabled, the outputs are three-stated.
The ADM485 operates from a single 5 V power supply.
Excessive power dissipation caused by bus contention or by
output shorting is prevented by a thermal shutdown circuit. If
during fault conditions, a significant temperature increase is
detected in the internal driver circuitry, this feature forces the
driver output into a high impedance state.
Up to 32 transceivers can be connected simultaneously on a
bus, but only one driver should be enabled at any time. It is
important, therefore, that the remaining disabled drivers do not
load the bus. To ensure this, the ADM485 driver features high
output impedance when disabled and when powered down,
which minimizes the loading effect when the transceiver is not
being used. The high impedance driver output is maintained
over the common-mode voltage range of −7 V to +12 V.
The receiver contains a fail-safe feature that results in a logic
high output state if the inputs are unconnected (floating).
The ADM485 is fabricated on BiCMOS, an advanced mixed
technology process combining low power CMOS with fast
switching bipolar technology. All inputs and outputs contain
protection against ESD; all driver outputs feature high source
and sink current capability. An epitaxial layer is used to guard
against latch-up.
The ADM485 features extremely fast switching speeds. Minimal
driver propagation delays permit transmission at data rates up
to 5 Mbps while low skew minimizes EMI interference.
The part is fully specified over the commercial and industrial
temperature range and is available in 8-lead PDIP, 8-lead SOIC,
and small footprint, 8-lead MSOP packages.
ADM485
Rev. F | Page 2 of 16
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Timing Specifications .................................................................. 4
Absolute Maximum Ratings............................................................ 5
ESD Caution.................................................................................. 5
Pin Configuration and Function Descriptions............................. 6
Typical Performance Characteristics ............................................. 7
Test Circuits ..................................................................................... 10
Switching Characteristics .............................................................. 11
Applications Information.............................................................. 12
Differential Data Transmission ................................................ 12
Cable and Data Rate................................................................... 12
Thermal Shutdown .................................................................... 12
Propagation Delay...................................................................... 12
Receiver Open Circuit, Fail-Safe.............................................. 12
Outline Dimensions ....................................................................... 13
Ordering Guide .......................................................................... 14
REVISION HISTORY
04/08—Rev. E to Rev. F
Updated Format..................................................................Universal
Changes to Table 2............................................................................ 4
Updated Outline Dimension......................................................... 13
Changes to Ordering Guide .......................................................... 14
10/03—Rev. D to Rev. E
Changes to Timing Specifications.................................................. 2
Updated Ordering Guide................................................................. 3
7/03—Rev. C to Rev. D
Changes to Absolute Maximum Ratings ....................................... 3
Changes to Ordering Guide ............................................................ 3
Update to Outline Dimensions....................................................... 9
1/03—Rev. B to Rev. C.
Change to Specifications ..................................................................2
Change to Ordering Guide...............................................................3
12/02—Rev. A to Rev. B.
Deleted Q-8 Package ..........................................................Universal
Edits to Features.................................................................................1
Edits to General Description ...........................................................1
Edits, additions to Specifications.....................................................2
Edits, additions to Absolute Maximum Ratings............................3
Additions to Ordering Guide...........................................................3
TPCs Updated and Reformatted .....................................................5
Addition of 8-Lead MSOP Package ................................................9
Update to Outline Dimensions........................................................9
ADM485
Rev. F | Page 3 of 16
SPECIFICATIONS
VCC = 5 V ± 5%, all specifications TMIN to TMAX, unless otherwise noted.
Table 1.
Parameter Min Typ Max Unit Test Conditions/Comments
DRIVER
Differential Output Voltage, VOD 5.0 V R = ∞, see Figure 20
2.0 5.0 V VCC = 5 V, R = 50 Ω (RS-422), see Figure 20
1.5 5.0 V R = 27 Ω (RS-485), see Figure 20
VOD3 1.5 5.0 V VTST = −7 V to +12 V, see Figure 21
Δ|VOD| for Complementary Output States 0.2 V R = 27 Ω or 50 Ω, see Figure 20
Common-Mode Output Voltage, VOC 3 V R = 27 Ω or 50 Ω, see Figure 20
Δ|VOD| for Complementary Output States 0.2 V R = 27 Ω or 50 Ω
Output Short-Circuit Current, VOUT = High 35 250 mA −7 V ≤ VO ≤ +12 V
Output Short-Circuit Current, VOUT = Low 35 250 mA −7 V ≤ VO ≤ +12 V
CMOS Input Logic Threshold Low, VINL 0.8 V
CMOS Input Logic Threshold High, VINH 2.0 V
Logic Input Current (DE, DI) ±1.0 μA
RECEIVER
Differential Input Threshold Voltage, VTH −0.2 +0.2 V −7 V ≤ VCM ≤ +12 V
Input Voltage Hysteresis, ΔVTH 70 mV VCM = 0 V
Input Resistance 12 kΩ −7 V ≤ VCM ≤ +12 V
Input Current (A, B) 1 mA VIN = 12 V
–0.8 mA VIN = −7 V
CMOS Input Logic Threshold Low, VINL 0.8 V
CMOS Input Logic Threshold High, VINH 2.0 V
Logic Enable Input Current (RE) ±1
μA
CMOS Output Voltage Low, VOL 0.4 V IOUT = 4.0 mA
CMOS Output Voltage High, VOH 4.0 V IOUT = −4.0 mA
Short-Circuit Output Current 7 85 mA VOUT = GND or VCC
Three-State Output Leakage Current ±1.0 μA 0.4 V ≤ VOUT ≤ 2.4 V
POWER SUPPLY CURRENT
ICC, Outputs Enabled 1.0 2.2 mA Digital inputs = GND or VCC
ICC, Outputs Disabled 0.6 1 mA Digital inputs = GND or VCC
ADM485
Rev. F | Page 4 of 16
TIMING SPECIFICATIONS
VCC = 5 V ± 5%, all specifications TMIN to TMAX, unless otherwise noted.
Table 2.
Parameter Min Typ Max Unit Test Conditions/Comments
DRIVER
Propagation Delay Input to Output, tPLH, tPHL 2 10 15 ns RLDIFF = 54 Ω, CL1 = CL2 = 100 pF, see Figure 22
Driver Output to OUTPUT, tSKEW 1 5 ns RLDIFF = 54 Ω, CL1 = CL2 = 100 pF, see Figure 22
Driver Rise/Fall Time, tR, tF 8 15 ns RLDIFF = 54 Ω, CL1 = CL2 = 100 pF, see Figure 22
Driver Enable to Output Valid 10 25 ns RL = 110 Ω, CL = 50 pF, see Figure 23
Driver Disable Timing 10 25 ns RL = 110 Ω, CL = 50 pF, see Figure 23
Matched Enable Switching |tZH − tZL| 0 2 ns RL = 110 Ω, CL = 50 pF, see Figure 231
Matched Disable Switching |tHZ − tLZ| 0 2 ns RL = 110 Ω, CL = 50 pF, see Figure 231
RECEIVER
Propagation Delay Input to Output, tPLH, tPHL 8 15 30 ns CL = 15 pF, see Figure 24
Skew |tPLH − tPHL| 5 ns CL = 15 pF, see Figure 24
Receiver Enable, tZH, tZL 5 20 ns CL = 15 pF, RL = 1 kΩ, see Figure 25
Receiver Disable, tHZ, tLZ 5 20 ns CL = 15 pF, RL = 1 kΩ, see Figure 25
Tx Pulse Width Distortion 1 ns
Rx Pulse Width Distortion 1 ns
1 Guaranteed by characterization.
ADM485
Rev. F | Page 5 of 16
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 3.
Parameter Rating
VCC −0.3 V to +7 V
Inputs
Driver Input (DI) −0.3 V to VCC + 0.3 V
Control Inputs (DE, RE) −0.3 V to VCC + 0.3 V
Receiver Inputs (A, B) −9 V to +14 V
Outputs
Driver Outputs (A, B) −9 V to +14 V
Receiver Output −0.5 V to VCC + 0.5 V
Power Dissipation 8-Lead MSOP 900 mW
θJA, Thermal Impedance 206°C/W
Power Dissipation 8-Lead PDIP 500 mW
θJA, Thermal Impedance 130°C/W
Power Dissipation 8-Lead SOIC 450 mW
θJA, Thermal Impedance 170°C/W
Operating Temperature Range
Commercial Range (J Version) 0°C to 70°C
Industrial Range (A Version) −40°C to +85°C
Storage Temperature Range −65°C to +150°C
Lead Temperature (Soldering, 10 sec) 300°C
Vapor Phase (60 sec) 215°C
Infrared (15 sec) 220°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Table 4. Transmitting
Inputs Outputs
DE DI B A
1 1 0 1
1 0 1 0
0 X1Z2 Z2
1 X = don’t care.
2 Z = high impedance.
Table 5. Receiving
RE Input A − Input B Output RO
0 ≥ +0.2 V 1
0 ≤ −0.2 V 0
0 Inputs open 1
1 X1Z2
1 X = don’t care.
2 Z = high impedance.
ESD CAUTION
ADM485
Rev. F | Page 6 of 16
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
ADM485
TOP VIEW
(Not to Scale)
RO
1
RE
2
DE
3
DI
4
V
CC
8
B
7
A
6
GND
5
00078-002
Figure 2. Pin Configuration
Table 6. Pin Function Descriptions
Pin No. Mnemonic Function
1 RO Receiver Output. When enabled, if A is greater than B by 200 mV, RO is high. If A is less than B by 200 mV, RO is low.
2 RE Receiver Output Enable. A low level enables the receiver output, RO. A high level places it in a high impedance state.
3 DE Driver Output Enable. A high level enables the driver differential outputs, A and B. A low level places it in a high
impedance state.
4 DI Driver Input. When the driver is enabled, a logic low on DI forces A low and B high, while a logic high on DI forces
A high and B low.
5 GND Ground Connection, 0 V.
6 A Noninverting Receiver Input A/Driver Output A.
7 B Inverting Receiver Input B/Driver Output B.
8 VCC Power Supply, 5 V ± 5%.
ADM485
Rev. F | Page 7 of 16
TYPICAL PERFORMANCE CHARACTERISTICS
RECEIVER OUTPUT LOW VOLTAGE (V)
OUTPUT CURRENT (mA)
50
0
45
30
25
20
15
10
5
0
40
35
0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00
00078-003
Figure 3. Output Current vs. Receiver Output Low Voltage
RECEIVER OUTPUT HIGH VOLTAGE (V)
OUTPUT CURRENT (mA)
0
3.50 3.75 4.00 4.25 4.50 4.75 5.00
–2
–4
–6
–8
–10
–12
–14
–16
–18
00078-004
Figure 4. Output Current vs. Receiver Output High Voltage
TEMPERATURE (°C)
RECEIVER OUTPUT HIGH VOLTAGE (V)
4.55
–50 –25 0 25 50 75 100 125
I = 8mA
4.50
4.45
4.40
4.35
4.30
4.25
4.20
4.15
0
0078-005
Figure 5. Receiver Output High Voltage vs. Temperature
TEMPERATURE (°C)
RECEIVER OUTPUT LOW VOLTAGE (V)
0.40
0.35
0.15
–50
0.20
–25 0 25 50 75 100 125
I = 8mA
0.25
0.30
0
0078-006
Figure 6. Receiver Output Low Voltage vs. Temperature
DRIVER DIFFERENTIAL OUTPUT VOLTAGE (V)
90
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
OUTPUT CURRENT (mA)
0
10
20
30
40
50
60
70
80
0
0078-007
Figure 7. Output Current vs. Driver Differential Output Voltage
TEMPERATURE (°C)
2.15
–50 –25 0 25 50 75 100 125
DRIVER DIFFERENTIAL OUTPUT VOLTAGE (V)
1.90
1.95
2.00
2.05
2.10
00078-008
R
L
= 26.8Ω
Figure 8. Driver Differential Output Voltage vs. Temperature
ADM485
Rev. F | Page 8 of 16
DRIVER OUTPUT LOW VOLTAGE (V)
OUTPUT CURRENT (mA)
100
004
.043.0 3.52.0 2.51.00.5 1.5 .5
|
t
PLH
–
t
PHL
|
TEMPERATURE (°C)
RECEIVER SKEW (ns)
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
–50 –25 0 25 50 75 100 125
00078-012
90
60
50
30
10
80
70
40
20
00078-009
Figure 9. Output Current vs. Driver Output Low Voltage
OUTPUT CURRENT – mA
0
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
DRIVER OUTPUT HIGH VOLTAGE (V)
00078-010
Figure 10. Output Current vs. Driver Output High Voltage
TEMPERATURE (°C)
–50 –25 0 25 50 75 100 125
SUPPLY CURRENT (mA)
1.0
0.9
0.7
0.5
DRIVER ENABLED
DRIVER DISABLED
1.1
0.8
0.6
00078-011
Figure 11. Supply Current vs. Temperature
Figure 12. Receiver Skew vs. Temperature
TEMPERATURE (°C)
DRIVER SKEW (ns)
1
0
2
3
4
5
6
|tPHLA –tPHLB |
–50 –25 0 25 50 75 100 125
00078-013
|tPLHA –tPLHB |
Figure 13. Driver Skew vs. Temperature
TEMPERATURE (°C)
PWD
1.2
0.8
0.6
0.4
0.2
0
1.0
1.4
–50 –25 0 25 50 75 100 125 150
00078-014
|
t
PLH
–
t
PHL
|
Figure 14. Driver Pulse Width Distortion (PWD) vs. Temperature
ADM485
Rev. F | Page 9 of 16
00078-015
CH1 1.00VΩ
BW
CH2 1.00VΩ
BW
M5.00ns CH3 2.64V
A
B
1,2
T
Figure 15. Unloaded Driver Differential Outputs
00078-016
CH1 1.00VΩ
BW
CH2 500mVΩ
BW
M5.00ns CH3 2.74V
A
B
1,2
Figure 16. Loaded Driver Differential Outputs
00078-017
CH1 1.00VΩ
BW
CH2 1.00VΩ
BW
CH3 5.00VΩ
BW
CH4 2.00VΩ
BW
M10.0ns CH4 400mV
DI
A
B
RO
1,2
3
T
4
Figure 17. Driver/Receiver Propagation Delays, Low to High
00078-018
CH1 1.00VΩ
BW
CH2 1.00VΩ
BW
CH3 5.00VΩ
BW
CH4 2.00VΩ
BW
M10.00ns CH4 2.76V
DI
A
B
RO
1,2
3
T
4
Figure 18. Driver/Receiver Propagation Delays, High to Low
0
0078-019
CH1 500mVΩCH2 500mVΩM10.00ns CH4 2.76V
A
B
1,2
Figure 19. Driver Output at 30 Mbps
ADM485
Rev. F | Page 10 of 16
TEST CIRCUITS
V
OD
V
OC
R
R
0
0078-020
Figure 20. Driver Voltage Measurement
V
OD3
V
TST
60Ω
375Ω
375
Ω
00078-021
Figure 21. Driver Voltage Measurement
R
LDIFF
A
B
C
L1
C
L2
00078-022
Figure 22. Driver Propagation Delay
0V OR 3V
DE IN
S2S1
VOUT
RL
V
CC
CL
00078-023
A
B
DE
Figure 23. Driver Enable/Disable
A
V
OUT
C
L
00078-024
BRE
Figure 24. Receiver Propagation Delay
S2
S1
V
CC
00078-025
C
L
V
OUT
RE
RE
IN
+
1.5
V
–
1.5
V
R
L
Figure 25. Receiver Enable/Disable
ADM485
Rev. F | Page 11 of 16
SWITCHING CHARACTERISTICS
3
V
0V
B
A
0V
–V
O
+VO90% POINT
10% POINT
t
R
t
SKEW =
t
PLH –
t
PHL
1/2VO
t
PLH
t
PHL
1.5V 1.5V
90% POINT
10% POINT
t
F
VO
00078-026
Figure 26. Driver Propagation Delay, Rise/Fall Timing
DE
A
, B
A
, B
1.5V
2.3V
2.3V
t
ZH
t
ZL
1.5V
3
V
0V
V
OL
V
OH
0V
V
OL
+ 0.5V
V
OH
– 0.5V
t
HZ
t
LZ
00078-027
Figure 27. Driver Enable/Disable Timing
A, B
RO
0V
t
PLH
1.5V
0V
t
PHL
1.5V
V
OH
V
OL
t
SKEW
=
t
PLH
–
t
PHL
00078-028
Figure 28. Receiver Propagation Delay
RE
RO
RO
1.5V
1.5V
1.5V
t
ZH
t
ZL
1.5V
3
V
0V
V
OL
V
OH
V
OL
+ 0.5V
V
OH
– 0.5V
t
HZ
t
LZ
OUTPUT LOW
OUTPUT HIGH
0V
00078-029
Figure 29. Receiver Enable/Disable Timing
ADM485
Rev. F | Page 12 of 16
APPLICATIONS INFORMATION
DIFFERENTIAL DATA TRANSMISSION
Differential data transmission is used to reliably transmit data at
high rates over long distances and through noisy environments.
Differential transmission nullifies the effects of ground shifts
and noise signals that appear as common-mode voltages on the
line. There are two main standards approved by the EIA that
specify the electrical characteristics of transceivers used in
differential data transmission.
The RS-422 standard specifies data rates up to 10 MBaud and
line lengths up to 4000 ft. A single driver can drive a transmission
line with up to 10 receivers.
To cater to true multipoint communications, the RS-485
standard was defined. This standard meets or exceeds all the
requirements of RS-422 but also allows for up to 32 drivers and
32 receivers to be connected to a single bus. An extended common-
mode range of −7 V to +12 V is defined. The most significant
difference between the RS-422 standard and the RS-485 standard is
the fact that the drivers can be disabled, thereby allowing more
than one (32 in fact) to be connected to a single line. Only one
driver should be enabled at a time, but the RS-485 standard
contains additional specifications to guarantee device safety in
the event of line contention.
Table 7. Comparison of RS-422 and RS-485 Interface Standards
Specification RS-422 RS-485
Transmission Type Differential Differential
Maximum Cable Length 4000 ft. 4000 ft.
Minimum Driver Output Voltage ±2 V ±1.5 V
Driver Load Impedance 100 Ω 54 Ω
Receiver Input Resistance 4 kΩ min 12 kΩ min
Receiver Input Sensitivity ±200 mV ±200 mV
Receiver Input Voltage Range −7 V to +7 V −7 V to +12 V
No. of Drivers/Receivers per Line 1/10 32/32
CABLE AND DATA RATE
The transmission line of choice for RS-485 communications is
a twisted pair. Twisted pair cable tends to cancel common-mode
noise and causes cancellation of the magnetic fields generated
by the current flowing through each wire, thereby reducing the
effective inductance of the pair.
The ADM485 is designed for bidirectional data communications
on multipoint transmission lines. A typical application showing
a multipoint transmission network is illustrated in Figure 30.
An RS-485 transmission line can have as many as 32 transceivers
on the bus. Only one driver can transmit at a particular time,
but multiple receivers can be enabled simultaneously.
RT RT
D
R
DD
RR
D
R
0
0078-030
Figure 30. Typical RS-485 Network
As with any transmission line, it is important that reflections be
minimized. This can be achieved by terminating the extreme ends
of the line using resistors equal to the characteristic impedance of
the line. Stub lengths of the main line should also be kept as
short as possible. A properly terminated transmission line appears
purely resistive to the driver.
THERMAL SHUTDOWN
The ADM485 contains thermal shutdown circuitry that protects
the part from excessive power dissipation during fault conditions.
Shorting the driver outputs to a low impedance source can result
in high driver currents. The thermal sensing circuitry detects
the increase in die temperature and disables the driver outputs.
The thermal sensing circuitry is designed to disable the driver
outputs when a die temperature of 150°C is reached. As the
device cools, the drivers are re-enabled at 140°C.
PROPAGATION DELAY
The ADM485 features very low propagation delay, ensuring
maximum baud rate operation. The driver is well balanced,
ensuring distortion free transmission.
Another important specification is a measure of the skew
between the complementary outputs. Excessive skew impairs
the noise immunity of the system and increases the amount of
electromagnetic interference (EMI).
RECEIVER OPEN CIRCUIT, FAIL-SAFE
The receiver input includes a fail-safe feature that guarantees a
logic high on the receiver when the inputs are open circuit or
floating.
ADM485
Rev. F | Page 13 of 16
OUTLINE DIMENSIONS
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MS-012-A A
012407-A
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
0.50 (0.0196)
0.25 (0.0099) 45°
8°
0°
1.75 (0.0688)
1.35 (0.0532)
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0040)
4
1
85
5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
6.20 (0.2441)
5.80 (0.2284)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
Figure 31. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body (R-8)
Dimensions shown in millimeters and (inches)
COMPLIANT TO JEDEC STANDARDS MO-187-AA
0.80
0.60
0.40
8°
0°
4
8
1
5
PIN 1
0.65 BSC
SEATING
PLANE
0.38
0.22
1.10 MAX
3.20
3.00
2.80
COPLANARITY
0.10
0.23
0.08
3.20
3.00
2.80
5.15
4.90
4.65
0.15
0.00
0.95
0.85
0.75
Figure 32. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
ADM485
Rev. F | Page 14 of 16
COMPLIANT TO JEDEC STANDARDS MS-001
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
070606-A
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
SEATING
PLANE
0.015
(0.38)
MIN
0.210 (5.33)
MAX
0.150 (3.81)
0.130 (3.30)
0.115 (2.92)
0.070 (1.78)
0.060 (1.52)
0.045 (1.14)
8
14
5
0.280 (7.11)
0.250 (6.35)
0.240 (6.10)
0.100 (2.54)
BSC
0.400 (10.16)
0.365 (9.27)
0.355 (9.02)
0.060 (1.52)
MAX
0.430 (10.92)
MAX
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.015 (0.38)
GAUGE
PLANE
0.005 (0.13)
MIN
Figure 33. 8-Lead Plastic Dual In-Line Package [PDIP]
Narrow Body (N-8)
Dimensions shown in inches and (millimeters)
ORDERING GUIDE
Model Temperature Range Package Description Package Option Branding
ADM485AN −40°C to +85°C 8-Lead PDIP N-8
ADM485ANZ1−40°C to +85°C 8-Lead PDIP N-8
ADM485AR −40°C to +85°C 8-Lead SOIC_N R-8
ADM485AR-REEL −40°C to +85°C 8-Lead SOIC_N R-8
ADM485ARZ1−40°C to +85°C 8-Lead SOIC_N R-8
ADM485ARZ-REEL1−40°C to +85°C 8-Lead SOIC_N R-8
ADM485ARM −40°C to +85°C 8-Lead MSOP RM-8 M41
ADM485ARM-REEL −40°C to +85°C 8-Lead MSOP RM-8 M41
ADM485ARM-REEL7 −40°C to +85°C 8-Lead MSOP RM-8 M41
ADM485ARMZ1−40°C to +85°C 8-Lead MSOP RM-8 M41#
ADM485ARMZ-REEL1−40°C to +85°C 8-Lead MSOP RM-8 M41#
ADM485ARMZ-REEL71−40°C to +85°C 8-Lead MSOP RM-8 M41#
ADM485JN 0°C to 70°C 8-Lead PDIP N-8
ADM485JNZ10°C to 70°C 8-Lead PDIP N-8
ADM485JR 0°C to 70°C 8-Lead SOIC_N R-8
ADM485JR-REEL 0°C to 70°C 8-Lead SOIC_N R-8
ADM485JR-REEL7 0°C to 70°C 8-Lead SOIC_N R-8
ADM485JRZ10°C to 70°C 8-Lead SOIC_N R-8
ADM485JRZ-REEL10°C to 70°C 8-Lead SOIC_N R-8
ADM485JRZ-REEL710°C to 70°C 8-Lead SOIC_N R-8
1 Z = RoHS Compliant Part, # denotes RoHS compliant product may be top or bottom marked.
ADM485
Rev. F | Page 15 of 16
NOTES
ADM485
Rev. F | Page 16 of 16
NOTES
©1993–2008 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D00078-0-4/08(F)
