Rev. 2.0 December 2014 www.aosmd.com Page 1 of 15
AOZ1038
EZBuck
™
6 A Synchronous Buck Regulator
General Description
The AOZ1038 is a high efficiency, easy to use, 6 A
synchronous buck regulator. The AOZ1038 works from a
4.5 V to 18 V input voltage range and provides up to 6 A
of continuous output current with an output voltage
adjustable down to 0.8 V.
The AOZ1038 is available in a 5x6 DFN-8 package or an
exposed pad SO-8 package. Both are rated over a -40 °C
to +85 °C ambient temperature range.
Features
4.5 V to 18 V operating input voltage range
55 mΩ internal high-side switch and 12 mΩ internal
low-side switch
High efficiency up to 95 %
Internal soft start
Active high power good state
Output voltage adjustable to 0.8 V
6 A continuous output current
Fixed 450 kHz PWM operation
Cycle-by-cycle current limit
Pre-bias start-up
Short-circuit protection
Thermal shutdown
Thermally enhanced 5x6 DFN-8 and exposed pad
SO-8 packages
Applications
Point-of-load DC/DC converters
LCD TV
Set top boxes
DVD / Blu-ray players/recorders
Cable modems
PCIe graphics cards
Typical Application
Figure 1. 3.3 V 6 A Synchronous Buck Regulator
LX
VIN
VIN
VOUT = 1.2V
FB
PGND
EN
COMP
AGND
C2, C3, C4
22µF
Ceramic
R1
R2
C
C
R
C
C1
22µF
Ceramic
L1
2.2µH
AOZ1038
Not Recommended For New Designs
Not Recommended For New Designs
No Replacement
AOZ1038
Rev. 2.0 December 2014 www.aosmd.com Page 2 of 15
Ordering Information
AOS Green Products use reduced levels of Halogens, and are also RoHS compliant.
Please visit www.aosmd.com/media/AOSGreenPolicy.pdf for additional information.
Pin Configuration
Pin Description
Part Number Ambient Temperature Range Package Environmental
AOZ1038DI -40 °C to +85 °C 5x6 DFN-8 Green Product
AOZ1038PI Exposed Pad SO-8
Pin Number
5x6 DFN-8
Exposed
SO-8 Pin Name Pin Function
1 1 PGND Power Ground. PGND needs to be electrically connected to AGND.
2 2 VIN Supply Voltage Input. When VIN rises above the UVLO threshold and EN is
logic high, the device starts up.
3 3 AGND Analog Ground. AGND is the reference point for the controller section.
AGND needs to be electrically connected to PGND.
4 4 FB Feedback Input. The FB pin is used to set the output voltage via a resistive
voltage divider between the output and AGND.
5 5 COMP External Loop Compensation Pin. Connect a RC network between COMP
and AGND to compensate the control loop.
6 6 EN Enable Pin. Pull EN to logic high to enable the device. Pull EN to logic low
to disable the device. If on/off control is not needed, connect it to VIN and
do not leave it open.
7, 8 7, 8 NC No Connect Pin. Pin 7 and 8 are not internally connected. Connect these
two pins externally to LX and use them for better thermal performance.
Exposed Pad Exposed Pad LX Switching Node. LX is the drain of the internal PFET. LX is used as the
thermal pad of the power stage.
PGND
VIN
AGND
FB
NC
NC
EN
COMP
5x6 DFN-8
(Top View)
1
2
3
4
8
7
6
5
1
2
3
4
PGND
VIN
AGND
FB
Exposed Pad SO-8
(Top View)
PAD
(LX)
NC
NC
EN
COMP
8
7
6
5
PAD
(LX)
Not Recommended For New Designs
AOZ1038
Rev. 2.0 December 2014 www.aosmd.com Page 3 of 15
Block Diagram
Absolute Maximum Ratings
Exceeding the Absolute Maximum Ratings may damage the
device.
Note:
1. Devices are inherently ESD sensitive, handling precautions are
required. Human body model is a 100pF capacitor discharging
through a 1.5k resistor.
Recommended Operating Conditions
The device is not guaranteed to operate beyond the
Recommended Operating Conditions.
Parameter Rating
Supply Voltage (VIN) 20 V
LX to AGND -0.7 V to VIN+0.3 V
LX to AGND 23 V (< 50 ns)
LX to AGND -5 V (< 50 ns)
EN to AGND -0.3 V to VIN+0.3 V
FB to AGND -0.3 V to 6 V
COMP to AGND -0.3 V to 6 V
PGND to AGND -0.3 V to +0.3 V
Junction Temperature (TJ) +150 °C
Storage Temperature (TS) -65 °C to +150 °C
ESD Rating(1) 2 kV
Parameter Rating
Supply Voltage (VIN) 4.5 V to 18 V
Output Voltage Range 0.8 V to VIN
Ambient Temperature (TA) -40 °C to +85 °C
Package Thermal Resistance (JA)
5x6 DFN-8
Exposed Pad SO-8
23 °C/W
40 °C/W
450kHz
Oscillator
AGND PGND
VIN
EN
FB
COMP
LX
OTP
Internal
+5V
ILimit
PWM
Control
Logic
5V LDO
Regulator
UVLO
& POR
Softstart
Reference
& Bias
0.8V
Q1
Q2
PWM
Comp
Level
Shifter
+
FET
Driver
ISen
EAmp
0.2V
+
–
+
–
+
–
+
–
+
Short Circuit
Detection
Comparator
Not Recommended For New Designs
AOZ1038
Rev. 2.0 December 2014 www.aosmd.com Page 4 of 15
Electrical Characteristics
TA = 25 °C, VIN = VEN = 12 V, VOUT = 3.3 V, unless otherwise specified. Specifications in BOLD indicate a temperature
range of -40 °C to +85 °C.
Symbol Parameter Conditions Min. Typ. Max. Units
VIN Supply Voltage 4.5 18 V
VUVLO Input Under-Voltage Lockout
Threshold
VIN rising
VIN falling
4.1
3.7
V
V
IIN Supply Current (Quiescent) IOUT = 0 V, VFB = 1.2 V,
VEN > 1.2 V
1.6 2.5 mA
IOFF Shutdown Supply Current VEN = 0 V 110μA
VFB Feedback Voltage TA = 25 °C 0.788 0.8 0.812 V
Load Regulation 0.5 %
Line Regulation 1 %
IFB Feedback Voltage Input Current 200 nA
VEN EN Input Threshold Off threshold
On threshold 2
0.6 V
V
VHYS EN Input Hysteresis 100 mV
MODULATOR
fOFrequency 400 450 500 kHz
DMAX Maximum Duty Cycle 100 %
DMIN Maximum On Time 150 ns
Error Amplifier Voltage Gain 500 V / V
Error Amplifier Transconductance 150 μA / V
PROTECTION
ILIM Current Limit 6.8 7.2 A
Over-Temperature Shutdown
Limit
TJ raising
TJ falling
150
100
°C
°C
tSS Soft Start Interval 3 ms
OUTPUT STAGE
High-Side Switch On-Resistance VIN = 12 V
VIN = 5 V
55
75
mΩ
mΩ
Low-Side Switch On-Resistance VIN = 12 V
VIN = 5 V
12
15
mΩ
mΩ
Not Recommended For New Designs
AOZ1038
Rev. 2.0 December 2014 www.aosmd.com Page 5 of 15
Efficiency
Detailed Description
The AOZ1038 is a current-mode step down regulator
with an integrated high-side PMOS switch and a low-side
NMOS switch. It operates from a 4.5 V to 18 V input
voltage range and supplies up to 6 A of load current. The
duty cycle can be adjusted from 6 % to 100 % allowing a
wide range of output voltages. Features include enable
control, power-on reset, input under voltage lockout,
output over voltage protection, active high power good
state, fixed internal soft-start, and thermal shut down.
The AOZ1038 is available in a 5x6 DFN-8 package or an
exposed pad SO-8 package.
Enable and Soft Start
The AOZ1038 has an internal soft start feature to limit
in-rush current and ensure the output voltage smoothly
ramps up to regulation voltage. The soft start process
begins when the input voltage rises to 4.1 V and the
voltage on the EN pin is HIGH. In the soft start process,
output voltage is typically ramped to regulation voltage in
4 ms. The 4 ms soft start time is set internally.
The EN pin of the AOZ1038 is active high. Connect the
EN pin to VIN if the enable function is not used. Pulling
EN to ground will disable the AOZ1038. Do not leave the
EN pin open. The voltage on EN must be above 2 V to
enable the AOZ1038. When voltage on the EN pin falls
below 0.6 V, the AOZ1038 is disabled. If an application
circuit requires the AOZ1038 to be disabled, an open
drain or open collector circuit should be used to interface
the EN pin.
Steady-State Operation
Under steady-state conditions, the converter operates in
fixed frequency and Continuous-Conduction Mode
(CCM).
The AOZ1038 integrates an internal P-MOSFET as the
high-side switch. Inductor current is sensed by amplifying
the voltage drop across the drain to the source of the
high side power MOSFET. Output voltage is divided
down by the external voltage divider at the FB pin. The
difference between the FB pin voltage and reference
voltage is amplified by the internal transconductance
error amplifier. The error voltage, which shows on the
COMP pin, is compared against the current signal. The
current signal is the sum of the inductor current signal
and ramp compensation signal, at the PWM comparator
Efficiency (VIN = 12V) vs. Load Current
95
90
85
80
75
70
65
60
55
50
01 2 3 4 5 6
Load Current (A)
Efficiency (%)
3.3V OUTPUT
1.8V OUTPUT
1.2V OUTPUT
Not Recommended For New Designs
AOZ1038
Rev. 2.0 December 2014 www.aosmd.com Page 6 of 15
input. If the current signal is less than the error voltage,
the internal high-side switch is on. When on, the inductor
current flows from the input through the inductor to the
output. When the current signal exceeds the error
voltage, the high-side switch is off. When off, inductor
current is freewheeling through the internal low-side
N-MOSFET switch to output. The internal adaptive FET
driver guarantees no turn on overlap of the high-side and
low-side switches.
Compared to regulators using freewheeling Schottky
diodes, the AOZ1038 uses freewheeling NMOSFET to
realize synchronous rectification. This greatly improves
the converter efficiency and reduces power loss in the
low-side switch.
The AOZ1038 uses a P-Channel MOSFET as the high-
side switch. This eliminates the bootstrap capacitor
normally seen in a circuit using an NMOS switch. It
allows 100 % turn-on of the high-side switch to achieve a
linear regulation mode of operation. The minimum
voltage drop from VIN to VO is the load current times DC
resistance of the MOSFET plus DC resistance of buck
inductor. It can be calculated by equation below:
where;
VO_MAX is the maximum output voltage,
VIN is the input voltage from 4.5 V to 18 V,
IO is the output current from 0 A to 6 A, and
RDS(ON) is the on resistance of internal MOSFET. The
value is between 55 mΩ and 75 mΩ depending on input
voltage and junction temperature.
Switching Frequency
The AOZ1038 switching frequency is fixed and set by an
internal oscillator. The practical switching frequency
could range from 400 kHz to 500 kHz due to device
variation.
Output Voltage Programming
Output voltage can be set by feeding back the output to
the FB pin by using a resistor divider network. Refer to
the application circuit shown in Figure 1. The resistor
divider network includes R1 and R2. Usually, a design is
started by picking a fixed R2 value and calculating the
required R1 with equation below.
Values of R1 and R2 with standard output voltages are
listed in Table 1.
Table 1.
The combination of R1 and R2 should be large enough to
avoid drawing excessive current from the output, which
will cause power loss.
Since the switch duty cycle can be as high as 100%, the
maximum output voltage can be set as high as the input
voltage minus the voltage drop on upper PMOS and the
inductor.
VOMAX
VIN IORDS ON
–=
VO (V) R1 (kΩ)R2 (kΩ)
0.8 1.0 Open
1.2 4.99 10
1.5 10 11.5
1.8 12.7 10.2
2.5 21.5 10
3.3 31.1 10
5.0 52.3 10
VO0.8 1 R1
R2
-------+
=
Not Recommended For New Designs
AOZ1038
Rev. 2.0 December 2014 www.aosmd.com Page 7 of 15
Protection Features
The AOZ1038 has multiple protection features to prevent
system circuit damage under abnormal conditions.
Over Current Protection (OCP)
The sensed inductor current signal is also used for over
current protection. Since the AOZ1038 employs peak
current mode control, the COMP pin voltage is
proportional to the peak inductor current. The COMP pin
voltage is limited internally to be between 0.4 V and 2.5V.
The peak inductor current is automatically limited cycle
by cycle.
When the output is shorted to ground under fault
conditions, the inductor current decays very slowly during
a switching cycle because of VO = 0 V. To prevent
catastrophic failure, a secondary current limit is designed
inside the AOZ1038. The measured inductor current is
compared against a preset voltage which represents the
current limit. When the output current is more than
current limit, the high side switch is turned off. The
converter will initiate a soft start once the over-current
condition is resolved.
Power-On Reset (POR)
A power-on reset circuit monitors the input voltage. When
the input voltage exceeds 4.1 V, the converter starts
operation. When input voltage falls below 3.7 V, the
converter will shut down.
Thermal Protection
An internal temperature sensor monitors the junction
temperature. It shuts down the internal control circuit and
high side PMOS if the junction temperature exceeds
150 ºC. The regulator will restart automatically under the
control of the soft-start circuit when the junction
temperature decreases to 100 ºC.
Application Information
The basic AOZ1038 application circuit is show in Figure
1. Component selection is explained below.
Input Capacitor
The input capacitor must be connected to the VIN pin
and the PGND pin of the AOZ1038 to maintain steady
input voltage and to filter out pulsing input current. The
voltage rating of the input capacitor must be greater than
maximum input voltage plus ripple voltage.
The input ripple voltage can be approximated by the
equation below:
Since the input current is discontinuous in a buck
converter, the current stress on the input capacitor is
another concern when selecting the capacitor. For a buck
circuit, the RMS value of the input capacitor current can
be calculated by:
if we let m equal the conversion ratio:
The relationship between the input capacitor RMS
current and voltage conversion ratio is calculated and
shown in Figure 2. It can be seen that when VO is half of
VIN, CIN is under the worst current stress. The worst
current stress on CIN is 0.5 x IO.
Figure 2. ICIN vs. Voltage Conversion Ratio
VIN IO
fC
IN
------------------ 1VO
VIN
----------–
VO
VIN
----------=
ICIN RMS
IOVO
VIN
----------1VO
VIN
----------–
=
VO
VIN
----------m=
0
0.1
0.2
0.3
0.4
0.5
00.51
m
I
CIN_RMS
(m)
I
O
Not Recommended For New Designs
AOZ1038
Rev. 2.0 December 2014 www.aosmd.com Page 8 of 15
For reliable operation and best performance, the input
capacitors must have current rating higher than ICIN_RMS
at the worst operating conditions. Ceramic capacitors are
preferred for input capacitors because of their low ESR
and high current rating. Depending on the application
circuits, other low ESR tantalum capacitor may also be
used. When selecting ceramic capacitors, X5R or X7R
type dielectric ceramic capacitors should be used for
their better temperature and voltage characteristics. Note
that the ripple current rating from capacitor manufactures
are based on A certain life time. Further de-rating may be
necessary in practical design applications.
Inductor
The inductor is used to supply constant current to output
when it is driven by a switching voltage. For a given input
and output voltage, inductance and switching frequency
together decide the inductor ripple current, which is:
The peak inductor current is:
High inductance gives low inductor ripple current but
requires a larger size inductor to avoid saturation. Low
ripple current reduces inductor core losses. It also
reduces RMS current through the inductor and switches,
which results in less conduction loss. Usually, peak to
peak ripple current on inductor is designed to be 20 % to
30 % of output current.
When selecting the inductor, make sure it is able to
handle the peak current without saturation, even at the
highest operating temperature.
The inductor takes the highest current in a buck circuit.
The conduction loss on the inductor needs to be checked
for thermal and efficiency requirements.
Surface mount inductors in different shape and styles are
available from Coilcraft, Elytone and Murata. Shielded
inductors are small and radiate less EMI noise. They also
cost more than unshielded inductors. The choice
depends on EMI requirements, price and size.
Output Capacitor
The output capacitor is selected based on the DC output
voltage rating, output ripple voltage specification and
ripple current rating.
The selected output capacitor must have a higher rated
voltage specification than the maximum desired output
voltage including ripple. De-rating needs to be
considered for long term reliability.
Output ripple voltage specification is another important
factor for selecting the output capacitor. In a buck
converter circuit, output ripple voltage is determined by
inductor value, switching frequency, output capacitor
value and ESR. It can be calculated by the equation
below:
where;
CO is output capacitor value, and
ESRCO is the Equivalent Series Resistor of output
capacitor.
When a low ESR ceramic capacitor is used as the output
capacitor, the impedance of the capacitor at the switching
frequency dominates. Output ripple is mainly caused by
capacitor value and inductor ripple current. The output
ripple voltage calculation can be simplified to:
If the impedance of ESR at switching frequency
dominates, the output ripple voltage is mainly decided by
capacitor ESR and inductor ripple current. The output
ripple voltage calculation can be further simplified to:
For lower output ripple voltage across the entire
operating temperature range, X5R or X7R dielectric type
of ceramic, or other low ESR tantalum capacitors are
recommended.
In a buck converter, output capacitor current is
continuous. The RMS current of the output capacitor is
decided by the peak to peak inductor ripple current. It can
be calculated by:
ILVO
fL
------------1VO
VIN
----------–
=
ILpeak IOIL
2
--------+=
VOILESRCO 1
8fC
O
--------------------------+
=
VOIL1
8fC
O
--------------------------=
VOILESRCO
=
ICO RMS
LL
12
----------=
Not Recommended For New Designs
AOZ1038
Rev. 2.0 December 2014 www.aosmd.com Page 9 of 15
Usually, the ripple current rating of the output capacitor is
a smaller issue because of the low current stress. When
the buck inductor is selected to be very small and
inductor ripple current is high, the output capacitor could
be overstressed.
Loop Compensation
The AOZ1038 employs peak current mode control for
easy use and fast transient response. Peak current mode
control eliminates the double pole effect of the output
L&C filter. It also greatly simplifies the compensation loop
design.
With peak current mode control, the buck power stage
can be simplified to be a one-pole and one-zero system
in the frequency domain. The pole is dominant can be
calculated by:
The zero is a ESR zero due to the output capacitor and
its ESR. It is can be calculated by:
where;
CO is the output filter capacitor,
RL is load resistor value, and
ESRCO is the equivalent series resistance of output
capacitor.
The compensation design functions to shape the
converter control loop transfer to provide the desired gain
and phase. Several different types of compensation
networks can be used for the AOZ1038. In most cases, a
series capacitor and resistor network connected to the
COMP pin sets the pole-zero and is adequate for a stable
high-bandwidth control loop.
In the AOZ1038, FB pin and COMP pin are the inverting
input and the output of the internal error amplifier. A
series R and C compensation network connected to
COMP provides one pole and one zero. The pole is:
where;
GEA is the error amplifier transconductance, which is
150 x 10-6 A/V,
GVEA is the error amplifier voltage gain, which is 500 V/V,
and CC is compensation capacitor in Figure 1.
The zero given by the external compensation network,
capacitor CC and resistor RC, is located at:
To design the compensation circuit, a target crossover
frequency fC for closed loop must be selected. The
system crossover frequency is where the control loop
has unity gain. The crossover is the also called the
converter bandwidth. Generally a higher bandwidth
results in faster response to load transient. However, the
bandwidth should not be too high because of system
stability concern. When designing the compensation
loop, converter stability under all line and load condition
must be considered.
Usually, it is recommended to set the bandwidth to be
equal or less than 1/10 of the switching frequency. The
AOZ1038 operates at a frequency range from 400 kHz to
500 kHz. It is recommended to choose a crossover
frequency equal or less than 40 kHz.
The strategy for choosing RC and CC is to set the cross
over frequency with RC and then set the compensator
zero with CC. Using selected crossover frequency, fC, to
calculate RC:
where;
fC is desired crossover frequency. For best performance,
fC is set to be about 1/10 of switching frequency,
VFB is 0.8 V,
GEA is the error amplifier transconductance, which is
150 x 10-6 A/V, and
GCS is the current sense circuit transconductance, which
is 8 A/V.
The compensation capacitor CC and resistor RC together
make a zero. This zero is put somewhere close to the
dominate pole fp1 but lower than 1/5 of the selected
crossover frequency. CC can is selected by:
fP1
1
2CORL
-----------------------------------=
fZ1
1
2COESRCO
-------------------------------------------------=
fP2
GEA
2CCGVEA
-------------------------------------------=
fZ2
1
2CCRC
------------------------------------=
fC40kHz=
RCfCVO
VFB
-----------2CC
GEA GCS
------------------------------=
CC1.5
2RCfP1
------------------------------------=
Not Recommended For New Designs
AOZ1038
Rev. 2.0 December 2014 www.aosmd.com Page 10 of 15
The equation above can also be simplified to:
An easy-to-use application software which helps to
design and simulate the compensation loop can be found
at www.aosmd.com.
Thermal Management and Layout
Consideration
In the AOZ1038 buck regulator circuit, high pulsing
current flows through two circuit loops. The first loop
starts from the input capacitors, to the VIN pin, to the LX
pad, to the filter inductor, to the output capacitor and
load, and then return to the input capacitor through
ground. Current flows in the first loop when the high side
switch is on. The second loop starts from the inductor, to
the output capacitors and load, to the low side
NMOSFET. Current flows in the second loop when the
low side NMOSFET is on.
In the PCB layout, minimizing the area of the two loops
reduces the noise of the circuit and improves efficiency. A
ground plane is strongly recommended to connect the
input capacitor, output capacitor, and PGND pin of the
AOZ1038.
In the AOZ1038 buck regulator circuit, the major power
dissipating components are the AOZ1038 and the output
inductor. The total power dissipation of converter circuit
can be measured by input power minus output power.
The power dissipation of inductor can be approximately
calculated by output current and DCR of inductor.
The actual junction temperature can be calculated with
power dissipation in the AOZ1038 and thermal
impedance from junction to ambient.
The maximum junction temperature of AOZ1038 is
150ºC, which limits the maximum load current capability.
The thermal performance of the AOZ1038 is strongly
affected by the PCB layout. Care should be taken during
the design process to ensure that the IC will operate
under the recommended environmental conditions.
CCCORL
RC
----------------------=
Ptotal loss
VIN IIN
VOIO
–=
Pinductor loss
IO2Rinductor
1.1=
Tjunction Ptotal loss
Pinductor loss
–
JA
=
Not Recommended For New Designs
AOZ1038
Rev. 2.0 December 2014 www.aosmd.com Page 11 of 15
Package Dimensions, Exposed Pad SO-8
Notes:
1. Package body sizes exclude mold flash and gate burrs.
2. Dimension L is measured in gauge plane.
3. Tolerance 0.10mm unless otherwise specified.
4. Controlling dimension is millimeter, converted inch dimensions are not necessarily exact.
5. Die pad exposure size is according to lead frame design.
6. Followed from JEDEC MS-012
Symbols
A
A1
A2
B
C
D
D0
D1
E
e
E1
E2
E3
L
y
θ
| L1–L1' |
L1
Dimensions in millimeters
RECOMMENDED LAND PATTERN
Min.
1.40
0.00
1.40
0.31
0.17
4.80
3.20
3.10
5.80
—
3.80
2.21
0.40
—
0°
—
D0
UNIT: mm
θ
Nom.
1.55
0.05
1.50
0.406
—
4.96
3.40
3.30
6.00
1.27
3.90
2.41
0.40 REF
0.95
—
3°
0.04
1.04 REF
Max.
1.70
0.10
1.60
0.51
0.25
5.00
3.60
3.50
6.20
—
4.00
2.61
1.27
0.10
8°
0.12
Dimensions in inches
D1
E1 E
E3E2
Note 5
L1'
L1
L
Gauge plane
0.2500
C
D
7 (4x)
B
3.70
2.20
2.87
2.71
5.74
1.27
0.80
0.635
eA1
A2 A
Symbols
A
A1
A2
B
C
D
D0
D1
E
e
E1
E2
E3
L
y
θ
| L1–L1' |
L1
Min.
0.055
0.000
0.055
0.012
0.007
0.189
0.126
0.122
0.228
—
0.150
0.087
0.016
—
0°
—
Nom.
0.061
0.002
0.059
0.016
—
0.195
0.134
0.130
0.236
0.050
0.153
0.095
0.016 REF
0.037
—
3°
0.002
0.041 REF
Max.
0.067
0.004
0.063
0.020
0.010
0.197
0.142
0.138
0.244
—
0.157
0.103
0.050
0.004
8°
0.005
Not Recommended For New Designs
AOZ1038
Rev. 2.0 December 2014 www.aosmd.com Page 12 of 15
Tape and Reel Dimensions, Exposed Pad SO-8
Carrier Tape
Reel
Tape Size
12mm
Reel Size
ø330
M
ø330.00
±0.50
Package
SO-8
(12mm)
A0
6.40
±0.10
B0
5.20
±0.10
K0
2.10
±0.10
D0
1.60
±0.10
D1
1.50
±0.10
E
12.00
±0.10
E1
1.75
±0.10
E2
5.50
±0.10
P0
8.00
±0.10
P1
4.00
±0.10
P2
2.00
±0.10
T
0.25
±0.10
N
ø97.00
±0.10
K0
UNIT: mm
B0
G
M
W1
S
K
H
N
W
V
R
Trailer Tape
300mm min. or
75 empty pockets
Components Tape
Orientation in Pocket
Leader Tape
500mm min. or
125 empty pockets
A0
P1
P2
Feeding Direction
P0
E2
E1
E
D0
T
D1
W
13.00
±0.30
W1
17.40
±1.00
H
ø13.00
+0.50/-0.20
K
10.60
S
2.00
±0.50
G
—
R
—
V
—
Leader/Trailer and Orientation
UNIT: mm
Not Recommended For New Designs
AOZ1038
Rev. 2.0 December 2014 www.aosmd.com Page 13 of 15
Package Dimensions, 5x6 DFN, 8L
Nt
Symbols
A
A1
b
c
D
D1
E
E1
E2
E3
e
L
L1
θ
Dimensions in millimeters
RECOMMENDED LAND PATTERN
SIDE VIEW
TOP VIEW
BOTTOM VIEW
Min.
0.85
0.00
0.30
0.15
0.45
0
0°
Nom.
0.95
—
0.40
0.20
5.20 BSC
4.35 BSC
5.55 BSC
6.05 BSC
3.15 BSC
1.575 BSC
1.27 BSC
0.55
—
—
Max.
1.00
0.05
0.50
0.25
0.65
0.15
10°
Symbols
A
A1
b
c
D
D1
E
E1
E2
E3
e
L
L1
θ
Dimensions in inches
Min.
0.033
0.000
0.012
0.006
0.018
0
0°
Nom.
0.037
—
0.016
0.008
0.205 BSC
0.171 BSC
0.219 BSC
0.238 BSC
0.124 BSC
0.062 BSC
0.050 BSC
0.022
—
—
Max.
0.039
0.002
0.020
0.010
0.026
0.006
10°
E2
D1
e
E1E
VIEW 'A'
(SCALE 5:1)
VIEW ‘A’
UNIT: mm
0.05
L1 L
θ
A1
c
A
D
b
E3
1.6750
3.3500
0.5000 0.6500
2.7500
1.2700
4.6000
Not Recommended For New Designs
AOZ1038
Rev. 2.0 December 2014 www.aosmd.com Page 14 of 15
Tape and Reel Dimensions, 5x6 DFN, 8L
Package
DFN 5x6
(12mm)
A0 B0 K0 E E1 E2D0 D1 P0 P1 P2 T
6.30
±0.10 ±0.10
1.30
Min.
1.50 1.55
±0.05 ±0.30
12.00
±0.10
1.75
±0.10
5.50
±0.10
8.00
±0.10
4.00
±0.10
2.00
±0.05
0.30
UNIT: MM
E1
E2
E
±0.10
5.45
Carrier Tape
Reel
Trailer Tape
300mm min. or
75 empty pockets
Components Tape
Orientation in Pocket
Leader Tape
500mm min. or
125 empty pockets
Leader/Trailer and Orientation
Feeding Direction
D1
P1
P2
K0
B0
T
A0
P0 D0
Y
Y
C
L
R
V
MN
G
S
WNM
ø97.00ø330.0
±0.50
13.0012 mm
Tape Size VRSK
±0.5
2.010.60
G
———
HW1
ø13.0
+0.50/-0.20
17.40
H
K
W
W1
Reel Size
ø330
UNIT: MM
±0.10 ±0.30 ±1.00
Not Recommended For New Designs
AOZ1038
Rev. 2.0 December 2014 www.aosmd.com Page 15 of 15
Part Marking
Z1038DI
FAY
Part Number Code
Assembly Lot Code
Year & Week Code
WLT
Fab & Assembly Location
Z1038PI
FAY
Part Number Code
Assembly Lot Code
Year & Week Code
WLT
Fab & Assembly Location
5x6 DFN-8
Exposed Pad SO-8
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body or (b) support or sustain life, and (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of
the user.
2. A critical component in any component of a life
support, device, or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
LEGAL DISCLAIMER
Alpha and Omega Semiconductor makes no representations or warranties with respect to the accuracy or
completeness of the information provided herein and takes no liabilities for the consequences of use of such
information or any product described herein. Alpha and Omega Semiconductor reserves the right to make changes
to such information at any time without further notice. This document does not constitute the grant of any intellectual
property rights or representation of non-infringement of any third party’s intellectual property rights.
LIFE SUPPORT POLICY
ALPHA AND OMEGA SEMICONDUCTOR PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS.
Not Recommended For New Designs
