100322FMQB. - NATIONAL SEMICONDUCTOR

100322

100322 Low Power 9-Bit Buffer

Literature Number: SNOS123A

100322

OBSOLETE

October 19, 2009

Low Power 9-Bit Buffer

General Description

The 100322 is a monolithic 9-bit buffer. The device contains

nine non-inverting buffer gates with single input and output.

All inputs have 50 kΩ pull-down resistors and all outputs are

buffered.

Features

■30% power reduction of the 100122

■2000V ESD protection

■Pin/function compatible with 100122

■Voltage compensated operating range = −4.2V to −5.7V

■Available to MIL-STD-883

Logic Symbol

10030801

Pin Names Description

D1, D9Data Inputs

O1, O9Data Outputs

100308 Version 2 Revision 2 Print Date/Time: 2009/10/19 22:31:30

100322 Low Power 9-Bit Buffer

Connection Diagrams

24-Pin DIP

10030802

24-Pin Quad Cerpak

10030803

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100322

Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required,

please contact the National Semiconductor Sales Office/

Distributors for availability and specifications.

Above which the useful life may be impaired.

Storage Temperature (TSTG)−65°C to +150°C

Maximum Junction Temperature (TJ)

Ceramic +175°C

VEE Pin Potential to Ground Pin −7.0V to +0.5V

Input Voltage (DC) VEE to +0.5V

Output Current (DC Output HIGH) −50 mA

ESD (Note 2)≥2000V

Recommended Operating

Conditions

Case Temperature (TC)

Military −55°C to +125°C

Supply Voltage (VEE)−5.7V to −4.2V

Note 1: Absolute maximum ratings are those values beyond which the

device may be damaged or have its useful life impaired. Functional operation

under these conditions is not implied.

Note 2: ESD testing conforms to MIL-STD-883, Method 3015.

Military Version

DC Electrical Characteristics

VEE = −4.2V to −5.7V, VCC = VCCA = GND, TC = −55°C to +125°C

Symbol Parameter Min Max Units TCConditions Notes

VOH Output HIGH Voltage −1025 −870 mV 0°C to +125°C (Note 3, Note 4,

Note 5)

−1085 −870 mV −55°C VIN =VIH (Max) Loading with

VOL Output LOW Voltage −1830 −1620 mV 0°C to +125°C or VIL (Min) 50Ω to −2.0V

−1830 −1555 mV −55°C

VOHC Output HIGH Voltage −1035 mV 0°C to +125°C (Note 3, Note 4,

Note 5)

−1085 mV −55°C VIN =VIH (Max) Loading with

VOLC Output LOW Voltage −1610 mV 0°C to +125°C or VIL (Min) 50Ω to −2.0V

−1555 mV −55°C

VIH Input HIGH Voltage −1165 −870 mV −55°C to +125°C Guaranteed HIGH Signal (Note 3, Note 4,

Note 5, Note 6)

for All Inputs

VIL Input HIGH Voltage −1830 −1475 mV −55°C to +125°C Guaranteed LOW Signal (Note 3, Note 4,

Note 5, Note 6)

for All Inputs

IIL Input LOW Current 0.50 μA−55°C to +125° VEE = −4.2V (Note 3, Note 4,

Note 5)

VIN = VIL (Min)

IIH Input HIGH Current 240 μA0°C to +125°C VEE = −5.7V (Note 3, Note 4,

Note 5)

340 μA−55°C VIN = VIH (Max)

IEE Power Supply Current −70 −25 mA −55°C to +125°C Inputs Open (Note 3, Note 4,

Note 5)

Note 3: F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals −55°C), then testing

immediately without allowing for the junction temperature to stabilize due to heat dissipation after power-up. This provides “cold start” specs which can be

considered a worst case condition at cold temperatures.

Note 4: Screen tested 100% on each device at −55°C, +25°C, and +125°C, Subgroups 1, 2, 3, 7, and 8.

Note 5: Sample tested (Method 5005, Table I) on each manufactured lot at −55°C, +25°C, and +125°C, Subgroups A1, 2, 3, 7, and 8.

Note 6: Guaranteed by applying specified input condition and testing VOH/VOL.

AC Electrical Characteristics

VEE = −4.2V to −5.7V, VCC = VCCA = GND

Symbol Parameter TC = −55°C TC = +25°C TC = +125°C Units Conditions Notes

Min Max Min Max Min Max

tPLH Propagation Delay 0.30 1.80 0.40 1.60 0.40 1.80 ns (Note 7, Note

8, Note 9, Note

11)

tPHL Data to Output Figures 1, 2

tTLH Transition Time 0.30 1.20 0.30 1.20 0.30 1.20 ns (Note 10)

tTHL 20% to 80%, 80% to 20%

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100322

Note 7: F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals −55°C), then testing

immediately after power-up. This provides “cold start” specs which can be considered a worst case condition at cold temperatures.

Note 8: Screen tested 100% on each device at +25°C, only Subgroup A9.

Note 9: Sample tested (Method 5005, Table I) on each manufactured lot at +25°C, Subgroup A9, and at +125°C and −55°C temperatures, Subgroups A10 and

A11.

Note 10: Not tested at +25°C, +125°C, and −55°C temperature (design characterization data).

Note 11: The propagation delay specified is for single output switching. Delays may vary up to 200 ps with multiple outputs switching.

Test Circuit

10030805

Notes:

VCC, VCCA = +2V, VEE = −2.5V

L1 and L2 = equal length 50Ω impedance lines

RT = 50Ω terminator internal to scope

Decoupling 0.1 μF from GND to VCC and VEE

All unused outputs are loaded with 50Ω to GND

CL = Fixture and stray capacitance ≤ 3 pF

FIGURE 1. AC Test Circuit

Switching Waveforms

10030806

FIGURE 2. Propagation Delay and Transition Times

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100322

Physical Dimensions inches (millimeters) unless otherwise noted

24-Lead Ceramic Dual-In-Line Package (0.400″ Wide) (D)

NS Package Number J24E

24-Lead Ceramic Flatpak (F)

NS Package Number W24B

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100322

Notes

100322 Low Power 9-Bit Buffer

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