Power Management & Multimarket
Data Sheet
Rev. 1.2, 2012-10-01
Final
ESD0P2RF Series
Bi-directional Ultra-low Capacitance ESD / Transient Protection Diode
ESD0P2RF-02LS
ESD0P2RF-02LRH
TVS Diodes
Transient Voltage Suppressor Diodes
Edition 2012-10-01
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2012 Infineon Technologies AG
All Rights Reserved.
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and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
Information
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approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure
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and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may
be endangered.
ESD0P2RF Series
Final Data Sheet 3 Rev. 1.2, 2012-10-01
Trademarks of Infineon Technologies AG
AURIX™, BlueMoon™, C166™, CanPAK™, CIPOS™, CIPURSE™, COMNEON™, EconoPACK™, CoolMOS™,
CoolSET™, CORECONTROL™, CROSSAVE™, DAVE™, EasyPIM™, EconoBRIDGE™, EconoDUAL™,
EconoPIM™, EiceDRIVER™, eupec™, FCOS™, HITFET™, HybridPACK™, I²RF™, ISOFACE™, IsoPACK™,
MIPAQ™, ModSTACK™, my-d™, NovalithIC™, OmniTune™, OptiMOS™, ORIGA™, PRIMARION™,
PrimePACK™, PrimeSTACK™, PRO-SIL™, PROFET™, RASIC™, ReverSave™, SatRIC™, SIEGET™,
SINDRION™, SIPMOS™, SMARTi™, SmartLEWIS™, SOLID FLASH™, TEMPFET™, thinQ!™,
TRENCHSTOP™, TriCore™, X-GOLD™, X-PMU™, XMM™, XPOSYS™.
Other Trademarks
Advance Design System™ (ADS) of Agilent Technologies, AMBA™, ARM™, MULTI-ICE™, KEIL™,
PRIMECELL™, REALVIEW™, THUMB™, µVision™ of ARM Limited, UK. AUTOSAR™ is licensed by AUTOSAR
development partnership. Bluetooth™ of Bluetooth SIG Inc. CAT-iq™ of DECT Forum. COLOSSUS™,
FirstGPS™ of Trimble Navigation Ltd. EMV™ of EMVCo, LLC (Visa Holdings Inc.). EPCOS™ of Epcos AG.
FLEXGO™ of Microsoft Corporation. FlexRay™ is licensed by FlexRay Consortium. HYPERTERMINAL™ of
Hilgraeve Incorporated. IEC™ of Commission Electrotechnique Internationale. IrDA™ of Infrared Data
Association Corporation. ISO™ of INTERNATIONAL ORGANIZATION FOR STANDARDIZATION. MATLAB™ of
MathWorks, Inc. MAXIM™ of Maxim Integrated Products, Inc. MICROTEC™, NUCLEUS™ of Mentor Graphics
Corporation. Mifare™ of NXP. MIPI™ of MIPI Alliance, Inc. MIPS™ of MIPS Technologies, Inc., USA. muRata™
of MURATA MANUFACTURING CO., MICROWAVE OFFICE™ (MWO) of Applied Wave Research Inc.,
OmniVision™ of OmniVision Technologies, Inc. Openwave™ Openwave Systems Inc. RED HAT™ Red Hat, Inc.
RFMD™ RF Micro Devices, Inc. SIRIUS™ of Sirius Satellite Radio Inc. SOLARIS™ of Sun Microsystems, Inc.
SPANSION™ of Spansion LLC Ltd. Symbian™ of Symbian Software Limited. TAIYO YUDEN™ of Taiyo Yuden
Co. TEAKLITE™ of CEVA, Inc. TEKTRONIX™ of Tektronix Inc. TOKO™ of TOKO KABUSHIKI KAISHA TA.
UNIX™ of X/Open Company Limited. VERILOG™, PALLADIUM™ of Cadence Design Systems, Inc. VLYNQ™
of Texas Instruments Incorporated. VXWORKS™, WIND RIVER™ of WIND RIVER SYSTEMS, INC. ZETEX™ of
Diodes Zetex Limited.
Last Trademarks Update 2010-10-26
Revision History: Rev. 1.1,.2012-04-27
Page or Item Subjects (major cha nges since previous revision)
Rev. 1.2, 2012-10-01 Page Nr.8 Package name corrected (mismatch)
10 Table 2-4 updated
ESD0P2RF Series
Bi-directional Ultra-low Capacitance ESD / Transient Protection Diode
Final Data Sheet 4 Rev. 1.2, 2012-10-01
1 Bi-directional Ultra-low Capacitance ESD / Transient Protection
Diode
1.1 Features
• ESD / transient protection of RF signal lines according to:
–IEC61000-4-2 (ESD): ±20 kV (air/contact)
–IEC61000-4-4 (EFT): 40 A (5/50 ns)
–IEC61000-4-5 (surge): 3 A (8/20 μs)
• Maximum working voltage: VRWM ±5.3 V
• Extremely low capacitance: CL = 0.2 p F (typical)
• Low clamping voltage: VCL = 29 V at IPP = 16 A (typical)
• Very low reverse current IR < 1 nA typ.
• Very small form factor down to 0.62 x 0.32 x 0.31 mm3
• Pb-free (RoHS compliant) and halogen free package
1.2 Application Examples
• ESD protection of sensitive RF signal lines, Bluetooth Class 2, Automated Meter Reading
• RF antenna protection, frontend module, GPS, mobile TV, FM radio, UWB
1.3 Product Description
Figure 1-1 Pin Configuration and Schematic Diagram
Table 1-1 Ordering Information
Type Package Configuration Marking code
ESD0P2RF-02LS PG-TSSLP-2-1 1 line, bi-directional T
ESD0P2RF-02LRH PG-TSLP-2-17 1 line, bi-directional T
a) Pin configuration
PG-TS(S)LP-2_Dual_Diode_Serie_PinConf_and_SchematicDiag.vsd
b) Schematic diagram
TSLP-2
TSSLP-2
Pin 1 Pin 2
Pin 1 Pin 2 Pin 1
Pin 2
Pin 1 marking
(lasered)
ESD0P2RF Series
Characteristics
Final Data Sheet 5 Rev. 1.2, 2012-10-01
2 Characteristics
Attention: Stresses above the max. values listed here may cause permanent damage to the device.
Exposure to absolute maximum rating conditions for extended periods may affect device
reliability. Maximum ratings are absolute ratings; exceeding only one of these values may
cause irreversible damage to the integrated circuit.
2.1 Electrical Characteristics at TA=25°C, unless otherwise specified
Figure 2-1 Definitions of electrical characteristics
Table 2-1 Maximum Ratings at TA = 25 °C, unless otherwise specified
Parameter Symbol Values Unit
Min. Typ. Max.
ESD air / contact discharge1)
1) VESD according to IEC61000-4-2
VESD ––20kV
Peak pulse current (tp = 8/20 μs)2)
2) IPP according to IEC61000-4-5
IPP ––3A
Operating temperature range TOP -55 – 125 °C
Storage temperature Tstg -65 – 150 °C
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ESD0P2RF Series
Characteristics
Final Data Sheet 6 Rev. 1.2, 2012-10-01
Table 2-2 DC Characteristics at TA = 25 °C, unless otherwise specified
Parameter Symbol Values Unit Note /
Test Condition
Min. Typ. Max.
Reverse working voltage VRWM –5.3 – 5.3 V
Breakdown voltage VBR 7––VIR = 1 mA,
from pin 1 to pin 2,
from pin 2 to pin 1
Reverse current IR–<150nAVR = 5.3 V
Table 2-3 RF Characteristics at TA = 25 °C, unless otherwise specified
Parameter Symbol Values Unit Note /
Test Condition
Min. Typ. Max.
Diode capacitance CL– 0.23 0.4 pF VR = 0 V, f = 1 MHz
–0.20.4pF
VR = 0 V, f = 1 GHz
Table 2-4 ESD Characteristics at TA = 25 °C, unless otherwise specified
Parameter Symbol Values Unit Note /
Test Condition
Min. Typ. Max.
Clamping voltage2) VCL –29–VITLP = 16 A
–38– ITLP = 30 A
Clamping voltage1)
1)IPP according to IEC61000-4-5 (tp = 8/20 µs)
–1117 IPP = 1 A
–1521 IPP = 3 A
Dynamic resistance2)
2) Please refer to Application Note AN210 [4]. TLP parameter: Z0 = 50 Ω , tp = 100ns, tr = 300ps, averaging window: t1 = 30 ns
to t2 = 60 ns, extraction of dynamic resistance using least squares fit of TLP charactertistics between ITLP1 = 10 A and
ITLP2 = 40 A.
RDYN –1–Ω
Series inductance LS– 0.2 – nH ESD0P2RF-02LS
– 0.4 – nH ESD0P2RF-02LRH
ESD0P2RF Series
Characteristics
Final Data Sheet 7 Rev. 1.2, 2012-10-01
2.2 Typical Characteristics at TA = 25 °C, unless otherwise specified
Figure 2-2 Reverse current: IR = f(VR), TA = parameter
Figure 2-3 Line capacitance: CL = f(VR), f = 1 MHz
10-12
10-11
10-10
10-9
10-8
10-7
0 1 2 3 4 5 6
IR [A]
VR [V]
+25°C
+85°C
+125°C
0
0.1
0.2
0.3
0.4
0 1 2 3 4 5 6
CL [pF]
VR [V]
ESD0P2RF Series
Characteristics
Final Data Sheet 8 Rev. 1.2, 2012-10-01
Figure 2-4 Line capacitance: CL = f(f), VR = parameter
Figure 2-5 Line capacitance: CL = f(TA), VR = parameter
0.2
0.21
0.22
0.23
0.24
0.25
0.26
0 500 1000 1500 2000 2500 3000
CL [pF]
f [MHz]
0V
3.3V
5.3V
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
-50 -25 0 25 50 75 100 125
CL [pF]
TA [°C]
0V
3.3V
5.3V
ESD0P2RF Series
Characteristics
Final Data Sheet 9 Rev. 1.2, 2012-10-01
Figure 2-6 IEC61000-4-2 VCL = f(t), 8 kV positiv pulse from pin 1 to pin 2
Figure 2-7 IEC61000-4-2 VCL = f(t), 8 kV negativ pulse from pin 1 to pin 2
-20
0
20
40
60
80
100
120
-100 0 100 200 300 400 500 600 700 800 900
VCL [V]
tp [ns]
VCL-max-peak = 112 [V]
VCL-30ns-peak = 24.8 [V]
-120
-100
-80
-60
-40
-20
0
20
-100 0 100 200 300 400 500 600 700 800 900
VCL [V]
tp [ns]
VCL-max-peak = -116 [V]
VCL-30ns-peak = -25.0 [V]
ESD0P2RF Series
Characteristics
Final Data Sheet 10 Rev. 1.2, 2012-10-01
Figure 2-8 IEC61000-4-2 VCL = f(t), 15 kV positiv pulse from pin 1 to pin 2
Figure 2-9 IEC61000-4-2 VCL = f(t), 15 kV negativ pulse from pin 1 to pin 2
-20
0
20
40
60
80
100
120
140
160
180
-100 0 100 200 300 400 500 600 700 800 900
VCL [V]
tp [ns]
VCL-max-peak = 162 [V]
VCL-30ns-peak = 37.4 [V]
-180
-160
-140
-120
-100
-80
-60
-40
-20
0
20
-100 0 100 200 300 400 500 600 700 800 900
VCL [V]
tp [ns]
VCL-max-peak = -169 [V]
VCL-30ns-peak = -37.6 [V]
ESD0P2RF Series
Characteristics
Final Data Sheet 11 Rev. 1.2, 2012-10-01
Figure 2-10 Clamping voltage : ITLP = f(VTLP) [4]
Figure 2-11 Clampine voltage: VCL = f(IPP), tp = 8/20 μs
0
10
20
30
40
0 5 10 15 20 25 30 35 40 45 50 55 60
0
5
10
15
20
ITLP [A]
Equivalent VIEC [kV]
VTLP [V]
ESD0P2RF-02xx
RDYN
RDYN=1.0Ω
7
8
9
10
11
12
13
14
15
16
17
0 1 2 3 4
VCL [V]
IPP [A]
ESD0P2RF Series
Application Information
Final Data Sheet 12 Rev. 1.2, 2012-10-01
3 Application Information
Figure 3-1 Single line, bi-directional ESD / Transient protection [1], [2]
A pplication_ES D0P2RF -02x x.vs d
ESD
sensitive
device
1
2
Connector
Protected signal line
The protection diode should be placed ver y close to the location
where the ESD or other tr ansients can occur to keep loops and
inductances as small as possible .
Pin 2 (or pin 1) should be connected dir ectly to a ground plane on
the board .
I/ O
ESD0P2RF Series
Ordering Information Scheme (Examples)
Final Data Sheet 13 Rev. 1.2, 2012-10-01
4 Ordering Information Scheme (Examples)
Figure 4-1 Ordering information scheme
ESD 5V3 U- XX YY
P ackage o r App li cat io n
XX = Pin number (i.e.: 02 = 2 pins; 03 = 3 pins)
YY = Package family:
LS = TSSLP
LRH = TSLP
S = SOT363
U = SC74
XX = Application family:
LC = Low Clamp
HDMI
Uni- / Bi-directional or Rail to Rail protection
M aximu m wo rkin g vol t age V
RWM
in V: (i.e.: 5V3 = 5.3V)
ESD 0P1 RF - XX YY
Package
XX = Pin number (i.e.: 02 = 2 pins; 03 = 3 pins)
YY = Package family:
LS = TSSLP
LRH = TSLP
For Radio Frequency Applications
Line Capacitance C
L
in pF: (i.e.: 0P1 = 0.1pF)
n U
Number of protected lines (i.e.: 1 = 1 line; 4 = 4 lines)
Capacitance: Standard (>10pF), Low (<10pF), Ultra-low (<1pF)
ESD0P2RF Series
Package Information
Final Data Sheet 14 Rev. 1.2, 2012-10-01
5 Package Information
5.1 PG-TSLP-2-17 (mm) [5]
Figure 5-1 PG-TSLP-2-17: Package overview
Figure 5-2 PG-TSLP-2-17: Footprint
Figure 5-3 PG-TSLP-2-17: Packing
Figure 5-4 PG-TSLP-2-17: Marking (example)
TSLP27PO V02
±0.05
0.6
1
2
±0.05
0.65
±0.035
0.25
1)
1
±0.05
0.05 MAX.
+0.01
0.39-0.03
1) Dimension applies to plated terminal
Cathode
marking
1)
±0.035
0.5
Bottom viewTop view
TSLP-2-7-TP V03
0.76
4
1.16
0.5
Orientation
marking
8
ESD0P2RF Series
Package Information
Final Data Sheet 15 Rev. 1.2, 2012-10-01
6 Package Information
6.1 PG-TSSLP-2-1 (mm) [5]
Figure 6-1 PG-TSSLP-2-1: Package overview
Figure 6-2 PG-TSSLP-2-1: Footprint
Figure 6-3 PG-TSSLP-2-1: Packing
Figure 6-4 PG-TSSLP-2-1: Marking (example)
TSSLP-2-1,-2-PO V05
±0.035
0.32
1
2
±0.025
0.355
±0.025
0.2
1)
0.62
±0.035
+0.01
0.31-0.02
1) Dimension applies to plated terminal
Cathode
marking
1)
±0.025
0.26
Bottom viewTop view
0.27
0.19
0.19
0.19
Copper Solder mask Stencil apertures
0.57
0.24
0.62
0.32
0.24
0.14
TSSLP-2-1,-2-FP V02
Ex
4
Ey
0.35
Cathode
marking
8
ESD0P2RF Series
References
Final Data Sheet 16 Rev. 1.2, 2012-10-01
References
[1] Infineon AG - Application Note AN167: ESD Protection for Broadband LNA BGA728L7 for Portable and
Mobile TV Applications
[2] Infineon AG - Application Note AN178: ESD Protection for RF Antennas using Infineon ESD0P4RFL and
ESD0P2RF-xx
[3] Infineon AG - Application Note AN200: Low Cost FM Radio LNA using BFR340F for Mobile Phone
Applications
[4] Infineon AG - Application Note AN210: Effective ESD Protection Design at System Level using VF-TLP
Characterization Methodology
[5] Infineon AG - Recommendations for PCB Assembly of Infineon TSLP and TSSLP Packages
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