Product Specification PE4242 SPDT UltraCMOSTM 10 MHz - 3 GHz RF Switch Product Description Features Single-pin or complementary CMOS logic control inputs The PE4242 UltraCMOSTM RF Switch is designed to cover a broad range of applications from 10 MHz through 3 GHz. This reflective switch integrates on-board CMOS control logic with a low voltage CMOS-compatible control interface, and can be controlled using either single-pin or complementary control inputs. Using a nominal +3-volt power supply voltage, a typical input 1 dB compression point of +27 dBm can be achieved. +3.0-volt power supply needed for single -pin control mode Low insertion loss: 0.7 dB at 1000 MHz, 0.9 dB at 2000 MHz Isolation of 32 dB at 1000 MHz, 23 dB at The PE4242 RF Switch is manufactured on Peregrine's UltraCMOSTM process, a patented variation of silicon-oninsulator (SOI) technology on a sapphire substrate, offering the performance of GaAs with the economy and integration of conventional CMOS. 2000 MHz Typical input 1 dB compression point of +27 dBm e Ultra-small SC-70 package et Figure 1. Functional Diagram Figure 2. Package Type bs ol 6-lead SC-70 O 71-0015 Table 1. Electrical Specifications @ +25 C, VDD = 3 V (ZS = ZL = 50 ) Parameter Operation Frequency Conditions 1 Minimum Typical 10 Units 3000 MHz 0.85 1.05 dB dB Insertion Loss 1000 MHz 2000 MHz Isolation 1000 MHz 2000 MHz 30 21 32 23 dB dB Return Loss 1000 MHz 2000 MHz 18 16 22 18 dB dB `ON' Switching Time 50% CTRL to 0.1 dB of final value, 1 GHz 300 ns `OFF' Switching Time 50% CTRL to 25 dB isolation, 1 GHz 200 ns 15 mVpp Video Feedthrough 0.7 0.9 Maximum 2 Input 1 dB Compression 2000 MHz 26 27 dBm Input IP3 2000 MHz, 14 dBm input power 43 45 dBm Notes: 1. Device linearity will begin to degrade below 10 MHz 2. The DC transient at the output of any port of the switch when the control voltage is switched from Low to High or High to Low in a 50 test set-up, measured with 1ns risetime pulses and 500 MHz bandwidth. Document No. 70-0095-04 www.psemi.com (c)2003-2011 Peregrine Semiconductor Corp. All rights reserved. Page 1 of 9 Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com PE4242 Product Specification Figure 3. Pin Configuration (Top View) Exceeding absolute maximum ratings may cause permanent damage. Operation between operating range maximum and absolute maximum for extended periods may reduce reliability. Table 4. DC Electrical Specifications Table 2. Pin Descriptions1 Parameter Min Typ Max Units VDD Power Supply Voltage 2.7 3.0 3.3 V 250 500 nA IDD Power Supply Current (VDD = 3 V, VCTRL = 3 V) Pin No. Pin Name 1 RF1 RF1 port2 Control Voltage High GND Ground connection. Traces should be physically short and connected to ground plane for best performance. Control Voltage Low 2 3 RF2 RF2 port1 4 CTRL Switch control input, CMOS logic level 5 RFC Common RF port for switch1 Power supply voltage -0.3 4.0 V VI Voltage on any input -0.3 VDD+ 0.3 V Parameter/Conditions Min Max TST Storage temperature range -65 150 C TOP Operating temperature range -40 85 C Input power (50 ) 30 dBm HBM ESD Voltage 1500 V VESD 1 0.3x VDD V Electrostatic Discharge (ESD) Precautions When handling this UltraCMOSTM device, observe the same precautions that you would use with other ESD-sensitive devices. Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid exceeding the specified rating. e bs Units VDD O Table 3. Absolute Maximum Ratings PIN V et This pin supports two interface options: Single-pin control mode. A nominal 3-volt supply connection is required. Complementary-pin control mode. A complementary CMOS control signal to CTRL is supplied to this pin. Bypassing on this pin is not required in this mode. Note: 1. Operation should be restricted to the limits in the Operating Ranges table 2. All RF pins must be DC blocked with an external series capacitor or held at 0 VDC. Symbol 0.7x VDD ol CTRL or VDD 6 Description Latch-Up Avoidance Unlike conventional CMOS devices, UltraCMOSTM devices are immune to latch-up. Moisture Sensitivity Level The Moisture Sensitivity Level rating for the PE4242 in the 6-lead SC-70 package is MSL1. Note: 1. Human Body Model ESD Voltage (HBM, MIL_STD 883 Method 3015.7) (c)2003-2011 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0095-04 UltraCMOSTM RFIC Solutions Page 2 of 9 Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com PE4242 Product Specification Table 5. Single-pin Control Logic Truth Table Control Voltages Signal Path Pin 6 (VDD) = VDD Pin 4 (CTRL) = Low RFC to RF1 Pin 6 (VDD) = VDD Pin 4 (CTRL) = High RFC to RF2 Control Logic Input The PE4242 is a versatile RF CMOS switch that supports two operating control modes; single-pin control mode and complementary-pin control mode. Single-pin control mode enables the switch to operate with a single control pin (pin 4) supporting a +3-volt CMOS logic input, and requires a dedicated +3-volt power supply connection on pin 6 (VDD). This mode of operation reduces the number of control lines required and simplifies the switch control interface typically derived from a CMOS Processor I/O port. Table 6. Complementary-pin Control Logic Truth Table Control Voltages Signal Path RFC to RF1 Pin 6 (CTRL or VDD) = Low Pin 4 (CTRL) = High RFC to RF2 e Pin 6 (CTRL or VDD) = High Pin 4 (CTRL) = Low O bs ol et Complementary-pin control mode allows the switch to operate using complementary control pins CTRL and CTRL (pins 4 & 6), that can be directly driven by +3-volt CMOS logic or a suitable Processor I/O port. This enables the PE4242 to be used as a potential alternate source for SPDT RF switch products used in positive control voltage mode and operating within the PE4242 operating limits. Document No. 70-0095-04 www.psemi.com (c)2003-2011 Peregrine Semiconductor Corp. All rights reserved. Page 3 of 9 Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com PE4242 Product Specification Figure 4. Evaluation Board Layout Evaluation Kit et ol The board is constructed of a two metal layer FR4 material with a total thickness of 0.031". The bottom layer provides ground for the RF transmission lines. The transmission lines were designed using a coplanar waveguide with ground plane model using a trace width of 0.0476", trace gaps of 0.030", dielectric thickness of 0.028", metal thickness of 0.0021" and r of 4.4. e The SPDT Switch Evaluation Kit board was designed to ease customer evaluation of the PE4242 SPDT switch. The RF common port is connected through a 50 transmission line to the top left SMA connector, J1. Port 1 and Port 2 are connected through 50 transmission lines to the top two SMA connectors on the right side of the board, J3 and J2, respectively. A through transmission line connects SMA connectors J4 and J5. This transmission line can be used to estimate the loss of the PCB over the environmental conditions being evaluated. O bs J6 provides a means for controlling DC and digital inputs to the device. Starting from the lower left pin, the second pin to the right (J6-3) is connected to the device V1 or CTRL input. The fourth pin to the right (J6-7) is connected to the device V2 or CTRL/VDD input. 101/0083 Figure 5. Evaluation Board Schematic 102/0145 (c)2003-2011 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0095-04 UltraCMOSTM RFIC Solutions Page 4 of 9 Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com PE4242 Product Specification Typical Performance Data @ -40 C to 85 C (Unless otherwise noted) Figure 7. Input 1 dB Compression Point & IIP3 Figure 6. Insertion Loss - RFC to RF1 (Typical Performance @ 25 C) 0 60 60 50 50 40 40 30 30 -0.3 85C -0.9 IIP3 (dBm) Insertion Loss (dB) -0.6 25C e -1.2 -1.5 500 1000 1500 2000 2500 3000 0 500 1000 1500 2000 2500 20 3000 Frequency (MHz) bs ol Frequency (MHz) et 20 0 1dB Compression Point (dBm) -40C Figure 9. Isolation - RFC to RF1 (Typical Performance @ 25 C) O Figure 8. Insertion Loss - RFC to RF2 0 0 -20 -0.3 -0.6 85C -0.9 Isolation (dB) Insertion Loss (dB) -40C 25C -40 -60 -80 -1.2 -100 -1.5 0 500 1000 1500 2000 Frequency (MHz) Document No. 70-0095-04 www.psemi.com 2500 3000 0 500 1000 1500 2000 2500 3000 Frequency (MHz) (c)2003-2011 Peregrine Semiconductor Corp. All rights reserved. Page 5 of 9 Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com PE4242 Product Specification Typical Performance Data @ 25C Figure 11. Isolation - RF1 to RF2, RF2 to RF1 0 0 -20 -20 -40 -40 Isolation (dB) Isolation (dB) Figure 10. Isolation - RFC to RF2 -60 -80 -60 e -80 -100 500 1000 1500 2000 2500 3000 0 500 1000 1500 2000 2500 3000 Frequency (MHz) bs ol Frequency (MHz) et -100 0 Figure 13. Return Loss - RF1, RF2 O Figure 12. Return Loss - RFC to RF1, RF2 0 0 -10 RF1 -20 Return Loss (dB) Return Loss (dB) -10 RF1 -30 -20 RF2 -30 RF2 -40 -40 0 500 1000 1500 2000 2500 3000 Frequency (MHz) (c)2003-2011 Peregrine Semiconductor Corp. All rights reserved. 0 500 1000 1500 2000 2500 3000 Frequency (MHz) Document No. 70-0095-04 UltraCMOSTM RFIC Solutions Page 6 of 9 Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com PE4242 Product Specification Figure 14. Package Drawing 6-lead SC-70 1.80 2.20 0.65 BSC 0.10 0.30 1.80 2.40 e 1.15 1.35 et 0.10 0.40 0.10 0.18 O 0.80 1.00 bs ol 0.15 0.30 0.80 1.10 0.00 0.10 Document No. 70-0095-04 www.psemi.com (c)2003-2011 Peregrine Semiconductor Corp. All rights reserved. Page 7 of 9 Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com PE4242 Product Specification e Figure 15. Tape and Reel Specifications et Pin 1 Tape Feed Direction Ao 2.25 0.05 Bo 2.40 0.05 Ko 1.20 0.05 Bump 1 ol Tolerance bs Nominal bump side down Device Orientation in Tape O Notes: 10 sprocket hole pitch cumulative tolerance 0.02 Camber not to exceed 1 mm in 100 mm Material: Black Conductive Advantek Polystyrene Ao and Bo measured on a plane 0.3 mm above the bottom of the pocket Ko measured from a plane on the inside bottom of the pocket to the top surface of the carrier Pocket position relative to sprocket hole measured as true position of pocket, not pocket hole Table 7. Ordering Information Order Code Part Marking Description Package Shipping Method 4242-00 PE4242-EK PE4242-06SC70-EK Evaluation Kit 1 / Box 4242-52 242 PE4242G-06SC70-3000C Green 6-lead SC-70 3000 units / T&R Sales Contact and Information For Sales and contact information please visit www.psemi.com. Advance Information: The product is in a formative or design stage. The datasheet contains design target specifications for product development. Specifications and features may change in any manner without notice. Preliminary Specification: The datasheet contains preliminary data. Additional data may be added at a later date. Peregrine reserves the right to change specifications at any time without notice in order to supply the best possible product. Product Specification: The datasheet contains final data. In the event Peregrine decides to change the specifications, Peregrine will notify customers of the intended changes by issuing a CNF (Customer Notification Form). The information in this datasheet is believed to be reliable. However, Peregrine assumes no liability for the use of this information. Use shall be entirely at the user's own risk. (c)2003-2011 Peregrine Semiconductor Corp. All rights reserved. No patent rights or licenses to any circuits described in this datasheet are implied or granted to any third party. Peregrine's products are not designed or intended for use in devices or systems intended for surgical implant, or in other applications intended to support or sustain life, or in any application in which the failure of the Peregrine product could create a situation in which personal injury or death might occur. Peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in such applications. The Peregrine name, logo, and UTSi are registered trademarks and UltraCMOS, HaRP, MultiSwitch and DuNE are trademarks of Peregrine Semiconductor Corp. Document No. 70-0095-04 UltraCMOSTM RFIC Solutions Page 8 of 9 Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com