Document No. 70-0095-04 │www.psemi.com
Page 1 of 9
©2003-2011 Peregrine Semiconductor Corp. All rights reserved.
Parameter Conditions Minimum Typical Maximum Units
Operation Frequency1 10 3000 MHz
Insertion Loss 1000 MHz
2000 MHz 0.7
0.9
0.85
1.05
dB
dB
Isolation 1000 MHz
2000 MHz
30
21
32
23 dB
dB
Return Loss 1000 MHz
2000 MHz
18
16
22
18 dB
dB
‘ON’ Switching Time 50% CTRL to 0.1 dB of final value, 1 GHz 300 ns
‘OFF’ Switching Time 50% CTRL to 25 dB isolation, 1 GHz 200 ns
Video Feedthrough2 15 mVpp
Input 1 dB Compression 2000 MHz 26 27 dBm
Input IP3 2000 MHz, 14 dBm input power 43 45 dBm
The PE4242 UltraCMOS™ RF Switch is designed to cover a
broad range of applications from 10 MHz through 3 GHz. This
reflective switch integrates on-board CMOS control logic with a
low voltage CMOS-compatible control interface, and can be
controlled using either single-pin or complementary control
inputs. Using a nominal +3-volt power supply voltage, a typical
input 1 dB compression point of +27 dBm can be achieved.
The PE4242 RF Switch is manufactured on Peregrine’s
UltraCMOS™ process, a patented variation of silicon-on-
insulator (SOI) technology on a sapphire substrate, offering the
performance of GaAs with the economy and integration of
conventional CMOS.
Product Specification
SPDT UltraCMOS™
10 MHz - 3 GHz RF Switch
Product Description
Figure 1. Functional Diagram
Figure 2. Package Type
PE4242
Features
Single-pin or complementary CMOS
logic control inputs
+3.0-volt power supply needed for single
-pin control mode
Low insertion loss: 0.7 dB at 1000 MHz,
0.9 dB at 2000 MHz
Isolation of 32 dB at 1000 MHz, 23 dB at
2000 MHz
Typical input 1 dB compression point of
+27 dBm
Ultra-small SC-70 package
Notes: 1. Device linearity will begin to degrade below 10 MHz
2. The DC transient at the output of any port of the switch when the control voltage is switched from Low to High or High to Low in a 50 Ω test set-up, measured with
1ns risetime pulses and 500 MHz bandwidth.
Table 1. Electrical Specifications @ +25 °C, VDD = 3 V (ZS = ZL = 50 Ω)
6-lead SC-70
71-0015
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Product Specification
PE4242
Page 2 of 9
©2003-2011 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0095-04 │UltraCMOS™ RFIC Solutions
Pin No. Pin Name Description
1 RF1 RF1 port2
2 GND
Ground connection. Traces should be
physically short and connected to ground
plane for best performance.
3 RF2 RF2 port1
4 CTRL Switch control input, CMOS logic level
5 RFC Common RF port for switch1
6 CTRL or
VDD
This pin supports two interface options:
Single-pin control mode. A nominal 3-volt
supply connection is required.
Complementary-pin control mode. A
complementary CMOS control signal
to CTRL is supplied to this pin.
Bypassing on this pin is not required in
this mode.
Table 2. Pin Descriptions1
Note: 1. Operation should be restricted to the limits in the Operating Ranges table
2. All RF pins must be DC blocked with an external series capacitor or held
at 0 VDC.
Figure 3. Pin Configuration (Top View)
Table 3. Absolute Maximum Ratings
Table 4. DC Electrical Specifications
Symbol Parameter/Conditions Min Max Units
VDD Power supply voltage -0.3 4.0 V
VI Voltage on any input -0.3 VDD+ 0.3 V
TST Storage temperature range -65 150 °C
TOP Operating temperature range -40 85 °C
PIN Input power (50 Ω) 30 dBm
VESD1 HBM ESD Voltage 1500 V
Parameter Min Typ Max Units
VDD Power Supply Voltage 2.7 3.0 3.3 V
IDD Power Supply Current
(VDD = 3 V, VCTRL = 3 V) 250 500 nA
Control Voltage High 0.7x VDD V
Control Voltage Low 0.3x VDD V
Note: 1. Human Body Model ESD Voltage (HBM, MIL_STD 883 Method 3015.7)
Exceeding absolute maximum ratings may cause
permanent damage. Operation between operating
range maximum and absolute maximum for
extended periods may reduce reliability.
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS™ device, observe
the same precautions that you would use with
other ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the specified rating.
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS™
devices are immune to latch-up.
Moisture Sensitivity Level
The Moisture Sensitivity Level rating for the
PE4242 in the 6-lead SC-70 package is MSL1.
Obsolete
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Product Specification
PE4242
Page 3 of 9
Document No. 70-0095-04 │www.psemi.com ©2003-2011 Peregrine Semiconductor Corp. All rights reserved.
Control Logic Input
The PE4242 is a versatile RF CMOS switch that
supports two operating control modes; single-pin
control mode and complementary-pin control
mode.
Single-pin control mode enables the switch to
operate with a single control pin (pin 4) supporting
a +3-volt CMOS logic input, and requires a
dedicated +3-volt power supply connection on
pin 6 (VDD). This mode of operation reduces the
number of control lines required and simplifies the
switch control interface typically derived from a
CMOS μProcessor I/O port.
Complementary-pin control mode allows the
switch to operate using complementary control
pins CTRL and CTRL (pins 4 & 6), that can be
directly driven by +3-volt CMOS logic or a suitable
μProcessor I/O port. This enables the PE4242 to
be used as a potential alternate source for SPDT
RF switch products used in positive control
voltage mode and operating within the PE4242
operating limits.
Control Voltages Signal Path
Pin 6 (VDD) = VDD
Pin 4 (CTRL) = Low RFC to RF1
Pin 6 (VDD) = VDD
Pin 4 (CTRL) = High RFC to RF2
Table 5. Single-pin Control Logic Truth Table
Table 6. Complementary-pin Control Logic
Truth Table
Control Voltages Signal Path
Pin 6 (CTRL or VDD) = High
Pin 4 (CTRL) = Low RFC to RF1
Pin 6 (CTRL or VDD) = Low
Pin 4 (CTRL) = High RFC to RF2
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Product Specification
PE4242
Page 4 of 9
©2003-2011 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0095-04 │UltraCMOS™ RFIC Solutions
Evaluation Kit
The SPDT Switch Evaluation Kit board was
designed to ease customer evaluation of the
PE4242 SPDT switch. The RF common port is
connected through a 50 Ω transmission line to the
top left SMA connector, J1. Port 1 and Port 2 are
connected through 50 Ω transmission lines to the
top two SMA connectors on the right side of the
board, J3 and J2, respectively. A through
transmission line connects SMA connectors J4
and J5. This transmission line can be used to
estimate the loss of the PCB over the
environmental conditions being evaluated.
The board is constructed of a two metal layer FR4
material with a total thickness of 0.031”. The
bottom layer provides ground for the RF
transmission lines. The transmission lines were
designed using a coplanar waveguide with ground
plane model using a trace width of 0.0476”, trace
gaps of 0.030”, dielectric thickness of 0.028”,
metal thickness of 0.0021” and εr of 4.4.
J6 provides a means for controlling DC and digital
inputs to the device. Starting from the lower left
pin, the second pin to the right (J6-3) is connected
to the device V1 or CTRL input. The fourth pin to
the right (J6-7) is connected to the device V2 or
CTRL/VDD input.
Figure 4. Evaluation Board Layout
Figure 5. Evaluation Board Schematic
101/0083
102/0145
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Product Specification
PE4242
Page 5 of 9
Document No. 70-0095-04 │www.psemi.com ©2003-2011 Peregrine Semiconductor Corp. All rights reserved.
-100
-80
-60
-40
-20
0
0 500 1000 1500 2000 2500 3000
Isolation (dB)
Frequency (MHz)
-1.5
-1.2
-0.9
-0.6
-0.3
0
0 500 1000 1500 2000 2500 3000
Insertion Loss (dB)
Frequency (MHz)
Insertion Loss (dB)
-40°C
25°C85°C
20
30
40
50
60
20
30
40
50
60
0 500 1000 1500 2000 2500 3000
IIP3 (dBm)
1dB Compression Point (dBm)
Frequency (MHz)
-1.5
-1.2
-0.9
-0.6
-0.3
0
0 500 1000 1500 2000 2500 3000
Insertion Loss (dB)
Frequency (MHz)
Insertion Loss (dB)
-40°C
25°C85°C
Typical Performance Data @ -40 °C to 85 °C (Unless otherwise noted)
Figure 7. Input 1 dB Compression Point & IIP3
(Typical Performance @ 25 °C)
Figure 9. Isolation – RFC to RF1
(Typical Performance @ 25 °C)
Figure 8. Insertion Loss – RFC to RF2
Figure 6. Insertion Loss – RFC to RF1
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Product Specification
PE4242
Page 6 of 9
©2003-2011 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0095-04 │UltraCMOS™ RFIC Solutions
-40
-30
-20
-10
0
0 500 1000 1500 2000 2500 3000
Return Loss (dB)
Frequency (MHz)
RF2
RF1
-40
-30
-20
-10
0
0 500 1000 1500 2000 2500 3000
Return Loss (dB)
Frequency (MHz)
RF2
RF1
-100
-80
-60
-40
-20
0
0 500 1000 1500 2000 2500 3000
Isolation (dB)
Frequency (MHz)
-100
-80
-60
-40
-20
0
0 500 1000 1500 2000 2500 3000
Isolation (dB)
Frequency (MHz)
Figure 11. Isolation – RF1 to RF2, RF2 to RF1
Figure 13. Return Loss – RF1, RF2 Figure 12. Return Loss – RFC to RF1, RF2
Figure 10. Isolation – RFC to RF2
Typical Performance Data @ 25°C
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Product Specification
PE4242
Page 7 of 9
Document No. 70-0095-04 │www.psemi.com ©2003-2011 Peregrine Semiconductor Corp. All rights reserved.
6-lead SC-70
Figure 14. Package Drawing
1.80
2.20
0.65
BSC
1.80
2.40
1.15
1.35
0.15
0.30
0.80
1.10
0.80
1.00
0.10
0.30
0.10
0.40 0.10
0.18
0.00
0.10
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Product Specification
PE4242
Page 8 of 9
©2003-2011 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0095-04 │UltraCMOS™ RFIC Solutions
Table 7. Ordering Information
Order Code Part Marking Description Package Shipping Method
4242-00 PE4242-EK PE4242-06SC70-EK Evaluation Kit 1 / Box
4242-52 242 PE4242G-06SC70-3000C Green 6-lead SC-70 3000 units / T&R
Figure 15. Tape and Reel Specifications
Pin 1
Notes: 10 sprocket hole pitch cumulative tolerance ±0.02
Camber not to exceed 1 mm in 100 mm
Material: Black Conductive Advantek Polystyrene
Ao and Bo measured on a plane 0.3 mm above the bottom of the pocket
Ko measured from a plane on the inside bottom of the pocket to the top surface of the carrier
Pocket position relative to sprocket hole measured as true position of pocket, not pocket hole
Nominal Tolerance
Ao 2.25 ±0.05
Bo 2.40 ±0.05
Ko 1.20 ±0.05
Tape Feed Direction
Device Orientation in Tape
bump
side
down
Bump 1
Advance Information:
The product is in a formative or design stage. The datasheet contains design target
specifications for product development. Specifications and features may change in any manner without notice.
Preliminary Specification:
The datasheet contains preliminary data. Additional data may be added at a later
date. Peregrine reserves the right to change specifications at any time without notice in order to supply the best
possible product.
Product Specification:
The datasheet contains final data. In the event Peregrine decides to
change the specifications, Peregrine will notify customers of the intended changes by issuing a CNF (Customer
Notification Form).
The information in this datasheet is believed to be reliable. However, Peregrine assumes no liability for the use
of this information. Use shall be entirely at the user’s own risk.
No patent rights or licenses to any circuits described in this datasheet are implied or granted to any third party.
Peregrine’s products are not designed or intended for use in devices or systems intended for surgical implant,
or in other applications intended to support or sustain life, or in any application in which the failure of the
Peregrine product could create a situation in which personal injury or death might occur. Peregrine assumes no
liability for damages, including consequential or incidental damages, arising out of the use of its products in
such applications.
The Peregrine name, logo, and UTSi are registered trademarks and UltraCMOS, HaRP, MultiSwitch and DuNE
are trademarks of Peregrine Semiconductor Corp.
Sales Contact and Information
For Sales and contact information please visit www.psemi.com.
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