Application Note RKE Design Kit (U2741B, U3741BM) Table of Contents 1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2. Hardware Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.1 Basic Application Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2 Transmitter Application Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2.1 General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2.2 Application Hints U2741B/U2745BM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.3 Receiver Application Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.3.1 General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.3.2 Application Hints U3741BM/U3742BM/U3745BM . . . . . . . . . . . . . . . . . . . . . . . 3. Software Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1 Transmitter Application Software U2741B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1.1 Basic Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1.2 Installation and System Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1.3 Start of the Transmitter Application Software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1.4 Program Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1.5 Exit of the Transmitter Application Software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2 Receiver Application Software U3741BM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1 Basic Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.2 Installation and System Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.3 Start of the Receiver Application Software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.4 Program Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.5 Exit of the Receiver Application Software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.6 Accuracy and Resolution of the Telegram Evaluation . . . . . . . . . . . . . . . . . . . . . . . . . . 2 2 3 4 5 12 16 16 25 33 33 33 33 34 35 42 43 43 43 44 45 52 53 10.00 1 1. Introduction The RKE Design Kit supports the development of RKE systems with Atmel Wireless & Microcontrollers' UHF FSK/ASK remote control transmitter U2741B and the UHF FSK/ASK remote control receiver U3741BM. The RKE Design Kit contains a basic application board, an RF receiver (receiver application board) and an RF transmitter (transmitter application board). The configuration of the RF receiver and transmitter is programmable via the PC with the receiver application software and the transmitter application software. With these programs, parameters like baudrate, modulation, testword etc. can be changed in a very quick and comfortable way. In addition, the receiver application software provides some tools to evaluate the data transmission (histogram, timing list). The data communication between the PC and the application boards occurs via the serial port (RS232). To configure the RF transmitter or receiver, the appropriate board must be connected to the basic application board RS232. Note: This application note is dedicated to the Ux741B(M) chipset, however, the entire description is also valid for the consumer version Ux745B(M). The following shows the relevant restricted features: Tx/Rx: no FSK option usable, Rx: no sensitivity reduction. 2. Hardware Components Receiver application board Basic application board V3 TEMIC RKE-Design Kit Basic application board +V -V RS232 R7 -V +V 5V V1A 10/98 Adapter-PCB Transmitter application board Figure 1. RKE Design Kit Note the correct position of the application boards ! List of Components D 1 CR 2025 (lithium battery) D 1 basic application board D 1 multiflex antenna 400 MHz to 470 MHz D 1 receiver application board (RF receiver) D 1 SMB cable assembly (female contact) D 1 adapter - PCB D Adapter: 1 SMB (male) to BNC (female) 1 SMB (female) to BNC (male) D 1 transmitter application board (RF transmitter) D 1 modem adapter DB9 F - DB25 M D 1 AT-XT/PS2 link cable (RS232) D 3 disks 3.5" 2 10.00 2.1 Basic Application Board To configure the RF transmitter or receiver, the appropriate board must be connected to the basic application board (see figure 1). To prevent damaging, the application boards must be in the correct position! Via a serial port (RS232) the basic application board must be connected to the PC. The configuration will be done by the transmitter- resp. receiver application software. During configuration, the microcontroller M48C892 on the basic application board handles the data communication with the PC, the receiver application board and the transmitter application board. When configured, the transmitter application board operates stand-alone and can be removed. Basic Function The receiver application board operates only in conjunction with the basic application board. After power on, the microcontroller M48C892 on the basic application board configures the RF receiver and enables it by setting Pin ENABLE to `1' (see figure 2). Then the receiver is in the polling mode and verifies the presence of a valid transmitter signal. The parameters for the bitcheck (BR_Range, Nbitcheck, Tsleep, Lim_min, Lim_max) are programmable with the receiver application software. If a valid transmitter signal is detected, the receiver remains active and transfers the data stream to the connected microcontroller M48C892 on the basic application board. The microcontroller measures continuously the distance between 2 signal edges ( = 1 sample). If the distance t > = 1/Baudrate, the following 64 samples will be stored in the RAM of the microcontroller (start of measurement / end of measurement, figure 2). Then the RF receiver will be disabled by setting Pin ENABLE to `0'. The timing limits of 1/Baudrate is programmable in the receiver application software (see `Evaluation -C_Limits', chapter 3.2.4). The 64 samples will be examined to distinguish between a valid signal from a corresponding transmitter and signals due to noise. This is done by a time frame check where the samples are continuously compared to a programmable time window (C_Limits). If the samples are within the time window, this will be indicated by the LED H1. If the received data stream is equal to a programmable testword (Testword), this will be indicated by the LED H2. After the evaluation of the received data stream, the RF receiver will be enabled by setting Pin ENABLE to `1'. The timing information (64 samples) also can be evaluated with the functions `Testword', `Histogram' and `Timing_List' in the receiver application software. Basic application board Receiver application board M48C892 U3741B M I/O DATA Out ENABLE LED H1 LED H2 Transmitter application board U2741B Antenna Antenna LED H4 Valid Transmitter Signal Preburst Testword Transmitter Signal ENABLE 1 64 DATA 64 Samples t >= 1/BR Start of measurement (BR: Baudrate, Manchester code) End of measurement 14115 Figure 2. Principle function 10.00 3 Technical Features D Power supply: VCC = +5 V D 2 connectors (BU1/BU3, BU2/BU4) to connect the transmitter- and the receiver application board. D Key S5 generates a reset for the microcontroller on the basic application board. If the transmitter application board is connected to the basic application board, the reset will also be generated for this board. D LED H4 indicates the voltage on BU1/5V and BU2/5V (power supply for the transmitter- and the receiver application board). Voltage on --> LED H4 off Voltage off --> LED H4 on D LED H2 indicates the receipt of a valid testword (see `Telegram Testword', chapter 3.2.4). D LED H1 indicates whether the timing of the received data stream is within the programmable C_Limits (see `Telegram Testword', chapter 3.2.4). D Jumper setting on the basic application board (see figure 3) TP8 TP7 TP6 TP4 TP3 TP5 14117 Figure 3. Jumper setting 2.2 Transmitter Application Board Front Back 14110 Figure 4. Transmitter application board U2: U2741B, U1: M48C892/ M44C892, S1: Button 1, S2: Button 2, S3: Button 3 4 10.00 2.2.1 General Description Table 1 List of available transmitter application boards Transmitter Application Board [fsend / Modulation] 433.92 MHz/ ASK 433.92 MHz/ FSK 315 MHz/ ASK 315 MHz/ FSK C3 [pF] C4 [pF] C8 [pF] C9 [pF] C11 [pF] Q1 [MHz] not mounted 6.8 not mounted 15 8.2 3.9 12 2.7 8.2 8.2 18 18 5.6 5.6 10 10 5.6 5.6 12 12 13.56 13.56 9.8438 9.8438 Basic Function The transmitter application board is a programmable, stand-alone-operating RF transmitter containing the UHF FSK/ASK remote control transmitter U2741B and the microcontroller M48C892/ M44C892. The power supply of the board is provided by a 3-V lithium battery. The operating frequency, fsend, of the transmitter depends on the frequency of the quartz Q1 (see table 1). 4. Switch on the 5-V power supply of the basic application board. 5. Connect the serial link cable (RS232) to an unused serial port (Com1, Com2). 6. Press the reset button (Key S5). 7. Start the transmitter (U2741B.EXE). application software 8. Program the transmitter and the receiver with the target values. Technical Features D Power supply: 3-V lithium battery D The function of the buttons S1, S2 and S3 is programmable with the transmitter application software (see `Button', chapter 3.1.4). D The function will be started by pressing button S1, S2 or S3 and will be indicated by the LED (D1). The end of all continuous functions also will be indicated by the LED (D1). D Operating frequency fSend: 433.92 MHz 315 MHz D Effective radiated power ERP: -21 dBm (433.92 MHz) -20 dBm (315 MHz) Programming of the RF Transmitter Starting of the RKE Design Kit 1. Switch on the PC and start the operating system. 2. Remove or insulate the 3-V lithium battery in the transmitter. 3. Assemble the RKE Design Kit as shown in figure 1. 10.00 9. Switch off the 5-V power supply of the basic application board and remove the transmitter from the adapter PCB. 10. Insert the 3-V lithium battery in the transmitter. 11. To activate the transmitter, press button S1 or S2. Reprogramming of the Transmitter D Switch off the 5-V power supply of the basic application board. D Remove or insulate the 3-V lithium battery from the transmitter. D Connect the transmitter to the adapter PCB. D Switch on the 5-V power supply of the basic application board. D Press the reset button (Key S5). D Program the transmitter with the target values. D Switch off the 5-V power supply of the basic application board and remove the transmitter from the adapter PCB. D Insert the 3-V lithium battery in the transmitter. D Press button S1 or S2 to activate the transmitter. 5 14111 Figure 5. Schematic transmitter application board: 433.92 MHz / ASK 6 10.00 2 1 Switch1 S1 4 R7 100k 3 VCC -VBatt X2 +VBatt X1 1 3 1u C14 1 3 100k R9 VCC R8 100k Pin9 Switch2 2 S2 4 VCC C12 100nF VCC P i n 1 2 14 13 12 Pin10 10 Pin11 11 Switch3 2 S3 4 5 3 4 1 2 JP2 PrgAdap 1 2 3 4 5 6 7 8 NRSTF M48C892 / M44C892 BP10 BP60/T3O OSC_1 OSC_2 BP53/INT1 BP52/INT1 BP51/INT6 BP50/INT6 BP40/SC/INT3 VBAT VDD U1 COIL_1 COIL_2 not mounted P i n 1 Pin6 6 7 8 9 Pin5 Pin3 Pin4 P i n 2 C13 1 2 JP1 HEADER 2 VSS 130k R10 BP13 Pin1 Pin2 Pin3 Pin4 Pin5 Pin6 Pin9 Pin10 Pin11 Pin12 VCC NRSTC BP63/T3I/INT5 BP23 BP22 BP21 BP20/NTE 1 2 3 4 5 6 7 8 9 10 NGAP MOD FC BP43/SD/INT3 BP42/T2O BP41/T2I/VMI not mounted BR5 R5 47k 15 16 17 21 20 19 18 U3 COIL_1 COIL_2 VBATT VDD BP40 BP53 BP50 OSC_1 OSC_2 BP60 U9280 not mounted Testpoint LP2 Pin17 Pin18 Pin24 Pin23 Pin22 Pin25 25 24 23 22 Pin28 Pin27 Pin26 28 27 26 NGAP MOD FC VSS BP43 BP42 BP41 BP23 BP20 BP63 R6 47k 20 19 18 17 16 15 14 13 12 11 0 BR4 Pin28 Pin27 Pin26 Pin25 Pin24 Pin23 Pin22 Pin21 Pin18 Pin17 C16 not mounted LP1 15n 5% C1 22n 10% C7 Testpoint C6 1n 10% 220 5% 3,9n 5% R4 C2 1k R11 6 7 8 3 4 5 1 2 LFVCC LFGND LF U2741B VCC CLK GND U2 AM FM TLMD3100 D1 Transmitter Application Board Version 4 (433.92 MHz/ ASK) ANT DIVC PSET PVCC PGND1 PGND2 XTO1 XTO2 C15 10n 0 BR7 not mounted BR6 12 11 10 9 13 16 15 14 VCC BR0 not mounted C3 4 3 2 1nF 10% C5 1 13,56MHz Q1 1,2k 2% R12 0 BR1 not mounted C8 8.2p 2% np0 np0 L1 printed on PCB (4 turns, size 5*5mm, measured equivalent circuit 130nH // 4k // 0,62pF ) 8,2p 2% C4 BR3 0 RF - Transmittercircuit C11 5.6p 2% C9 5.6p 2% np0 np0 14112 Figure 6. Schematic transmitter application board: 433.92 MHz / FSK 10.00 7 2 1 Switch1 S1 4 R7 100k 3 VCC -VBatt X2 +VBatt X1 1 3 1u C14 1 3 100k R9 VCC R8 100k Pin9 Switch2 2 S2 4 VCC C12 100nF VCC P i n 1 2 14 13 12 Pin10 10 Pin11 11 Switch3 2 S3 4 5 3 4 1 2 JP2 PrgAdap 1 2 3 4 5 6 7 8 NRSTF M48C892 / M44C892 BP10 BP60/T3O OSC_1 OSC_2 BP53/INT1 BP52/INT1 BP51/INT6 BP50/INT6 BP40/SC/INT3 VBAT VDD U1 COIL_1 COIL_2 not mounted P i n 1 Pin6 6 7 8 9 Pin5 Pin3 Pin4 P i n 2 C13 1 2 JP1 HEADER 2 VSS 130k R10 BP13 Pin1 Pin2 Pin3 Pin4 Pin5 Pin6 Pin9 Pin10 Pin11 Pin12 VCC NRSTC BP63/T3I/INT5 BP23 BP22 BP21 BP20/NTE 1 2 3 4 5 6 7 8 9 10 NGAP MOD FC BP43/SD/INT3 BP42/T2O BP41/T2I/VMI not mounted BR5 R5 47k 15 U3 COIL_1 COIL_2 VBATT VDD BP40 BP53 BP50 OSC_1 OSC_2 BP60 U9280 not mounted Testpoint LP2 Pin17 17 16 Pin18 21 20 19 18 Pin24 Pin23 Pin22 Pin25 25 24 23 22 Pin28 Pin27 Pin26 28 27 26 NGAP MOD FC VSS BP43 BP42 BP41 BP23 BP20 BP63 R6 47k 20 19 18 17 16 15 14 13 12 11 BR4 0 Pin28 Pin27 Pin26 Pin25 Pin24 Pin23 Pin22 Pin21 Pin18 Pin17 C16 not mounted LP1 15n 5% C1 22n 10% C7 Testpoint 1n 10% C6 220 5% 3,9n 5% R4 C2 1k R11 6 7 8 3 4 5 1 2 LFVCC LFGND LF U2741B VCC CLK GND U2 AM FM TLMD3100 D1 Transmitter Application Board Version 4 (433.92 MHz/ FSK) BR6 ANT DIVC PSET PVCC PGND1 PGND2 XTO1 XTO2 C15 10n 0 BR7 not mounted 12 11 10 9 13 16 15 14 VCC 2 1 BR0 6.8p 2% C3 13,56MHz Q1 1,2k 2% R12 0 BR1 not mounted np0 3 4 1nF 10% C5 np0 C8 8.2p 2% np0 L1 printed on PCB (4 turns, size 5*5mm, measured equivalent circuit 130nH // 4k // 0,62pF ) 3.9p 2% C4 BR3 0 RF - Transmittercircuit C11 5.6p 2% C9 5.6p 2% np0 np0 Figure 7. Schematic transmitter application board: 315 MHz / ASK 8 10.00 2 1 Switch1 S1 4 R7 100k 3 VCC -VBatt X2 +VBatt X1 1 3 1u C14 1 3 100k R9 VCC R8 100k Pin9 Switch2 2 S2 4 VCC C12 100nF VCC P i n 1 2 14 13 12 Pin10 10 Pin11 11 Switch3 2 S3 4 5 3 4 1 2 JP2 PrgAdap 1 2 3 4 5 6 7 8 NRSTF M48C892 / M44C892 BP10 BP60/T3O OSC_1 OSC_2 BP53/INT1 BP52/INT1 BP51/INT6 BP50/INT6 BP40/SC/INT3 VBAT VDD U1 COIL_1 COIL_2 not mounted P i n 1 Pin6 6 7 8 9 Pin5 Pin3 Pin4 P i n 2 C13 1 2 JP1 HEADER 2 VSS 130k R10 BP13 Pin1 Pin2 Pin3 Pin4 Pin5 Pin6 Pin9 Pin10 Pin11 Pin12 VCC NRSTC BP63/T3I/INT5 BP23 BP22 BP21 BP20/NTE 1 2 3 4 5 6 7 8 9 10 NGAP MOD FC BP43/SD/INT3 BP42/T2O BP41/T2I/VMI not mounted BR5 R5 47k 15 16 17 21 20 19 18 U3 COIL_1 COIL_2 VBATT VDD BP40 BP53 BP50 OSC_1 OSC_2 BP60 U9280 not mounted Testpoint LP2 Pin17 Pin18 Pin24 Pin23 Pin22 Pin25 25 24 23 22 Pin28 Pin27 Pin26 28 27 26 NGAP MOD FC VSS BP43 BP42 BP41 BP23 BP20 BP63 R6 47k 20 19 18 17 16 15 14 13 12 11 0 BR4 Pin28 Pin27 Pin26 Pin25 Pin24 Pin23 Pin22 Pin21 Pin18 Pin17 C16 not mounted LP1 15n 5% C1 22n 10% C7 Testpoint C6 1n 10% 220 5% 3,9n 5% R4 C2 1k R11 6 7 8 3 4 5 1 2 LFVCC LFGND LF U2741B VCC CLK GND AM FM U2 TLMD3100 D1 Transmitter Application Board Version 4 (315 MHz/ ASK) ANT DIVC PSET PVCC 0 PGND1 PGND2 XTO1 XTO2 C15 10n VCC 12 11 10 9 13 16 15 14 not mounted BR7 BR6 2 1 BR0 not mounted C3 9,8438MHz Q1 1,2k 2% R12 0 BR1 not mounted 3 4 1nF C5 12p 2% C4 BR3 0 C8 18p 2% np0 np0 L1 printed on PCB (4 turns, size 5*5mm, measured equivalent circuit 130nH // 4k // 0,62pF ) RF - Transmittercircuit C11 12p 2% C9 10p 2% np0 np0 Figure 8. Schematic transmitter application board: 315 MHz / FSK 10.00 9 2 1 Switch1 S1 4 R7 100k 3 VCC -VBatt X2 +VBatt X1 1 3 1u C14 1 3 100k R9 VCC R8 100k Pin9 Switch2 2 S2 4 VCC C12 100nF VCC Switch3 2 S3 4 6 7 8 9 5 3 4 1 2 P i n 1 P i n 1 2 14 13 12 JP2 PrgAdap 1 2 3 4 5 6 7 8 NRSTF M48C892 / M44C892 BP10 BP60/T3O OSC_1 OSC_2 BP53/INT1 BP52/INT1 BP51/INT6 BP50/INT6 BP40/SC/INT3 VBAT VDD U1 COIL_1 COIL_2 not mounted Pin10 10 Pin11 11 Pin6 Pin5 Pin3 Pin4 P i n 2 C13 1 2 JP1 HEADER 2 VSS 130k R10 BP13 Pin1 Pin2 Pin3 Pin4 Pin5 Pin6 Pin9 Pin10 Pin11 Pin12 VCC NRSTC BP63/T3I/INT5 BP23 BP22 BP21 BP20/NTE 1 2 3 4 5 6 7 8 9 10 NGAP MOD FC BP43/SD/INT3 BP42/T2O BP41/T2I/VMI not mounted BR5 R5 47k 15 16 17 21 20 19 18 U3 COIL_1 COIL_2 VBATT VDD BP40 BP53 BP50 OSC_1 OSC_2 BP60 U9280 not mounted Testpoint LP2 Pin17 Pin18 Pin24 Pin23 Pin22 Pin25 25 24 23 22 Pin28 Pin27 Pin26 28 27 26 NGAP MOD FC VSS BP43 BP42 BP41 BP23 BP20 BP63 R6 47k 20 19 18 17 16 15 14 13 12 11 BR4 0 Pin28 Pin27 Pin26 Pin25 Pin24 Pin23 Pin22 Pin21 Pin18 Pin17 C16 not mounted LP1 15n 5% C1 22n 10% C7 Testpoint C6 1n 10% 220 5% 3,9n 5% R4 C2 1k R11 6 7 8 3 4 5 1 2 LFVCC LFGND LF U2741B VCC CLK GND U2 AM FM TLMD3100 D1 Transmitter Application Board Version 4 (315 MHz/ FSK) BR6 ANT DIVC PSET PVCC PGND1 PGND2 XTO1 XTO2 C15 10n 0 BR7 not mounted 12 11 10 9 13 16 15 14 VCC 2 1 BR0 15p 2% C3 9,8438MHz Q1 1,2k 2% R12 0 BR1 not mounted np0 3 4 1nF C5 C8 18p 2% np0 np0 L1 printed on PCB (4 turns, size 5*5mm, measured equivalent circuit 130nH // 4k // 0,62pF ) 2,7p 2% C4 BR3 0 RF - Transmittercircuit C11 12p 2% C9 10p 2% np0 np0 315 MHz / 433.92 MHz ASK / FSK Figure 9. Layer 1 transmitter application board Scale 1.7:1 10 14116 Figure 10. Layer 2 transmitter application board Scale 1.7:1 10.00 Table 2 Bill of Materials Components Pcs 1 315 MHz/ ASK X 315 MHz/ FSK X 433.92 MHz/ ASK X 433.92 MHz/ FSK X D1 U1 1 X X X U2 U3 C1 C2 C3 1 X X 1 1 1 X X X X X Housing Manufacturer/ Distributor TLMD3100 TOPLED Vishay TELEFUNKEN X M48C892/ M44C892 SSO28 X X X X X X U2741B-MFP U9280B 15nF/63nF 3.9nF/63V 15pF/63V, 6.8pF/63V Atmel Wireless & Microcontrollers X C4 1 X C9 C11 C12 C13 C14 C15 C16 Q1 1 1 X X X X X X 5% 5% 2% X7R Ceramic X7R Ceramic NP0 Ceramic SSO16 SSO20 Size 0603 Size 0603 Size 0603 2% NP0 Ceramic Size 0603 Murata 10% 10% 10% 2% X7R Ceramic X7R Ceramic X7R Ceramic NP0 Ceramic Size 0603 Size 0603 Size 0603 Size 0603 Murata X X NP0 Ceramic Size 0603 Murata X 10pF/63V, 5.6pF/63V 2% X NP0 Ceramic Size 0603 Murata X 12pF/63V, 5.6pF/63V 2% X X X X X X X 100nF/63V 10% X7R Ceramic Size 0805 1 1 X X X X X X X X 1mF 10nF/63V 20% 10% Tantal X7R Ceramic Size 1206 Size 0805 1 X X 1 1 1 1 1 1 1 1 1 2 3 1 3 1 Battery Case Board Murata X X X X 1 BR0 BR1 BR3 BR4 BR5 BR6 BR7 R10 R11 R5, R6 R7, R8, R9 R12 S1, S2, S3 Battery 10.00 X X X X Material X X X X 1 1 1 1 Tolerance 12pF/63V, 2.7pF/63V, 8.2pF/63V, 3.9pF/63V 1nF/63V 1nF/63V 22nF/63V 18pF/63V, 8.2pF/63V X C5 C6 C7 C8 Value 9.8438MHz, X X Order No.: 473 000 7281 Order No.: 473 000 7282 Size 0603 Size 0603 Size 0603 Size 0603 Size 0603 Size 0603 Size 0603 Size 0603 Size 0603 Size 0603 Size 0603 Size 0603 13.56MHz 0R/0.1W 0R/0.1W 0R/0.1W 0R/0.1W 0R/0.1W 0R/0.1W 0R/0.1W 150k/0.1W 1k/0.1W 47k/0.1W 100k/0.1W 1.2k/0.1W KSC241JB Battery CR2025 X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X 1 X X X X Battery Case 1 X X X X Transmitter Board 5% 5% 5% 5% 2% Order No.: 596-090 Order No.: 596-090 FR4 ACAL ITT RS Comp. RS Comp. Thickness 1.2mm 11 2.2.2 Application Hints U2741B/U2745BM looplength << wavelength. RLoss stands for the loss of the inductor. As usual with RF design, the peripheral circuit and layout are very important. It is recommended to adapt the individual design to the application suggestion. Design & Layout D Antenna Design and Matching In applications with limited space * possible antenna length l << wavelength * a magnetic loop antenna is recommended to avoid that the radiated field is affected by the user's hand. The major parameter of these antennas is the need for a strong current in order to create a magnetic field in an area inside the loop. Some characterizing values: R rad + 31 kW Rrad A A l2 In order to optimize the performance, the following rules have to be observed: - The area enclosed by the antenna loop has to be as large as possible. - The field density increases towards the loop edges. Therefore, the design of the obligatory ground plane of the entire circuit has to be carried out so that there is enough space to the loop's edges. - The design shape should be similar to a square (not a rectangle). 2 Loop antenna = radiation resistance of the antenna = area inside the loop antenna = wavelength to transmit Good The transmitted power is related to the value of Rrad. The radiated power Prad is the product of ILoop2 and Rrad. Ground plane 3 h + f A2 A Loop antenna = antenna efficiency = area inside the loop antenna The antenna efficiency is a function of the area A and means the relation between the effective radiated power and the driven power Pout IC of the output. Wrong Ground plane 14118 ERP = h x Pout IC ERP = effective radiated power = efficiency Figure 12. Antenna design shapes Equivalent Circuit of the Loop Structure LLoop RLoss Besides, the principles of layouting RF circuits as well as the blocking concepts (see next page) must be observed. Rrad 14162 Matching Figure 11. Equivalent circuit of the loop structure LLoop 8 nH / cm x l (w = 1 mm) 30 to 60 nH QL + w L Loop [ 30 to 50 (estimated) RLoss The impedance of the designed antenna has to be matched to the driving current source to the optimum load impedance: 500 . Together with the pin capacitance of about 0.9 pF, this results in the described value Zload opt: RLoss = loss resistance Rrad = radiation resistance Zload opt 433.92 MHz = 185 + j268 Zload opt 315 MHz = 260 + j330 The equivalent circuit (see figure 11) shows the parts that have to be considered in calculations. The range of possible inductor values is related to the condition: Since the inductance of the RF choke compensates the pin capacitance, the antenna circuit has actually to be matched to 500 . 12 10.00 The matching circuit can be described as follows: --> Zk Cmatch2 Try to find the optimum and bear in mind the small range of adjustable power maximum and the condition of Zload = Rload opt. Replace the trimmer with 2% capacitors and compare it with the results with trimmer. LLoop D Blocking Concepts ANT --> Zload--> Cmatch1 U2741B RLoss The design of the layout includes considerations to the blocking concepts in order to minimize ripples on the power supply. The following are the most important ones: Rrad - Battery input ports: place capacitor (100 nF ceramic) in between to prevent voltage break-in and ripples. 14119 Figure 13. Matching circuit Transform Z|| (parallel resonance impedance) to Zload = Rload opt. The capacitors Cmatch1 and Cmatch2 perform the transformation according to the equations below: (r = ratio) (M.1) Z || + Q 2 pf (M.2) Z || [ r2 Z out (M.3) C || + 1 w20 L Loop L Loop + C match1 Cmatch2 C match1 ) Cmatch2 C match1 ) C match2 Cmatch1 + r C || C match2 Example (Atmel Wireless & Microcontrollers' Transmitter Board) (M.4) r + antenna loop length: 5 cm antenna area: 4.5 cm2 LLoop = 40 nH QL = 40 (estimated) Rloss = 2.7 W Rrad = 0.026 W h [ Rrad / Rloss [ 1% Z|| = 4.4 kW with (M.2): r [ 3; with (M.3): C|| = 3.38 pF Cmatch 1 [ 10 pF Cmatch 2 [ 5 pF These values are theoretical. The chosen values are different and the influence of parasitic capacitors is obvious. Thus, continue the matching procedure by using two equivalent transmitters with different part values according to the following list: Cmatch1 = 6.8 / 8.2 / 10 / 12 /15 pF ( 2%) Cmatch2 = Trimmer 2 to 6 pF Example: Transmitter 1 with Cmatch1 = 10 pF and trimmer versus transmitter 2 with Cmatch1 = 8.2 pF and trimmer. 10.00 - Power-supply chip inputs: place capacitor (about 10 nF ceramic) in between to prevent ripples. Make sure that every single supply voltage (VCC, LFVCC, PVCC) is led separately from the input ports and the blocking is done to its ground (GND, LFGND, PGND1,2). - Try to layout a ground plane on the back side and use this with vias for blocking purpose. D Peripheral Circuit - In mixed-signal circuits, the separation of digital and analog groups is obligatory. So design the microcontroller separately from the RF part of the transmitter. - Loop filter: use the dimensions of the data sheet and place the ground part of the filter close to LFGND. In order to protect the sensitive loop filter structure against currents of the blocking capacitor (LFVCC vs. LFGND), place this component exceptionally not directly in between. - Quartz: FSK: The determination of the frequency deviation is done by the combination quartz Q1 and capacitor C4 (f = f0 + f) or Q1 and C3, C4 (f = f0 - f), respectively. ASK: The determination of the transmitter frequency is done by the combination quartz Q1 and capacitor C4 . Bear in mind the tolerances of the quartz (up to 100 ppm). The prototype must have a defined frequency. - Printed inductor L1: This part works as a feed inductor. Some additional remarks regarding this part as an RF part and the dimensions of the inductors' layout: The inductance of such a printed inductor is calculated using the following formula: L 49.2 x N2 x rav [nH] N = number of turns rav = radius (average) [in cm] (used area: about 5 mm2) 13 The RF value of L1 at 433.92 / 315 MHz of the Atmel Wireless & Microcontrollers board is about: 130 nH // 0.6 pF // 4 k. Design this inductor together with the parasitic capacitance of the antenna output in parallel resonance so that the antenna matching procedure is still valid in good approximation. according to the nominal transmitter frequency in a range up to 100 ppm and more, it might be useful to apply the pulling concept. - Antenna: (see paragraph `Antenna Design and Matching'). The compensation of parasitic parallel capacitances, e.g., 4.7 pF, is achieved by reducing the load capacitor from 8.2 pF down to 5.6 pF. This causes a shift towards the nominal transmitter frequency and is to be adapted to the chosen application. D FSK: Frequency Deviation D ASK and FSK The recommended frequency deviation is f 25 to 30 kHz. The U2741B can be used in both ASK and FSK systems. The following section describes the clocking concept of the microcontroller and its cooperation with the U2741B/ U3741BM. The determination of C3, C4 depends on the used quartz. Use the capacitors to tune the circuit according to the desired transmitter frequencies (f0 +/- f). Bear in mind the tolerances of the quartz (up to 100 ppm). The prototype must have a defined frequency. D Quartz: Frequency Pulling Quartz circuits are essential to achieve stable and accurate frequency performance. The use of a load capacitor CL in conjunction with the quartz determines the actual frequency. Since parasitic capacitors cause differences ASK Transmission As shown in figure 14, the transmitter IC is activated with VFSK = VS, VASK remains 0 V. Then the IC is enabled and the XTO and PLL settles. After 5 ms, the output power can be modulated by means of Pin ASK. In this case, VFSK remains = VS during the message. To stop the transmission set VASK = 0 V, then disable the transmitter with VFSK = 0 V. Timing ASK t > 5 ms ASK FSK CLK Antenna output f1 f1 f1 f1 f1 Figure 14. Clocking concept ASK 14 10.00 Timing FSK t > 5 ms ASK FSK CLK Antenna output f1 f2 f1 f2 f1 f2 f2 f1 f2 f1 f2 14121 Figure 15. Clocking concept FSK FSK Transmission As shown in figure 15, the transmitter IC is switched on with VFSK = VS ,VASK remains 0 V. Then the IC is enabled and the XTO and PLL settles. After 5 ms, VS is applied to VASK to turn on the power amplifier. The output can then be modulated by means of Pin FSK. In this case, VASK remains = VS during the message. To stop the transmission set VFSK = 0 V, then disable the transmitter with VASK = 0 V. Take Over the Clock Pulse in the C (MARC4) The divided clock of the crystal oscillator of the U2741B fCLK is used for clocking the C. The C (M48C892/ M44C892) has the special feature of starting with an integrated RC oscillator to switch on the U2741B with VFSK = VS. After 5 ms, the CLK of the U2741B is definitely stable. The C can use it now to send the message with crystal accuracy. The frequency fCLK depends on the crystal frequency fXTO and the input level of Pin DIVC. Table 3 Function of Pin DIVC DIVC = `0' DIVC = `1' 10.00 fCLK = fXTO / 4 fCLK = fXTO / 2 15 2.3 Receiver Application Board 2.3.1 General Description Basic Function The receiver application board is a programmable RF receiver containing the UHF FSK/ASK remote control receiver U3741BM. Atmel Wireless & Microcontrollers provides 8 different types of the receiver application board (see table 4). The boards differ in the board version (with/without SAW), the operating frequency (433.92 MHz/315 MHz) and the IF bandwidth of the U3741BM (300 kHz/ 600 kHz). For operation, the receiver application board must be connected to the basic application board. Version2(V2): Without SAW The configuration of the U3741BM is done by the microcontroller M48C892 on the basic application board. After power on, the RF receiver verifies the presence of a valid transmitter signal. If a valid signal is detected, the receiver remains active and transfers the data stream to the connected microcontroller M48C892 on the basic application board. Version5(V5): With SAW 14122 Figure 16. Receiver application board After receiving the data stream, the microcontroller disables the RF receiver (ENABLE = `0') and verifies the received data stream. If the data stream is equal to a programmable testword, stored in a non-volatile memory, this will be indicated by the LEDs H1 and H2 on the basic application board. Table 4 List of available receiver application boards Receiver Appl. Board Version R5 [kW] R6 [kW] C2 [pF] C3 [pF] C11 [pF] C17 [pF] L2 [nH] L3 [nH] Q1 [MHz] X2 Receiver Appl. Board 433.92 MHz/300 kHz/SAW V5 10 not mounted 8.2 22 5.6 8.2 33 27 6.76438 B3555 433.92 MHz/300 kHz/ no SAW 433.92 MHz/600 kHz/SAW V5 10 not mounted 8.2 22 5.6 8.2 33 27 6.76438 B3555 433.92 MHz/600 kHz/ no SAW Version R5 [kW] R6 [kW] C2 [pF] C3 [pF] C11 [pF] C17 [pF] L2 [nH] Q1 [MHz] V2 10 not mounted not mounted 15 5.6 3.3 22 6.76438 V2 10 not mounted not mounted 15 5.6 8.2 22 6.76438 16 315 MHz/300 kHz/SAW 315 MHz/600 kHz/SAW V5 V5 not mounted not mounted 10 10 10 10 47 47 8.2 8,2 22 22 82 82 47 47 4.90625 4.90625 B3551 B3551 315 MHz/300 kHz/no SAW 315 MHz/600 kHz/no SAW V2 not mounted 10 not mounted 33 8.2 22 39 4.90625 V2 not mounted 10 not mounted 33 8.2 22 39 4.90625 10.00 Technical Features Programming of the RF Receiver D The power supply is provided by the basic application board (+5 V) Starting of the RKE Design Kit D Power supply if using the receiver application board stand alone: Connectors X4 (GND) and X3 (+5 V). 1. Switch on the PC and start the operating system D Sensitivity: 315 MHz no SAW 433.92 MHz no SAW 315 MHz SAW 433.92 MHz SAW 2. Assemble the RKE Design Kit as shown in figure 1. -111 dBm -110 dBm -106 dBm -105 dBm 3. Switch on the 5-V power supply of the basic application board. D The reduced sensitivity can be set with the resistor R2. For more information, see data sheet U3741BM. 4. Connect the serial link cable (RS232) to an unused serial port (Com1, Com2). D For measurement purposes, the (U3741BM) is available on JP2. 5. Press the reset button (Key S5). Pin DATA D Jumper setting on the receiver application board ASK JP1 FSK 6. Start the receiver application software (U3741BM.EXE). 7. Program the receiver with the target values. Modulation ASK Reprogramming of the Receiver: 1. Press the reset button (Key S5). Modulation FSK 14164 2. Program the receiver with the target values. Figure 17. Jumper setting 10.00 17 18 433.92 MHz / 300 kHz / SAW 433.92 MHz / 600 kHz / SAW 433.92 MHz Matching to SAW Front-End Filter FSK/ASK JP1 HEADER 3 Receiver Application Board Version 5: 1 2 3 VS X3 JP2 12 11 10 9 8 7 6 5 4 3 2 1 VS VS VS Figure 18. Schematic receiver application board V5: 433.92 MHz/ 300 kHz/SAW; 433.92 MHz/ 600 kHz/SAW X4 C7 2.2u 10% R3 27k 10% C6 10n 10% GND 56k 2% C14 33n 5% C13 10n 10% C3 22p 5% NP0 C15 150p 10% 1 2 3 U1 SENS FSK/ASK CDEM 4 5 6 AVCC AGND DGND L2 TOKO LL2012 F33NJ 1 2 33n C2 5% 3 8.2p 4 5% NP0 Enable DATA ENABLE TEST POUT MODE 20 19 18 17 16 DVCC 15 R4 Q1 MIXVCC XTO 14 8 9 10 LNAGND LNA_IN NC U3741BM LFGND LF LFVCC 13 12 11 Pout 6.7643MHz Mode 5.6p 2% NP0 R6 not mounted C12 C8 150p 10% C17 NP0 R5 10k 10% C11 10n 10% C16 HEADER 12 VS 0 7 100p 5% NP0 X1 KOAX DATA R2 8,2p 5% L3 TOKO LL2012 F27 NJ 27n 5% R1 820 5% JP3 1 2 3 4 5 6 7 8 9 10 11 12 HEADER 12 X2 IN IN_GND CASE_GND CASE_GND B3555 OUT OUT_GND CASE_GND CASE_GND 5 6 7 8 C9 4.7n 5% C10 1n 5% 10.00 10.00 JP1 HEADER 3 Receiver Application Board Version 5: 315 MHz / 300 kHz / SAW 315 MHz / 600 kHz / SAW 315 MHz Matching to SAW Front-End Filter 1 2 3 FSK/ASK VS X3 JP2 12 11 10 9 8 7 6 5 4 3 2 1 VS VS VS Figure 19. Schematic receiver application board V5: 315 MHz/ 300 kHz/SAW; 315 MHz/ 600 kHz/SAW X4 C7 2.2u 10% R3 27k 10% C6 10n 10% GND 56k 2% C14 33n 5% C13 10n 10% C3 47p 5% NP0 C15 150p 10% 1 2 3 U1 SENS FSK/ASK CDEM 4 5 6 AVCC AGND DGND L2 TOKO LL2012 F82NJ 1 2 82n C2 5% 3 10p 4 5% NP0 Enable DATA ENABLE TEST POUT MODE 20 19 18 17 16 DVCC 15 Q1 MIXVCC XTO 14 8 9 10 LNAGND LNA_IN NC U3741BM LFGND LF LFVCC 13 12 11 Pout 4.906MHz Mode R5 not mounted C11 8.2p 2% NP0 R6 10k 10% C12 10n 10% C16 HEADER 12 VS R4 0 7 100p 5% NP0 X1 KOAX DATA R2 C8 150p 10% C17 NP0 22p 5% L3 TOKO LL2012 F47 NJ 47n 5% R1 820 5% JP3 1 2 3 4 5 6 7 8 9 10 11 12 HEADER 12 X2 IN IN_GND CASE_GND CASE_GND B3551 OUT OUT_GND CASE_GND CASE_GND 5 6 7 8 C9 4.7n 5% C10 1n 5% 19 20 433.92 MHz / 300 kHz / NO SAW 433.92 MHz / 600 kHz / NO SAW 433.92 MHz Matching to 50 Ohm without SAW Front-End Filter FSK/ASK JP1 HEADER 3 Receiver Application Board Version 2: 1 2 3 VS X3 VS VS Figure 20. Schematic receiver application board V5: 433.92 MHz/ 300 kHz/ NO SAW ; 433.92 MHz/ 600 kHz/ NO SAW VS X4 C7 2.2u 10% R3 27k 10% C6 10n 10% DATA R2 GND 56k 2% C14 33n 5% C13 10n 10% C3 15p 5% NP0 1 2 3 U1 SENS FSK/ASK CDEM 4 5 6 AVCC AGND DGND Enable DATA ENABLE TEST POUT MODE 20 19 18 17 16 DVCC 15 MIXVCC XTO 14 8 9 10 LNAGND LNA_IN NC U3741BM LFGND LF LFVCC 13 12 11 C15 150p 10% Pout 0 Mode Q1 7 6.7643MHz C17 C2 not mounted 3.3p 5% NP0 C16 5.6p 2% NP0 C12 10n 10% C8 150p 10% NP0 100p 5% L2 TOKO LL2012 F22NJ 22n 5% C9 4.7n 5% R5 10k 10% C11 R1 820 5% X1 KOAX HEADER 12 VS R4 JP2 12 11 10 9 8 7 6 5 4 3 2 1 R6 not mounted JP3 1 2 3 4 5 6 7 8 9 10 11 12 HEADER 12 C10 1n 5% 10.00 10.00 315 MHz / 300 kHz / NO SAW 315 MHz / 600 kHz / NO SAW 315 MHz Matching to 50 Ohm without SAW Front-End Filter FSK/ASK JP1 HEADER 3 Receiver Application Board Version 2: 1 2 3 VS X3 VS VS VS Figure 21. Schematic receiver application board V5: 315 MHz/ 300 kHz/ NO SAW; 315 MHz/ 600kHz/ NO SAW X4 C7 2.2u 10% R3 27k 10% C6 10n 10% DATA R2 GND 56k 2% C14 33n 5% C13 10n 10% C3 33p 5% NP0 Enable 1 2 3 U1 SENS FSK/ASK CDEM 4 5 6 AVCC AGND DGND DVCC 15 7 MIXVCC XTO 14 8 9 10 LNAGND LNA_IN NC U3741BM LFGND LF LFVCC 13 12 11 C15 150p 10% DATA ENABLE TEST POUT MODE 20 19 18 17 16 Pout 0 Mode Q1 4.906MHz C17 C2 not mounted 3.3p 5% NP0 C16 8.2p 2% NP0 C12 10n 10% C8 150p 10% NP0 100p 5% L2 TOKO LL2012 F39NJ 39n 5% C9 4.7n 5% R5 not mounted C11 R1 820 5% X1 KOAX HEADER 12 VS R4 JP2 12 11 10 9 8 7 6 5 4 3 2 1 R6 10k 10% JP3 1 2 3 4 5 6 7 8 9 10 11 12 HEADER 12 C10 1n 5% 21 14127 Figure 22. Layer 1 receiver application board V2: 433.92 MHz/ 300 kHz/ NO SAW; 433.92 MHz/ 600 kHz/ NO SAW; 315 MHz/ 300 kHz/ NO SAW; 315 MHz/ 600 kHz/ NO SAW; scale 1.7:1 14128 Figure 23. Layer 2 receiver application board V2: 433.92 MHz/ 300 kHz/ NO SAW; 433.92 MHz/ 600 kHz/ NO SAW; 315 MHz/ 300 kHz/ NO SAW; 315 MHz/ 600 kHz/ NO SAW; scale 1.7:1 22 10.00 14129 Figure 24. Layer 1 receiver application board V5: 433.92 MHz/ 300 kHz/ SAW; 433.92 MHz/ 600 kHz/ SAW; 315 MHz/ 300 kHz/ SAW; 315 MHz/ 600 kHz/ SAW; scale 1.7:1 14128 Figure 25. Layer 2 receiver application board V5: 433.92 MHz/ 300 kHz/ SAW; 433.92 MHz/ 600 kHz/ SAW; 315 MHz/ 300 kHz/ SAW; 315 MHz/ 600 kHz/ SAW; scale 1.7:1 10.00 23 Table 5 Bill of Materials Components Pcs A* U1 1 X X2 1 C2 1 C3 1 B* C* D* X X E* X X 1 1 Value X U3741BM-A2FP U3741BM-A3FP X X B3551 B3555 X X X X X X C17 H* X X X C11 G* X X X F* X X X X X X X X X X X X X X X X X Material Housing SO20 B39421-B3551-Z10 B39431-B3555-Z10 QCC8 S + M Components 5% NP0 ceramic Size 0603 33p/25V 15p/25V 47p/25V 22p/25V 5% NP0 ceramic Size 0603 5.6pF/25V 8.2p/25V 2% NP0 ceramic Size 0603 5% NP0 ceramic Size 0603 X X Manufacturer Atmel Wireless & Microcontrollers 8.2pF/25V 10p/25V 3.3p/25V 22pF/25V 8.2pF/25V X Tol. Murata C6, C12, C13 3 X X X X X X X X 10nF/25V 10% X7R ceramic Size 0603 C7 1 X X X X X X X X 2.2mF/6.3V 10% Tantal Size 1812 C8, C15 2 X X X X X X X X 150p/25V 10% X7R ceramic Size 0603 C9 1 X X X X X X X X 4.7nF/25V 5% X7R ceramic Size 0603 C10 1 X X X X X X X X 1nF/25V 5% X7R ceramic Size 0603 C14 1 X X X X X X X X 33nF/25V 5% X7R ceramic Size 0603 C16 1 X X X X X X X X 100pF/25V 5% NP0 ceramic Size 0603 R1 1 X X X X X X X X 820R/0.1W 5% Size 0603 R2 1 X X X X X X X X 56k/0.1W 2% Size 0603 R3 1 X X X X X X X X 56k/01W 2% Size 0603 R4 1 X X X X X X X X 0/0.1W R5 1 X X X X 10k/0.1W 10% Size 0603 R6 1 X 10k/0.1W 10% Size 0603 L2 1 5% LL2012-F<value> NJ LL2012 Toko X X 22nH 33nH 39nH 82nH X X 27nH 47nH 5% LL2012-F<value> NJ LL2012 Toko X X X Q1 X X X L3 X X 1 1 X X X X X X X 6.7643MHz X X X X 4.906MHz Connector 1 X X X X X X X X male Antenna 1 X X X X X X X X Antenna 400 to 470 MHz JP1 1 X X X X X X X X 3 pins Jumper 1 X X X X X X X X for JP1 JP2, JP3 1 X X X X X X X X 12 pins X3, X4 2 X X X X X X X X Connector pin Board 1 X X X X X X X X U3741BM-V2 U3741BM-V5 Size 0603 Order-No. 10141392 Order-No. 10141393 Type No. K71 32 29 Order-No. 510 195 Jauch Contact Radiall BNC connector 165 mm Antennengesellschaft Ulm Row connector Row connector FR4 Thickness 1.5 mm Note: A* = 315 MHz/ 300 kHz/ NO SAW B* = 315 MHz/ 600 kHz/ NO SAW C* = 433.92 MHz/ 300 kHz/ NO SAW D* = 433.92 MHz/ 600 kHz/ NO SAW E* = 315 MHz/ 300 kHz/ SAW F* = 315 MHz/ 600 kHz/ SAW G* = 433.92 MHz/ 300 kHz/ SAW H* = 433.92 MHz/ 600 kHz/ SAW 24 10.00 2.3.2 Application Hints U3741BM/U3742BM/U3745BM As usual with RF design, the peripheral circuit and layout are very important. It is recommended to adapt the individual design to the application suggestion. D Blocking Concepts The design of the layout includes considerations to the blocking concepts in order to minimize ripples on the power supply. The following are the most important ones: - Power supply input ports: place capacitors (about 2.2 F // 10 nF ceramic) in between to prevent voltage break-in and ripples. - Power supply chip inputs: place capacitor (about 10 nF ceramic) in between to prevent ripples. Make sure that every single supply voltage (AVCC, LFVCC, DVCC, MIXVCC) is led separately from the input ports and the blocking is done to its ground (AGND, LFGND, DGND). - Try to layout a ground plane on the back side and use this with vias for blocking purpose. D Peripheral Circuit D Quartz: Frequency Pulling Quartz circuits are essential to achieve stable and accurate frequency performance. The use of a load capacitor CL in conjunction with the quartz determines the actual frequency. Since parasitic capacitors cause differences according to the nominal local oscillator frequency in a range up to 100 ppm and more, it might be useful to apply the pulling concept (see chapter 2.2.2). D Input Matching The matching of the SAW filter/ antenna to the input impedance of the LNA causes much better noise matching results (different to power matching). Thus, it is recommended to use the circuit & layout of the respective application suggestion. To compensate individual layout etc., alter inductor L3 and capacitor C17. The matching parameters for SAW input towards the antenna is given by the manufacturer (see application circuits). Notes: - For the measurement of the input impedance, the receiver must be ON (i.e., no polling or sleep mode). - In mixed-signal circuits, the separation of digital and analog groups is obligatory. So bear in mind the separation of the DATA signal from the RF part like XTO and loop filter. The harmonics of the quartz frequency of the microcontroller must be includes in the spectral calculations. - The use of a SAW filter results in a different selectivity (see figure 8, data sheet U3741BM). - Loop filter: use the dimensions of the data sheet and place the ground part of the filter close to LFGND. D Measurement of the LO Frequency - LNAGND: the lead frame and bond wire inductance towards the LNA ground are compensated by C3, this capacitor forms a series resonance circuit together with these inductances. The inductance L = 25 nH is a feed inductor to form a DC path. Its value is not critical but must be large enough not to detune the series resonance circuit. For cost reduction, this inductor can be easily printed on the PCB. This configuration improves the sensitivity of the receiver about 1 dB to 2 dB. Use the measurements of the layout of the receiver board to get an idea about the relations of printed meander shaped inductors. - Quartz (see paragraph `Quartz: Frequency Pulling') - LNA (see paragraph `Input Matching') - CDEM (see paragraph `Data Encoding') 10.00 - U3742BM: The RSSI output can be used for matching purpose. The voltage is correlated to the sensitivity of the receiver. To perform a measurement of the local oscillator frequency, the version with SAW (SAW) and without SAW (NO SAW) have to be distinguished. NO SAW: The LO spurious emission ISLORF (see data sheet, paragraph LNA mixer) can be determined at the antenna input port. A typical value is -73 dBm. SAW: The saw loss backwards to the antenna reduces the signal too much, so the best way to perform the measurement is the use of an antenna and place it just above the receiver. D LO Frequency Shifting For certain reasons it might be important to shift the receiving frequency. A change of the XTO frequency causes this shift. Figure 26 shows the feed of a certain frequency into the XTO input. 25 Table 7 Timing conditions for FSK FSK Recommended CDEM Z = 50 W 220p <-- XTO < 50 > 1/fXTO V = 200 mV U3741BM 14131 Figure 26. XTO feed circuit D Data Encoding To obtain best performance using the U3741BM, the data should be encoded using Manchester or Bi-phase coding where the duty cycle of the signal is 0.5 (= 50%). This allows to cut off the DC portion of the signal using a highpass filter in the data filter. If the encoding is different, there are some restrictions of the signal timing and some impact on the sensitivity of the receiver. DC + < tH >< tL tH tH ) tL > 14132 Figure 27. Definition of the duty cycle (DC) Limits of LOW and HIGH Times (tL and tH) The minimum duration of a high or low period (tH, tL) is given by the upper cut-off frequency of the data filter. If the pulse width is lower than the recommended values, the sensitivity is reduced. Furthermore, the minimum time is limited by the digital circuit (see data sheet U3741BM, Electrical Characteristics, parameter TDATA_min). The mi-nimum time tH, tL of the encoder may not be shorter than the values shown in the tables 6 and 7 for reduced sensitivity. Table 6 Timing conditions for ASK (see also data sheet U3741BM, Electrical Characteristics) ASK BR_Range0 BR_Range1 BR_Range2 BR_Range3 26 Recommended CDEM 39 nF 22 nF 12 nF 8.2 nF Edge-to-Edge Time (tH, tL) for Full Sensitivity Min. (s) 270 156 89 50 Max. (s) 1000 560 320 180 Extended Edge-toEdge Time (tH, tL) with Reduced Sensitivity 3 dB Min. Max. (s) (s) 200 1250 100 700 60 400 30 250 BR_Range0 BR_Range1 27 nF 15 nF Edge-to-Edge Time (tH, tL) for Full Sensitivity Min. Max. (s) (s) 270 1000 156 560 Extended Time not available The maximum time of a pulse mainly depends on the cutoff frequency of the highpass filter which is set by the CDEM capacitor. To achieve short set-up times for the polling procedure, the CDEM values are limited for each baudrate range. Using the recommended values for the CDEM capacitor, the timing should be within the ranges shown in tables 6 and 7. The extended limits are given for a sensitivity reduction of about 3 dB. The tolerance of the CDEM capacitor should be 5%. If the encoder signal exceeds the maximum time limit, the output of the receiver becomes undefined. This could be random switching signal (see histogram, figure 29, for the distribution of pulse width of that signal). The digital circuit interrupts a LOW period after the time TDATA_max (see data sheet U3741BM, Electrical Characteristics). After the transmitter has been kept at one state for a time longer than the maximum given in tables 6 and 7 the following signals (1 to 2 bits) could be affected by inaccurate output timing or less noise immunity. Duty cycle of the data signal for non-Manchester/ Bi-phase codes i.e. PWM codes Duty cycle means the ratio between the pulse width (high level) and the whole high-low period. The full sensitivity is available at duty cycles close to 50%. Signals with different duty cycles can be received under following conditions: Table 8 Operating conditions with different duty cycles Duty Cycle ASK FSK 33% to 66% 25% to 75% 15% to 85% 2 dB 6 dB 10 dB less sensitivity less sensitivity less sensitivity Deviation of not applicable 30 kHz required, no change in sensitivity D Polling The configurable self-polling mode with a programmable timeframe check (bitcheck) guarantees a low power consumption. It is also possible to control the polling directly by the C via the Pin ENABLE. Polling via Pin ENABLE: The receiver remains in sleep mode as long as ENABLE is held to "L". After switching ENABLE to "H", the sleep time TSleep elapses. Then, the signal-processing circuits will be enabled and the incoming data stream will be analyzed by the bitcheck logic. 10.00 IF the receiver is polled exclusively by a C, TSleep can be programmed to zero to enable an instantaneous response time. If the analyzing of the incoming data stream is also be carried out by the C, the number of bits to be checked during the bitcheck NBitcheck can be programmed to 0. D Lim_min and Lim_max During bitcheck, the incoming data stream is examined to distinguish between a valid signal from a corresponding transmitter and signals due to noise. This is done by sub-sequent time frame checks where the distance between two signal edges are continuously compared to a program-mable time window. The limits of the time window TLim_min and TLim_max must be programmed by the C depending on the signal baudrate. Generally we recommend for the limit TLim_min to be 0.75 x the shortest distance between two signal edges of the transmitter preburst during bitcheck and TLim_max to be 1.25 x the longest distance between two signal edges of the transmitter preburst during bitcheck. Calculation of TLim_min and TLim_max for modulation schemes like Bi-phase and Manchester where the duty cycle is 50% and the preburst consists of a row of `1' or a row of `0': TLim_min = 0.75 / (2 x signal baudrate) TLim_max = 1.25 / (2 x signal baudrate) Calculation of TLim_min and TLim_max for the modulation schemes 1/3 - 2/3 where the duty cycle is 50%. logical '1' 1/3 2/3 logical '0' 2/3 1/3 Baudrate 14133 Figure 28. Modulation scheme 1/3 - 2/3 TLim_min = 0.75 / (3 x signal baudrate) TLim_max = 1.25 / (3/2 x signal baudrate) Additional information about the calculation of Lim_min and Lim_max: figure 29 illustrates a typical distribution of tee (edge-to-edge output) due to noise. The distribution of tee shows that the incidence of short tee is much higher than long tee. This means that the lower limit Lim_min has an essential influence regarding wake-up of the receiver due to noise. 14134 Figure 29. Typical distribution of tee (edge-to-edge output) due to noise; BR_range: B0 10.00 27 Table 9 illustrates the lower limit of the parameter Lim_min. To prevent wake-up of the U3741BM due to noise, the limit Lim_min must not be programmed below `Lower Limit of Lim_min'. The limit Lim_max was set to the maximum value during the determination of the `Lower Limit of Lim_min'. Generally, a wake-up due to noise becomes more unlikely if programming a smaller value for Lim_max. The `Lower Limit of Lim_min' depends on the selected baudrate range (BR_range) and on the number of bits to be checked. Table 9 BR_range B0 (1.0 to 1.8 kBaud) B1 (1.8 to 3.2 kBaud) B2 (3.2 to 5.6 kBaud) B3 (5.6 to 10.0 kBaud) Number of Bits to be Checked 3 6 9 3 6 9 3 6 9 3 6 9 t1 t2 Lower Limit of Lim_min 16 12 11 17 13 11 19 13 11 21 14 12 t3 The following method to calculate Lim_min and Lim_max is recommended: TLim_min = 0.75 / (2 x signal baudrate) TLim_max = 1.25 / (2 x signal baudrate) Lim_min = TLim_min / TXClk Lim_max = (TLim_max / TXClk) +1 If the calculated Lim_min `Lower Limit of Lim_min' OK What to do if the calculated Lim_min < `Lower Limit of Lim_min'? - Reduce the tolerance to calculate TLim_min and TLim_max (e.g. 20%) - If possible, use a higher baudrate range. Due to the characteristic, it is more likely that the device wakes up due to noise at the upper end of the baudrate range. D Programming Details The configuration registers of the U3741BM are programmed via the bi-directional data line. The programming sequence is described in the chapter `Programming the configuration registers' in the data sheet U3741BM. Some features of the programming sequence they will be described in more detail on the next page. t9 t5 t4 T Sleep t8 t6 t7 Out1 (mC) DATA (U3741BM) X X Serial bi-directional data line X X Receiver on Bit 1 ("0") (Startbit) Bit 2 ("1") (Register- select) Programming Frame Bit 13 ("0") (Poll8) Bit 14 ("1") (Poll8R) Startup mode 14135 Figure 30. Programming timing 28 10.00 Programming start pulse t1: The programming start pulse starts the programming sequence and is generated by a connected C. The necessary length of the programming start pulse depends on the active baudrate range and the logic output level of Pin DATA (U3741BM) during the start pulse. If the logic output level of Pin DATA is unknown during the start pulse, the start pulse length must be longer as the maximum low period at the DATA output TDATA_L_max. After a power-on reset, the programming start pulse must be at least 11.7 ms due to the reset marker. Programming pulse t7: Within the programming window t5, the individual bits are set. If the C pulls down the Pin DATA for the time t7 during t5, the according bit is set to `0'. If no programming pulse t7 is issued, this bit is set to `1'. If the logic output level of Pin DATA is `H' during the start pulse, the receiver is able to recognize the programming request after t1 3 x TClk. A proper detection of the programming request is guaranteed after t1 4 x TClk. DATA = `H' can be ensured by setting Pin ENABLE to `L'. This feature can be used if the time to reprogram is critical. Pay attention that spikes on the serial data line (tSpike > 3 x TClk) could start a programming sequence. To guarantee the detection of the programming pulse, the minimum length of t7 is 64 x TClk. If the programming pulse becomes shorter (32 x TClk t7 < 64 x TClk), the detection is not guaranteed. Table 10 Parameter Test Condition Symbol 6.76438 MHz Oscillator (MODE: 1) Min. Typ. Max. 4.90625 MHz Oscillator (MODE: 0) Min. Typ. Max. Variable Oscillator 2.0697 2.0383 1/(f XTO/10) 1/(f XTO/14) 1.6 8.3 4.1 2.1 16.3 8.2 4.1 2.0 8 x TClk 4 x TClk 2 x TClk 1 x TClk Min. Typ. Unit Max. Basic clock cycle of the digital circuitry Basic clock cycle Extended basic clock cycle Programming start pulse Programming pulse 10.00 MODE=0 (USA) MODE=1 (Europe) BR_Range = BR_Range0 BR_Range1 BR_Range2 BR_Range3 DATA = `1' during the start pulse. Detection of the programming request is not guaranteed. DATA = `1' during the start pulse. Detection of the programming request is guaranteed. DATA = `X' during the start pulse BR_Range = BR_Range0 BR_Range1 BR_Range2 BR_Range3 after POR TClk TXClk s s t1 6.2 6.1 3 x TClk s t1 8.3 8.2 4 x TClk s s t1 2188 1104 561 290 11656 Detection of the programming pulse not guaranteed. t7 66.2 Detection of the programming pulse guaranteed. t7 132.4 3176 3176 3176 3176 2155 1087 553 286 11479 3128 3128 3128 3128 130.4 1535 x TClk 1535 x TClk 1535 x TClk 1535 x TClk 32 x TClk 65.2 529.8 1057 x TClk 533 x TClk 271 x TClk 140 x TClk 5632 x TClk 521 64 x TClk s 256 x TClk s 29 D Acknowledge Pulse If the mode word just programmed is equivalent to the mode word that was already stored in that register, this will be indicated by the acknowledge pulse t8. If the mode word is not equivalent, no acknowledge pulse occurs. Example of a programming sequence: Power on reset: Default value for OPMODE register: Default value for LIMIT register: Programming of the OPMODE register with `48B0 Hex' Programming of the LIMIT register with `0E60 Hex' Programming of the OPMODE register with `58B0 Hex' Programming of the LIMIT register with `0F60 Hex' Programming of the LIMIT register with `0F60 Hex' Programming of the OPMODE register with `58B0 Hex' `48B0 Hex' `0E60 Hex' Acknowledge pulse Acknowledge pulse no Acknowledge pulse no Acknowledge pulse Acknowledge pulse Acknowledge pulse D Load Capacity of Pin DATA Table 11 Load capacity of Pin DATA Parameter Test Condition Data output Saturation voltage Low Iol = 1 mA Internal pull-up resistor Maximum time constant = CL x (Rpup//Rext) Maximum capacitive load Without external pull-up resistor Rext = 5 k U3741BM Rpup = 50 k DATA_IN VS Min. VOl Rpup CL CL Typ. Max. Unit 0.08 50 0.3 61 2.5 41 540 V k ms pF pF VS Rext DATA CL DATA_OUT Symbol Serial bi-directional data line DATA_OUT Serial bi-directional data line DATA_IN tDelay 14136 Figure 31. Load capacity of Pin DATA The U3741BM compares the internal signals DATA_OUT and DATA_IN. If the time tDelay 3 x TClk ( > 2.5 s), this can start the programming sequence and switching the receiver back to the sleep mode. 30 10.00 D Calculation Example of the Receiver Parameters Telegram Testword Preburst 1 / Baudrate Separa- tion 1 1 0 1 0 1 0 0 1 0 Manchester code 1 t 14137 Figure 32. Transmitter signal Table 12 Transmitter Signal Signal baudrate = 2400 Baud Testword = `A005 Hex' Preburst length = 20.83 ms (50 bits) Receiver U3741BM BR_range = B1 (1.8 to 3.2 kBaud) Number of bits to be checked = 3 *) POUT = 0 (If a resistor is connected between POUT and SENS2 this means full sensitivity) TLim_min = 156.25 s **) TLim_max = 260.4 s Lim_min = 19 Lim_max = 32 TSleep = 17.3 ms ***) Sleep = `01000 bin' *) to get better immunity against disturbance and noise select 6 or 9 bits. **) TLim_min = 0.75/ (2 x 2400 Baud) = 156.25 s TLim_max = 1.25/ (2 x 2400 Baud) = 260.4 s Lim_min = TLim_min/ TXClk = 156.25 s/ 8.3 s = 18.8 19 Lim_max = (TLim_max/ TXClk) + 1 = (260.4 s/ 8.3 s) + 1 = 32.4 32 (TXClk see table 13; 6.76438 MHz oscillator) ***) TSleep TPreburst - TStartup - TBitcheck - TStart_C TSleep 20.83 ms - 1061 s - 3.5/ 2400 Hz - 1 ms = 17.3 ms (estimated TStart_C = 1 ms) Sleep = Tsleep/ (Xsleep x 1024 x TClk) = 17.3 ms/ (1 x 1024 x 2.0697 s) = 8.16 8 `01000 bin' 10.00 31 Table 13 Parameter Test Condition Symbol 6.76438 MHz Oscillator (MODE: 1) Min. Typ. Max. Basic clock cycle of the digital circuitry Basic MODE=0 (USA) TClk clock MODE=1 (Europe) cycle Extended BR_Range = TXClk basic BR_Range0 clock BR_Range1 cycle BR_Range2 BR_Range3 Sleep Sleep and XSleep TSleep time are defined in the OPMODE register Startup time BR_Range = BR_Range0 BR_Range1 BR_Range2 BR_Range3 Time for bitcheck Average bitcheck time while polling BR_Range = BR_Range0 BR_Range1 BR_Range2 BR_Range3 Bitcheck time for a valid input signal fSig NBitcheck = 0 NBitcheck = 3 NBitcheck = 6 NBitcheck = 9 4.90625 MHz Oscillator (MODE: 0) Min. Typ. Max. Variable Oscillator Min. Typ. 2.0383 1/fXTO/10 1/fXTO/14 16.6 8.3 4.1 2.1 Sleep x XSleep x 1024 x 2.0697 16.3 8.2 4.1 2.0 Sleep x XSleep x 1024 x 2.0383 8 x TClk 4 x TClk 2 x TClk 1 x TClk Sleep x XSleep x 1024 x TClk 1855 1061 1061 663 1827 1045 1045 653 896.5 512.5 512.5 320.5 x TClk 2.0697 Unit Max. s s ms s Tstartup TBitcheck ms 2.3 1.3 1.2 0.8 2.3 1.3 1.2 0.8 TBitcheck ms 0 3/fSig 6/fSig 9/fSig 0.166 3.5/fSig 6.5/fSig 9.5/fSig 0 3/fSig 6/fSig 9/fSig 0.164 3.5/fSig 6.5/fSig 9.5/fSig 0 3/fSig 6/fSig 9/fSig 8 x TClk 3.5/fSig 6.5/fSig 9.5/fSig D Reset marker D Delete the reset marker To indicate a power-on reset, the receiver displays a reset marker (RM) at Pin DATA. The RM is represented by a fixed frequency fRM (see data sheet U3741BM) with a 50% duty cycle. The first thing to do after power-on or a power-on reset is to delete the RM. To activate the receiver, delete the RM by generating a programming start pulse t1 5632 x TClk. The connected C can distinguish between the RM and a data signal, because fRM is lower than the lowest feasible frequency of a data signal. The programming start pulse t1 must be generated with a non bouncing signal (not with a lab wire!). If the RM is active, the receiver can not receive a transmitter signal. After the C has recognized the RM, the configuration registers must be programmed with the target values. 32 If using a lab wire, the spikes on the serial data line can start a programming sequence and the register configuration is unknown. 10.00 3. Software Components 3.1 Transmitter Application Software U2741B Installation of the transmitter- and receiver application software: 3.1.1 Basic Information D For Win 95 or Win NT installation, insert disk 1 in your floppy drive The transmitter application software U2741B supports the development of RKE systems with the UHF FSK/ASK remote control transmitter U2741B. The software configures the transmitter application board (RF transmitter) via PC. In this way parameters like baudrate, modulation, testword etc. can be changed in a very quick and comfortable way. 3.1.2 Installation and System Requirements D PC 486 or higher D Close all running windows applications. D For Win 3.1x installation, insert disk 3 in your floppy drive D Start setup.exe The setup installs the transmitter application software, the receiver application software and the file PRGINST.TXT (programming instructions) on the hard disk. To check the correct function of the whole RKE Design Kit, read the information given in the programming instructions first. D Serial port Com1 or Com2 D Operating system - Win 3.1x - Win 95 - Win NT Table 14 Possible Problems During Installation Error message: 'Setup couldn't copy ver.dll to C:\Windows' Error message: '*.dll is in use' Error message: One or more Visual Basic applications are running (vbrun300.dll is in use)' 10.00 What to do Remove or rename the existing ver.dll in the windows directory. Press the ignore button. Close all windows applications. 33 3.1.3 Start of the Transmitter Application Software Figure 33. Start window transmitter application software D To ensure proper operation, the following steps should be done before starting the transmitter application software: If one ore more parameters are out of the valid range, this will be reported by the error message: `Transmitter parameter out of range'. 1. Switch on the PC and start the operating system. During loading of the program, the file com_port.cnf will be opened. This file contains the number of the Com-Port (Com1 or Com2) used in the latest session. If the file com_port.cnf does not exist, the default Com-Port is Com2. 2. Remove or insulate the 3-V lithium battery in the transmitter. 3. Assemble the RKE Design Kit as shown in figure 1. 4. Switch on the 5-V power supply of the basic application board. 5. Connect the serial link cable (RS232) to an unused serial port (Com1, Com2). 6. Press the reset button (Key S5). Start the transmitter application software with the command: u2741b.exe Figure 33 shows the start window after a successful start. During loading of the program all parameters used in the latest session, stored in a non volatile memory (EEPROM) on the transmitter application board, will be read. These values will be used as the start values in the corresponding windows. 34 If the selected Com-Port is not available (e.g., used by another program), this will be reported by the Com-Port Error message. In this case, the other Com-Port must be selected. The changing of the Com-Port initiates the reading of the parameters on the transmitter application board (EEPROM) and there update in the corresponding windows. If Com1 and Com2 are not available, select `Exit', make one Com-Port available and start the program again. If there is no transmitter application board connected to the basic application board or any other problem with the data transmission PC <-> basic application board <-> transmitter application board, this will be reported by the error message: - `No hardware detected!' 10.00 3.1.4 Program Description D `Telegram' (Telegram generator) By using the telegram generator, a specific telegram can be generated. The telegram consists of a testword and a precede preburst (figure 35). The encoding of the telegram is Manchester. 14139 Figure 34. Telegram generator Telegram Testword ( A ... 5 Hex ) Preburst 1 / Baudrate Separa- tion 1 1 0 1 0 1 0 A (Hex) Manchester code 0 1 0 1 5 (Hex) t 14140 Figure 35. Telegram example 10.00 35 Preburst The preburst is a number of bits (`1') which precede the testword and will be used by the receiver (U3741BM) and the connected C for wake-up and synchronization. The number of bits the preburst contains can be selected in a range of 8 to 1000 in steps of 8 by using the scrollbar `Preburst'. To indicate the beginning of the testword, the last bit of the preburst is a `0'. The length of the preburst depends on the selected baudrate and will be indicated by `Preburst_Length [s]'. The required length of the preburst is dependent on the polling parameters TSleep, TStartup, TBitcheck of the receiver U3741BM and the start-up time of a connected C. For more information, see data sheet U3741BM. Testword Either a fixed (`F09AF09A') or a user-defined testword can be selected in a range of 4 to 32 bits in steps of 4 bits. The input of the testword must be a hexadecimal value. The special quality of the fixed testword is that every possible value of a 4-bit word is included. This is important for proper detection of every bit * independent of the past one (data filter U3741BM). Baudrate The baudrate refers to the whole telegram (preburst and testword) and can be selected in a range of: EU: 500 to 12500 Baud USA: 497 to 12766 Baud The baudrate range of the receiver application board is limited to 1.0 to 10.0 kBd. Before selecting a baudrate, the operating frequency (433.92 MHz/ 315 MHz) must be selected in the `Frequency' - window. Modulation Select ASK for the transmitter application board 433.92 MHz/ ASK and 315 MHz/ ASK. Select FSK for the transmitter application board 433.92 MHz/ FSK and 315 MHz/ FSK. Write Press the `WRITE' button to send the selected values via the serial port to the transmitter application board. If the transmission was successful, the `WRITE' button will be inactive until a parameter is changed in the `Telegram' window. If there is no board selected, a transmission error occurs (see table 15) or the selected Com-Port is not available, this will be indicated by an error message and the `WRITE' button remains active. In this case, check the hardware or change the Com-Port and press the `WRITE' button again. The function of the `WRITE' button in the windows `Pattern-Patterngen.' and `Button' is equivalent. Help: Press the `HELP' button to get help information. Table 15 Error The selected Com-Port in not available. Problems with the data transmission: PC <--> basic application board <--> transmitter application board. Problems with the data transmission: PC <--> basic application board <--> transmitter application board. Verifying not correct. 36 Error Messages Device unavailable ! No hardware detected ! or Serial Communication Error ! The parameters couldn't be written to the application board ! (not during startup) Transmission error ! 10.00 D `Pattern-Patterngen': (Pattern Generator) By using the pattern generator, a specific pattern (code) can be generated. The pattern consists of a maximum of 256 segments. 14141 Figure 36. Pattern generator Pattern length Tstep Pattern state 0 0 1 1 0 1 0 0 1 0 0 0 1 1 1 t 14142 Figure 37. Example of a pattern 10.00 37 Tstep Filename The time step Tstep is adjustable in a range of: EU: 40.12 s to 1000.64 s USA: 39.168 s to 1005.312 s Name of the loaded pattern file. Before selecting Tstep, the operating frequency (433.92 MHz/ 315 MHz) must be selected in the `Frequency' - window. Pattern_Length Write Function identical with the `WRITE' button in the `Telegram' window (see paragraph `Telegram', section `Write'). Help Press the help button to get help information. The Pattern_Length can be adjusted by using a scrollbar in a range of n x 8 x Tstep (n = 0 to 32). By means of the scrollbar `Time Interval', any interval (segment) of the Pattern can be selected. Note: The RF receiver U3741BM is designed for DC-free codes like Manchester or Bi-phase. To evaluate the pattern with the receiver application software the encoding must be Manchester and a preburst must be generated like in the Telegram generator. State D `Pattern-Save_Load_Pattern' The state of any interval (segment) can be set to `0' or `1'. A generated pattern can be stored or loaded in the `Save_Load_Pattern' window. Modulation The filename must have the extension *.pat. Select ASK for the transmitter application board 433.92 MHz/ ASK and 315 MHz/ ASK. Button Time Interval Select FSK for the transmitter application board 433.92 MHz/ FSK and 315 MHz/ FSK. In the `Button' window (see figure 38) a function can be assigned to each of the 3 buttons existing on the transmitter application board. 14143 Figure 38. Button window 38 10.00 Continuous Telegram After pressing the button, the telegram (preburst + testword) generated by the telegram generator will be sent in a loop. After each telegram, the carrier will be switched off for t = 150 ms. In order to save current, the transmission will be stopped after t = 30 s. The start and the end of the function will be indicated by the LED D1 on the transmitter application board. Preburst Testword Preburst Testword Carrier off Carrier off tmax 14144 Figure 39. Timing continuous telegram Single Telegram After pressing the button, the telegram (preburst + testword) generated by the telegram generator will be sent once. The start of the function will be indicated by the LED D1 on the transmitter application board. Preburst Testword Carrier off 14145 Figure 40. Timing single telegram Continuous Pattern After pressing the button, the pattern generated by the pattern generator will be sent in a loop. After each pattern, the carrier will be switched off for t = 150 ms. In order to save current, the transmission will be stopped after t = 30 s. The start and the end of the function will be indicated by the LED D1 on the transmitter application board. Pattern Pattern Carrier off Carrier off tmax 14146 Figure 41. Timing continuous pattern Single Pattern After pressing the button, the pattern generated by the pattern generator will be sent once. The start of the function will be indicated by the LED D1 on the transmitter application board. Pattern Carrier off 14163 Figure 42. Single pattern 10.00 39 Continuous Preburst After pressing the button, the preburst generated by the telegram generator will be sent. In order to save current, the transmission will be stopped after t = 30 s. The start and the end of the function will be indicated by the LED D1 on the transmitter application board. Preburst Preburst tmax 14147 Figure 43. Timing continuous preburst Continuous Carrier (unmodulated) After pressing this button, the carrier (unmodulated) will be switched on. In order to save current, the carrier will be switched off after t = 30 s. The start and the end of the function will be indicated by the LED D1 on the transmitter application board. Carrier on Carrier on tmax 14148 Figure 44. Timing continuous carrier Write Function identical with the `WRITE' button in the `Telegram' window (see paragraph `Telegram', section `Write'). D `Frequency' The divided clock of the U2741B's crystal oscillator (fCLK) is used for clocking the C. To send the telegram or the pattern with the right baudrate, select the operating frequency fSend of the used transmitter application board Table 16 Quartz Frequency (Q1) fXTO = 13.56 MHz, DIVC = `0' (EU) (fXTO = 6.78 MHz, DIVC = `1' (EU)) * fXTO = 9.84 MHz, DIVC = `0' (US) (fXTO = 4.92 MHz, DIVC = `1' (US)) * fSend 433.9 MHz (433.9 MHz) 315 MHz (315 MHz) fClk 3.39 MHz (3.39 MHz) 2.46 MHz (2.46 MHz) * Note: These boards are not available by Atmel Wireless & Microcontrollers 40 10.00 D `Application' The application window provides information about the ASK/FSK timing and the Pin DIVC. Depending on the selected baudrate, bitcheck limit values `Lim_min' and `Lim_max' for the receiver U3741BM are recommended. 14149 Figure 45. Application window D `Default' To operate with the transmitter in the default configuration, open the `Default' window and press the `WRITE' button. Examine that the operating frequency selected in the `Frequency' window is identical with the used transmitter application board. To operate with the default configuration and an ASK transmitter board, change the modulation to ASK in the telegram- and pattern generator after programming the default values. 14150 Figure 46. Default configuration 10.00 41 D `Com_Port' Selection of the serial port (Com1 or Com2). If the selected Com-Port is not available (e.g., used by another program), this will be reported by the Com-Port error message. In this case, the other Com-Port must be selected. The change of the Com-Port will initiate the reading of the parameters on the transmitter application board and the update of the corresponding windows. If one ore more parameters are out of the valid range, this will be reported by the error message `Transmitter parameter out of range' and all parameters in the 42 `Telegram'-, `Pattern-Patterngen.'- , `Button'- and `Frequency'-window will be deleted. In this case reprogramming of the whole transmitter is necessary (frequency, telegram generator, pattern generator and the button functions). If Com1 and Com2 are not available, press Exit, make one Com-Port available and start the program again. 3.1.5 Exit of the Transmitter Application Software Select `Exit' to close the program. 10.00 3.2 Receiver Application Software U3741BM 3.2.1 Basic Information Installation of the receiver- and transmitter software: The receiver application software U3741BM supports the development of RKE systems with the UHF FSK/ASK remote control receiver U3741BM. The software configures the receiver application board (U3741BM) via the PC. In this way parameters like baudrate, modulation, testword etc. can be changed in a very quick and comfortable way. In addition, some tools to evaluate the data transmission are provided. D Close all running windows applications. 3.2.2 Installation and System Requirements D For Win 95 or Win NT installation, insert disk 1 in your floppy drive D For Win 3.1x installation, insert disk 3 in your floppy drive D Start setup.exe D Serial port Com1 or Com2 The setup installs the receiver application software, the transmitter application software and the file PRGINST.TXT (programming instructions) on the hard disk. D Operating system - Win 3.1 - Win 95 - Win NT To check the proper operation of the whole RKE Design Kit, read the information given in the programming instructions first. D PC 486 or higher Table 17 Possible Problems During Installation Error message: `Setup couldn't copy ver.dll to C:\windows' Error message: ` *.dll is in use' Error message: `One ore more Visual Basic applications are running (vbrun300.dll is in use)' 10.00 What to Do Remove or rename the existing ver.dll in the windows directory. Press the ignore button. Close all windows applications. 43 3.2.3 Start of the Receiver Application Software Figure 47. Start window receiver application software D To ensure proper operation, the following steps have to be carried out before starting the receiver application software. 1. Switch on the PC and start the operating system. 2. Assemble the RKE Design Kit as shown in figure 1. 3. Switch on the 5-V power supply of the basic application board. 4. Connect the serial link cable (RS232) to an unused serial port (Com1,Com2). 5. Press the reset button (Key S5). Start the receiver application software with the command: u3741bm.exe The receiver application board only works in conjunction with the basic application board! The C on the basic application board controls the data transfer with the PC, the transmitter application board and the programming of the receiver U3741BM. The C also evaluates the received data stream and indicates the results on the basic application board. If the `Telegram- Testword', `Evaluation-Histogram' or `Evaluation- 44 Timing_List' window is active, the results can also be transmitted to the PC. Figure 47 shows the start window after a successful start. During loading of the program, all parameters used in the latest session, stored in a non volatile memory (EEPROM) on the basic application board, will be read. These values will be used as the start values in the corresponding windows and in the status line at the bottom of each window. During loading of the program, the file com_port.cnf will be opened. This file contains the number of the Com-Port (Com1 or Com2) used in the latest session. If the file com_port.cnf does not exist, the default Com-Port is Com2. If the selected Com-Port is not available (e.g. used by another program), this will be reported by the Com-Port error message. In this case, the other Com-Port must be selected. The changing of the Com-Port initiates the reading of the parameters on the basic application board (EEPROM) and their updated in the corresponding windows and the status line. 10.00 If Com1 and Com2 are not available, select `Exit', make one Com-Port available and start the program again. XLim is used to define the bitcheck limits TLim_min and TLim_max. If there is no receiver application board connected on the basic application board or any other problem with the data transmission PC <-> basic application board <-> receiver application board, this will be reported by the error message: - `No hardware detected !' The changing of the BR_range also changes the C_Limits. Number of bits to be checked Status Line TSleep The actually valid parameters are indicated in the status line. Sleep time Normal : *8: *8 temp: 3.2.4 Program Description NBitcheck sleep time extended sleep time temporary extended sleep time D `Register-OPMODE' POUT Programming of the receiver operation mode register. Multi-purpose output port. This port can be used to control the receiver's sensitivity. BR_range Baudrate range sets the appropriate baud rate range. At the same time it defines XLim (see data sheet U3741BM). Low: High: normal sensitivity reduced sensitivity (R2 = 56 kW, see data sheet U3741BM) 14152 Figure 48. OPMODE register 10.00 45 Table 18. Error The selected Com-Port in not available. Problems with the data transmission: PC <--> basic application board <--> transmitter application board. Problems with the data transmission: PC <--> basic application board <--> transmitter application board. Verifying not correct. Error Messages Device unavailable ! No hardware detected ! or Serial Communication Error ! The parameters couldn't be written to the application board ! (not during startup) Transmission error ! Write Press the `WRITE' button to send the selected values via the serial port to the receiver application board. If the transmission was successful, the `WRITE' button will be inactive until a parameter is changed in the `Register- OPMODE' window. If there is no board selected, a transmission error occurs or the selected Com-Port is not available, this will be indicated by an error message and the `WRITE' button remains active. In this case, check the hardware or change the Com-Port and press the `WRITE' button again. The function of the `WRITE' button in the windows `Register-Limit', `Telegram-Testword' and `Evaluation-C_Limits' is equivalent. D `Register-LIMIT' Programming of the upper and lower bitcheck limits for time frame check. Lim_min Lower bitcheck limit Lim_max Upper bitcheck limit Write Function identical with the `WRITE' button in the `Register-OPMODE' window 14153 Figure 49. LIMIT register 46 10.00 D `Telegram-Testword' 14154 Figure 50. Testword window A fixed (`F09AF09A') or a user-defined testword can be selected in a range of 4 to 32 bits in steps of 4 bits. The input of the testword must be a hexadecimal value. The reception of the testword will be indicated by `Testword ok.' and `C_Limits ok.'. In addition, 2 LEDs on the basic application board (H1, H2) indicate the receipt of the valid testword. The encoding of the testword must be Manchester. The special quality of the fixed testword is that every possible value of a 4-bit word is included. This is important for a proper detection of every bit * independent of the past one. Write Function identical with the `WRITE' button in the `Register-OPMODE' window. Status Testword ok / C_Limits `Evaluation-C_Limits') 10.00 ok: (see chapter The C on the basic application board compares the received data stream with the selected testword. 2 LEDs on the basic application board (H1, H2) indicate the result. If manual or automatic update is active, the result will also be transmitted to the PC. Manual Update If `MANUAL UPDATE' is selected, the status of the next testword will be indicated. If there is no transmitter signal, this will be indicated by the error message `No signal received'. Automatic Update If `AUTOMATIC UPDATE' is selected, the status will be updated after the reception of the next testword. This mode is active until the button `MANUAL UPDATE' is selected or the testword will be changed. If there is no transmitter signal, this will be indicated by the error message `No signal received'. 47 D `Evaluation-Histogram' 14155 Figure 51. Histogram window To evaluate the timing of a received data stream , the timing margins can be displayed in the `Evaluation-Histogram' window. This tool is helpful to define the time C_Limits used by the connected C to evaluate the proper timing of the data stream. The timing of the data stream (n samples) will be transmitted to the PC. For the testword A5 Hex , shown in figure 52, 10 samples will be transmitted. A sample is the distance between 2 signal edges. The maximum length of a displayed data stream is 64 samples. 0 1 0 0 A (Hex) 1 Sample 10 Sample 9 Sample 8 Sample 7 Sample 6 Sample 5 Sample 4 Sample 3 Sample 2 Sample 1 Testword ( A5 Hex ) 0 Mode Select - `Mode1': The number of the target samples refers to the selected testword in the `Telegram-Testword' window. e.g. Testword: A5 Hex ---> Target Samples: 10 - `Mode2': Select the max. number of the target samples in a range of 1 to 64. Samples - `Target': Target number of the samples to be displayed. - Displayed: Number of the actually displayed samples. The upper timing limit Tsample_max (see table 19) of a sample depends on the selected baudrate range (BR_range). 1 5 (Hex) Manchester code t 14156 Figure 52. Example of a testword 48 10.00 Table 19. BR_range [kBd] 1.0 to 1.8 1.8 to 3.2 3.2 to 5.6 5.6 to 10.0 Tsample_max [s] 2032 1016 508 254 If a sample increases the upper timing limit Tsample_max, the following samples are invalid and will not be displayed. Select_Edge The histogram will be generated with the following timings: _| _| rising edge to rising edge |_ |_ falling edge to falling edge _| |_ rising edge to falling edge |_ _| falling edge to rising edge | | edge to edge Duty Cycle Resulting duty cycle of the data stream. The calculation of the duty cycle is described in the chapter `3.2.6 Accuracy and Resolution of the Telegram Evaluation'. Manual Update If `MANUAL UPDATE' is selected, the histogram of the next data stream will be generated. If there is no transmitter signal, this will be indicated by the error message `No signal received'. This mode is active until the button `MANUAL UPDATE' is pressed. If there is no transmitter signal, this is indicated by the error message `No signal received'. Note: The last values of the histogram will be displayed in the `Evaluation-Timing_List' window. D `Evaluation-Timing_List' To evaluate the timing of a received data stream , the timing margins can be displayed in the `Evaluation-Timing_List' window. This tool is helpful to define the time window C_Limits, used by the connected C, to evaluate the proper timing of the data stream. The timing of the data stream (n samples) will be transmitted to the PC. A sample is the distance between 2 signal edges. The maximum length of a displayed data stream is 64 samples. For every sample, the sample time TN, the polarity and a remark if the sample is inside of the C_Limits are displayed. The polarity of the first sample must be `H'. This is guaranteed if the preburst of the telegram is a row of `1' and one `0' to detect the beginning of the testword (see figure 55).If the preburst consists a row of `0' and one `1' to detect the beginning of the testword, the displayed polarity in the timing_List is inverted. If a sample increases the upper timing limit Tsample_max (see table 17), it will not be displayed. In this case, the displayed time TN and the polarity of the next sample are invalid. Automatic Update For all following samples, the displayed time TN is valid but the displayed polarity is invalid. If `AUTOMATIC UPDATE' is selected, the histogram will be updated after the reception of the next data stream. If there is no transmitter signal, this will be indicated by the error message `No signal received'. 10.00 49 14157 Figure 53. Timing list D `Evaluation-C_Limits' Select the timing limits, used by the connected C, to evaluate the proper timing of the data stream. 14158 Figure 54. C_Limits 50 10.00 1 1 Preburst 1 0 1 Testword ( F hex ) 1 1 1 0 Testword ( 7 hex ) 1 1 1 with the pattern generator in the transmitter application software. Write 1 1 1 0 Start of measurement End of measurement Function identical with the `WRITE' button in the `Register-OPMODE' window. D `Application' 14159 Figure 55. Example of a telegram Note: The measurement (sampling) of the testword begins after the falling edge of the bit `0'. The trigger condition is the distance between the rising edge of the last `1' in the preburst and the falling edge of the `0' at the end of the preburst (tee). The trigger condition is valid if tee > lower limit of 1/BR.This time is defined in the C_Limits window. If the preburst is inverted (`000 to 001'), the trigger condition is the distance between the falling edge of the last `0' in the preburst and the rising edge of the `1' at the end of the preburst (tee). In this case, the evaluation of the testword fails because the software measures the distance between the following 63 edges (64 samples) but does not check the logic level. This fact must be considered if a telegram is generated `POR' Press the `POR' button to generate a power-on reset on the receiver application board (see LED H4 basic application board). The register OPMODE and LIMIT will be set to the default values. The U3741BM displays the reset marker at Pin DATA ( 120 Hz). `Delete Reset Marker' Delete the reset marker via a `L' pulse (t1 11.7 ms) at Pin DATA. `Sleep (Stop Command)' Set the U3741BM back to the sleep mode via a `L' pulse (t1 3.2 ms) at Pin DATA. `Enable' The level on Pin ENABLE can be switched between `VCC' and `controlled'. If enable is connected to VCC, no evaluation of the received data stream in the `Telegram-Testword', `Evaluation-Histogram' and `Evaluation- Timing_List' window is possible. 14160 Figure 56. Application 10.00 51 D `Default' To operate with the receiver in the default configuration, open the `Default' window and press the `WRITE' button. 14161 Figure 57. Default configuration D `Com_Port' Selection of the serial port (Com1 or Com2 ). If the selected Com-Port is not available (e.g., used by another program), this will be reported by the Com-Port error message. In this case, the other Com-Port must be selected. The change of the Com-Port will initiate the reading of 52 the parameters on the transmitter application board and the update of the corresponding windows. If Com1 and Com2 are not available, select `Exit', make one Com-Port available and start the program again. 3.2.5 Exit of the Receiver Application Software Select `Exit' to close the program. 10.00 3.2.6 Accuracy and Resolution of the Telegram Evaluation Telegram and its Timing List The evaluation of a telegram will be done by a C on the basic application board. The results of the evaluation can be displayed in the receiver application software (Testword OK, Limits_OK, Histogram, Duty Cycle, Timing_List). 1 1 1 1 Preburst 1 1 The following gives some information about the accuracy and the resolution of the telegram evaluation. 0 1 Testword ( F hex ) 1 1 1 0 0 Testword ( 7 hex ) 1 1 1 Start of measurement D Resolution End of measurement 14159 The resolution depends on the selected baudrate. Figure 58. Example of a telegram Table 20 BR_range [kBd] 1.0 to 1.8 1.8 to 3.2 3.2 to 5.6 5.6 to 10.0 Figure 58 shows a possible timing of a short telegram. The possible difference between the frame of the Manchester-encoded part and the frame processed by the measuring C can be seen. Resolution (rs) [s] 8 4 2 1 Thus, the calculated value of the duty cycle as well as the sample numbering may be affected. D Accuracy According to the resulting resolution the worst case (accuracy) of a measured single time T is: Measured Time Tmeas = T 1 rs - 0.5 s Baudrate Margins Recommended baudrate margins: 1.0 kBd to 10.0 kBd. Use the appropriate BR_range settings in the `Telegram'- window' (transmitter application software). D Duty Cycle The calculation method of the duty cycle displayed in `Evaluation-Histogram' is shown by the equation below. In case of n >>1, the statistical average of the accuracy is in the range of 0.2% (see paragraph `Telegram and its Timing List' on this page) nH T Duty cycle DC + nH (T H i meas i=1 nH T i=1 + nL H i meas ) T L i meas i=1 Hi " 1rs-0.5ms) i=1 nH (T i=1 nL Hi " 1rs-0.5ms) ) (T Li " 1rs-0.5ms) i=1 nH/L = number of High/Low samples 10.00 53