10.00 1
Application Note
RKE Design Kit (U2741B, U3741BM)
Table of Contents
1. Introduction 2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2. Hardware Components 2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1 Basic Application Board 3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2 Transmitter Application Board 4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.1 General Description 5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.2 Application Hints U2741B/U2745BM 12. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.3 Receiver Application Board 16. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.3.1 General Description 16. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.3.2 Application Hints U3741BM/U3742BM/U3745BM 25. . . . . . . . . . . . . . . . . . . . . . .
3. Software Components 33. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1 Transmitter Application Software U2741B 33. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1.1 Basic Information 33. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1.2 Installation and System Requirements 33. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1.3 Start of the Transmitter Application Software 34. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1.4 Program Description 35. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1.5 Exit of the Transmitter Application Software 42. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2 Receiver Application Software U3741BM 43. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.1 Basic Information 43. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.2 Installation and System Requirements 43. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.3 Start of the Receiver Application Software 44. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.4 Program Description 45. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.5 Exit of the Receiver Application Software 52. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.6 Accuracy and Resolution of the Telegram Evaluation 53. . . . . . . . . . . . . . . . . . . . . . . . . .
10.002
1. Introduction
The RKE Design Kit supports the development of RKE
systems with Atmel Wireless & Microcontrollers’ UHF
FSK/ASK remote control transmitter U2741B and the
UHF FSK/ASK remote control receiver U3741BM.
The RKE Design Kit contains a basic application board,
an RF receiver (receiver application board) and an RF
transmitter (transmitter application board).
The configuration of the RF receiver and transmitter is
programmable via the PC with the receiver application
software and the transmitter application software. With
these programs, parameters like baudrate, modulation,
testword etc. can be changed in a very quick and
comfortable way. In addition, the receiver application
software provides some tools to evaluate the data
transmission (histogram, timing list). The data communi-
cation between the PC and the application boards occurs
via the serial port (RS232).
To configure the RF transmitter or receiver, the appropri-
ate board must be connected to the basic application
board RS232.
Note:
This application note is dedicated to the Ux741B(M)
chipset, however, the entire description is also valid for
the consumer version Ux745B(M). The following shows
the relevant restricted features: Tx/Rx: no FSK option
usable, Rx: no sensitivity reduction.
2. Hardware Components
Transmitter application board
Adapter–PCB
Receiver application board
Basic application board
RS232
–V
+V
–V
+V
R7 V3 TEMIC
RKE-Design Kit
Basic application board
V1A 10/98
5 V
Figure 1. RKE Design Kit
Note the correct position of the application boards !
List of Components
D1 basic application board
D1 receiver application board (RF receiver)
D1 adapter – PCB
D1 transmitter application board (RF transmitter)
D1 AT-XT/PS2 link cable (RS232)
D1 CR 2025 (lithium battery)
D1 multiflex antenna 400 MHz to 470 MHz
D1 SMB cable assembly (female contact)
DAdapter: 1 SMB (male) to BNC (female)
1 SMB (female) to BNC (male)
D1 modem adapter DB9 F – DB25 M
D3 disks 3.5”
10.00 3
2.1 Basic Application Board
To configure the RF transmitter or receiver, the appropri-
ate board must be connected to the basic application
board (see figure 1). To prevent damaging, the applica-
tion boards must be in the correct position! Via a serial
port (RS232) the basic application board must be
connected to the PC. The configuration will be done by
the transmitter- resp. receiver application software.
During configuration, the microcontroller M48C892 on
the basic application board handles the data communi-
cation with the PC, the receiver application board and the
transmitter application board.
When configured, the transmitter application board oper-
ates stand-alone and can be removed.
Basic Function
The receiver application board operates only in
conjunction with the basic application board.
After power on, the microcontroller M48C892 on the ba-
sic application board configures the RF receiver and
enables it by setting Pin ENABLE to ‘1’ (see figure 2).
Then the receiver is in the polling mode and verifies the
presence of a valid transmitter signal. The parameters for
the bitcheck (BR_Range, Nbitcheck, Tsleep, Lim_min,
Lim_max) are programmable with the receiver applica-
tion software. If a valid transmitter signal is detected, the
receiver remains active and transfers the data stream to
the connected microcontroller M48C892 on the basic ap-
plication board.
The microcontroller measures continuously the distance
between 2 signal edges ( = 1 sample). If the distance
t > = 1/Baudrate, the following 64 samples will be stored
in the RAM of the microcontroller (start of measurement
/ end of measurement, figure 2). Then the RF receiver
will be disabled by setting Pin ENABLE to ‘0’. The
timing limits of 1/Baudrate is programmable in the
receiver application software (see ‘Evaluation
-µC_Limits’, chapter 3.2.4).
The 64 samples will be examined to distinguish between
a valid signal from a corresponding transmitter and
signals due to noise. This is done by a time frame check
where the samples are continuously compared to a
programmable time window (µC_Limits).
If the samples are within the time window, this will be in-
dicated by the LED H1.
If the received data stream is equal to a programmable
testword (Testword), this will be indicated by the
LED H2. After the evaluation of the received data stream,
the RF receiver will be enabled by setting Pin ENABLE
to ‘1’.
The timing information (64 samples) also can be eva-
luated with the functions ‘Testword’, ‘Histogram’ and
‘Timing_List’ in the receiver application software.
M48C892 U3741B
M
DATA
ENABLE
I/O
Out
Receiver application board
Basic application board
DATA
ENABLE
U2741B
Transmitter application board
Antenna Antenna
Transmitter Signal
Valid Transmitter Signal
Start of measurement
64 Samples
164
t >= 1/BR
(BR:Baudrate, Manchester code)
LED H1 LED H2 LED H4
Preburst Testword
End of measurement
14115
Figure 2. Principle function
10.004
Technical Features
DPower supply: VCC = +5 V
D2 connectors (BU1/BU3, BU2/BU4) to connect the
transmitter - and the receiver application board.
DKey S5 generates a reset for the microcontroller on the
basic application board. If the transmitter application
board is connected to the basic application board, the
reset will also be generated for this board.
DLED H4 indicates the voltage on BU1/5V and
BU2/5V (power supply for the transmitter- and the re-
ceiver application board).
Voltage on ––> LED H4 off
Voltage off ––> LED H4 on
DLED H2 indicates the receipt of a valid testword (see
‘Telegram Testword’, chapter 3.2.4).
DLED H1 indicates whether the timing of the received
data stream is within the programmable µC_Limits
(see ‘Telegram Testword’, chapter 3.2.4).
DJumper setting on the basic application board
(see figure 3)
TP8 TP7 TP6
14117
TP4 TP3 TP5
Figure 3. Jumper setting
2.2 Transmitter Application Board
Front Back
14110
Figure 4. Transmitter application board
U2: U2741B, U1: M48C892/ M44C892, S1: Button 1, S2: Button 2, S3: Button 3
10.00 5
2.2.1 General Description
Table 1 List of available transmitter application boards
Transmitter Application Board [fsend /
Modulation] C3 [pF] C4 [pF] C8 [pF] C9 [pF] C11 [pF] Q1 [MHz]
433.92 MHz/ ASK not mounted 8.2 8.2 5.6 5.6 13.56
433.92 MHz/ FSK 6.8 3.9 8.2 5.6 5.6 13.56
315 MHz/ ASK not mounted 12 18 10 12 9.8438
315 MHz/ FSK 15 2.7 18 10 12 9.8438
Basic Function
The transmitter application board is a programmable,
stand-alone-operating RF transmitter containing the UHF
FSK/ASK remote control transmitter U2741B and the
microcontroller M48C892/ M44C892. The power supply
of the board is provided by a 3-V lithium battery. The op-
erating frequency, fsend, of the transmitter depends on the
frequency of the quartz Q1 (see table 1).
Technical Features
DPower supply: 3-V lithium battery
DThe function of the buttons S1, S2 and S3 is program-
mable with the transmitter application software (see
‘Button’, chapter 3.1.4).
DThe function will be started by pressing button S1, S2
or S3 and will be indicated by the LED (D1). The end
of all continuous functions also will be indicated by
the LED (D1).
DOperating frequency fSend: 433.92 MHz
315 MHz
DEffective radiated power ERP:
–21 dBm (433.92 MHz)
≈ –20 dBm (315 MHz)
Programming of the RF Transmitter
Starting of the RKE Design Kit
1. Switch on the PC and start the operating system.
2. Remove or insulate the 3-V lithium battery in the
transmitter.
3. Assemble the RKE Design Kit as shown in figure 1.
4. Switch on the 5-V power supply of the basic applica-
tion board.
5. Connect the serial link cable (RS232) to an unused
serial port (Com1, Com2).
6. Press the reset button (Key S5).
7. Start the transmitter application software
(U2741B.EXE).
8. Program the transmitter and the receiver with the
target values.
9. Switch off the 5-V power supply of the basic applica-
tion board and remove the transmitter from the
adapter PCB.
10. Insert the 3-V lithium battery in the transmitter.
11. To activate the transmitter, press button S1 or S2.
Reprogramming of the Transmitter
DSwitch off the 5-V power supply of the basic applica-
tion board.
DRemove or insulate the 3–V lithium battery from the
transmitter.
DConnect the transmitter to the adapter PCB.
DSwitch on the 5-V power supply of the basic applica-
tion board.
DPress the reset button (Key S5).
DProgram the transmitter with the target values.
DSwitch off the 5-V power supply of the basic applica-
tion board and remove the transmitter from the
adapter PCB.
DInsert the 3-V lithium battery in the transmitter.
DPress button S1 or S2 to activate the transmitter.
10.006
Transmitter Application Board Version 4 (433.92 MHz/ ASK)
BR5
not mounted
1 2
JP1
HEADER 2
C13 not mounted
X2
–VBatt
X1
+VBatt
VCC COIL_1
1COIL_2
2
VBAT
3VDD
4
BP40/SC/INT3
5
BP53/INT1
6BP52/INT1
7BP51/INT6
8BP50/INT6
9
OSC_1
10 OSC_2
11
BP60/T3O
12
BP10
13
NRSTF
14 NRSTC 15
BP13 16
BP63/T3I/INT5 17
BP20/NTE 18
BP21 19
BP22 20
BP23 21
BP41/T2I/VMI 22
BP42/T2O 23
BP43/SD/INT3 24
VSS 25
FC 26
MOD 27
NGAP 28
U1
M48C892 / M44C892
P
i
n
1
P
i
n
2
Pin3 Pin26
Pin27
Pin28
C16
not mounted LP1
R11
1k
D1
TLMD3100
VCC
BR7
0
BR6
not mounted
BR0
not mounted
C15
10nPin17
Pin18
Pin22
Pin23
Pin24
Pin25
C12
100nF
Pin4
Pin5
Pin6
Pin10
Pin11
C14
1u
R7
100k
R8
100k
Pin9
VCC
VCC
R9
100k
VCC
P
i
n
1
2
BR4
0
AM
1
FM
2
VCC
3
CLK
4
GND
5
LFVCC
6
LFGND
7
LF
8XTO2 9
XTO1 10
PGND2 11
PGND1 12
ANT 13
PVCC 14
PSET 15
DIVC 16
U2
U2741B
BR1
0
BR3
0
R12
1,2k
2% C5
1nF
10%
C9
5.6p
2% np0
1
2 3
4
Q1
13,56MHz
C4
8,2p
2% np0
C8
8.2p
2% np0
R4
220
5%
C1
15n
5%
C2
3,9n
5%
C6
1n
10%
C7
22n
10%
R6
47k
R10
130k
LP2
Testpoint
VCC
R5
47k
1 2 3 4 5 6 7 8
JP2
PrgAdap
COIL_1
1COIL_2
2VBATT
3VDD
4BP40
5BP53
6BP50
7
OSC_1
8OSC_2
9BP60
10 BP63 11
BP20 12
BP23 13
BP41 14
BP42 15
BP43 16
VSS 17
FC 18
MOD 19
NGAP 20
U3
U9280
not mounted
Pin1
Pin2
Pin3
Pin4
Pin5
Pin6
Pin9 Pin22
Pin23
Pin24
Pin25
Pin26
Pin27
Pin28
C3
not mounted
C11
5.6p
2% np0
Pin17
Pin18
Pin21Pin10
Pin11
Pin12
1
3
2
4
S3
Switch3
1
3
2
4
S1
Switch1
1
3
2
4
S2
Switch2
Testpoint
L1 printed on PCB
(4 turns, size 5*5mm,
measured equivalent circuit
130nH // 4k // 0,62pF )
RF – T ransmittercircuit
14111
Figure 5. Schematic transmitter application board: 433.92 MHz / ASK
10.00 7
Transmitter Application Board Version 4 (433.92 MHz/ FSK)
BR5
not mounted
1 2
JP1
HEADER 2
C13 not mounted
X2
–VBatt
X1
+VBatt
VCC COIL_1
1COIL_2
2
VBAT
3VDD
4
BP40/SC/INT3
5
BP53/INT1
6
BP52/INT1
7BP51/INT6
8
BP50/INT6
9
OSC_1
10
OSC_2
11
BP60/T3O
12
BP10
13
NRSTF
14 NRSTC 15
BP13 16
BP63/T3I/INT5 17
BP20/NTE 18
BP21 19
BP22 20
BP23 21
BP41/T2I/VMI 22
BP42/T2O 23
BP43/SD/INT3 24
VSS 25
FC 26
MOD 27
NGAP 28
U1
M48C892 / M44C892
P
i
n
1
P
i
n
2
Pin3 Pin26
Pin27
Pin28
C16
not mounted LP1
R11
1k
D1
TLMD3100
VCC
BR7
0
BR6
not mounted
BR0
not mounted
C15
10n
Pin17
Pin18
Pin22
Pin23
Pin24
Pin25
C12
100nF
Pin4
Pin5
Pin6
Pin10
Pin11
C14
1u
R7
100k
R8
100k
Pin9
VCC
VCC
R9
100k
VCC
P
i
n
1
2
BR4
0
AM
1
FM
2
VCC
3
CLK
4
GND
5
LFVCC
6
LFGND
7
LF
8XTO2 9
XTO1 10
PGND2 11
PGND1 12
ANT 13
PVCC 14
PSET 15
DIVC 16
U2
U2741B
BR1
0
BR3
0
R12
1,2k
2% C5
1nF
10%
C9
5.6p
2% np0
1
2 3
4
Q1
13,56MHz
C4
3.9p
2% np0
C8
8.2p
2% np0
R4
220
5%
C1
15n
5%
C2
3,9n
5%
C6
1n
10%
C7
22n
10%
R6
47k
R10
130k
LP2
Testpoint
VCC
R5
47k
1 2 3 4 5 6 7 8
JP2
PrgAdap
COIL_1
1
COIL_2
2VBATT
3VDD
4BP40
5BP53
6BP50
7
OSC_1
8OSC_2
9
BP60
10 BP63 11
BP20 12
BP23 13
BP41 14
BP42 15
BP43 16
VSS 17
FC 18
MOD 19
NGAP 20
U3
U9280
not mounted
Pin1
Pin2
Pin3
Pin4
Pin5
Pin6
Pin9 Pin22
Pin23
Pin24
Pin25
Pin26
Pin27
Pin28
C3
6.8p
2% np0
C11
5.6p
2% np0
Pin17
Pin18
Pin21Pin10
Pin11
Pin12
1
3
2
4
S3
Switch3
1
3
2
4
S1
Switch1
1
3
2
4
S2
Switch2
Testpoint
L1 printed on PCB
(4 turns, size 5*5mm,
measured equivalent circuit
130nH // 4k // 0,62pF )
RF – T ransmittercircuit
14112
Figure 6. Schematic transmitter application board: 433.92 MHz / FSK
10.008
Transmitter Application Board Version 4 (315 MHz/ ASK)
BR5
not mounted
1 2
JP1
HEADER 2
C13 not mounted
X2
–VBatt
X1
+VBatt
VCC COIL_1
1COIL_2
2
VBAT
3
VDD
4
BP40/SC/INT3
5
BP53/INT1
6BP52/INT1
7
BP51/INT6
8
BP50/INT6
9
OSC_1
10
OSC_2
11
BP60/T3O
12
BP10
13
NRSTF
14 NRSTC 15
BP13 16
BP63/T3I/INT5 17
BP20/NTE 18
BP21 19
BP22 20
BP23 21
BP41/T2I/VMI 22
BP42/T2O 23
BP43/SD/INT3 24
VSS 25
FC 26
MOD 27
NGAP 28
U1
M48C892 / M44C892
P
i
n
1
P
i
n
2
Pin3 Pin26
Pin27
Pin28
C16
not mounted LP1
R11
1k
D1
TLMD3100
VCC
BR7
0
BR6
not mounted
BR0
not mounted
C15
10n
Pin17
Pin18
Pin22
Pin23
Pin24
Pin25
C12
100nF
Pin4
Pin5
Pin6
Pin10
Pin11
C14
1u
R7
100k
R8
100k
Pin9
VCC
VCC
R9
100k
VCC
P
i
n
1
2
BR4
0
AM
1
FM
2
VCC
3
CLK
4
GND
5
LFVCC
6
LFGND
7
LF
8XTO2 9
XTO1 10
PGND2 11
PGND1 12
ANT 13
PVCC 14
PSET 15
DIVC 16
U2
U2741B
BR1
0
BR3
0
R12
1,2k
2% C5
C9
10p
2% np0
1
2 3
4
Q1
9,8438MHz
C4
12p
2% np0
C8
18p
2% np0
R4
220
5%
C1
15n
5%
C2
3,9n
5%
C6
1n
10%
C7
22n
10%
R6
47k
R10
130k
LP2
Testpoint
VCC
R5
47k
1 2 3 4 5 6 7 8
JP2
PrgAdap
COIL_1
1
COIL_2
2VBATT
3VDD
4BP40
5
BP53
6
BP50
7OSC_1
8OSC_2
9
BP60
10 BP63 11
BP20 12
BP23 13
BP41 14
BP42 15
BP43 16
VSS 17
FC 18
MOD 19
NGAP 20
U3
U9280
not mounted
Pin1
Pin2
Pin3
Pin4
Pin5
Pin6
Pin9 Pin22
Pin23
Pin24
Pin25
Pin26
Pin27
Pin28
C3
not mounted
C11
12p
2% np0
Pin17
Pin18
Pin21Pin10
Pin11
Pin12
1
3
2
4
S3
Switch3
1
3
2
4
S1
Switch1
1
3
2
4
S2
Switch2
Testpoint
L1 printed on PCB
(4 turns, size 5*5mm,
measured equivalent circuit
130nH // 4k // 0,62pF )
RF – T ransmittercircuit
1nF
Figure 7. Schematic transmitter application board: 315 MHz / ASK
10.00 9
Transmitter Application Board Version 4 (315 MHz/ FSK)
BR5
not mounted
1 2
JP1
HEADER 2
C13 not mounted
X2
–VBatt
X1
+VBatt
VCC COIL_1
1
COIL_2
2
VBAT
3
VDD
4
BP40/SC/INT3
5
BP53/INT1
6BP52/INT1
7BP51/INT6
8
BP50/INT6
9
OSC_1
10 OSC_2
11
BP60/T3O
12
BP10
13
NRSTF
14 NRSTC 15
BP13 16
BP63/T3I/INT5 17
BP20/NTE 18
BP21 19
BP22 20
BP23 21
BP41/T2I/VMI 22
BP42/T2O 23
BP43/SD/INT3 24
VSS 25
FC 26
MOD 27
NGAP 28
U1
M48C892 / M44C892
P
i
n
1
P
i
n
2
Pin3 Pin26
Pin27
Pin28
C16
not mounted LP1
R11
1k
D1
TLMD3100
VCC
BR7
0
BR6
not mounted
BR0
not mounted
C15
10n
Pin17
Pin18
Pin22
Pin23
Pin24
Pin25
C12
100nF
Pin4
Pin5
Pin6
Pin10
Pin11
C14
1u
R7
100k
R8
100k
Pin9
VCC
VCC
R9
100k
VCC
P
i
n
1
2
BR4
0
AM
1
FM
2
VCC
3
CLK
4
GND
5
LFVCC
6
LFGND
7
LF
8XTO2 9
XTO1 10
PGND2 11
PGND1 12
ANT 13
PVCC 14
PSET 15
DIVC 16
U2
U2741B
BR1
0
BR3
0
R12
1,2k
2% C5
1nF
C9
10p
2% np0
1
2 3
4
Q1
9,8438MHz
C4
2,7p
2% np0
C8
18p
2% np0
R4
220
5%
C1
15n
5%
C2
3,9n
5%
C6
1n
10%
C7
22n
10%
R6
47k
R10
130k
LP2
Testpoint
VCC
R5
47k
1 2 3 4 5 6 7 8
JP2
PrgAdap
COIL_1
1
COIL_2
2VBATT
3
VDD
4
BP40
5
BP53
6BP50
7
OSC_1
8OSC_2
9
BP60
10 BP63 11
BP20 12
BP23 13
BP41 14
BP42 15
BP43 16
VSS 17
FC 18
MOD 19
NGAP 20
U3
U9280
not mounted
Pin1
Pin2
Pin3
Pin4
Pin5
Pin6
Pin9 Pin22
Pin23
Pin24
Pin25
Pin26
Pin27
Pin28
C3
15p
2% np0
C11
12p
2% np0
Pin17
Pin18
Pin21Pin10
Pin11
Pin12
1
3
2
4
S3
Switch3
1
3
2
4
S1
Switch1
1
3
2
4
S2
Switch2
Testpoint
L1 printed on PCB
(4 turns, size 5*5mm,
measured equivalent circuit
130nH // 4k // 0,62pF )
RF – T ransmittercircuit
Figure 8. Schematic transmitter application board: 315 MHz / FSK
10.0010
14116
315 MHz / 433.92 MHz
ASK / FSK
Figure 9. Layer 1 transmitter application board
Scale 1.7:1 Figure 10. Layer 2 transmitter application board
Scale 1.7:1
10.00 11
Table 2 Bill of Materials
Components Pcs 315
MHz/
ASK
315
MHz/
FSK
433.92
MHz/
ASK
433.92
MHz/
FSK
Value Tolerance Material Housing Manufacturer/
Distributor
D1 1 X X X X TLMD3100 TOPLED Vishay
TELEFUNKEN
U1 1 X X X X M48C892/
M44C892 SSO28 Atmel W ireless
&
U2 1 X X X X U2741B–MFP SSO16 Microcontrollers
U3 U9280B SSO20
C1 1 X X X X 15nF/63nF 5% X7R Ceramic Size 0603
C2 1 X X X X 3.9nF/63V 5% X7R Ceramic Size 0603
C3 1 X X15pF/63V,
6.8pF/63V 2% NP0 Ceramic Size 0603 Murata
C4 1 X XXX
12pF/63V,
2.7pF/63V,
8.2pF/63V,
3.9pF/63V
2% NP0 Ceramic Size 0603 Murata
C5 1 X X X X 1nF/63V 10% X7R Ceramic Size 0603
C6 1 X X X X 1nF/63V 10% X7R Ceramic Size 0603
C7 1 X X X X 22nF/63V 10% X7R Ceramic Size 0603
C8 1 X X X X 18pF/63V,
8.2pF/63V 2% NP0 Ceramic Size 0603 Murata
C9 1 X X X X 10pF/63V,
5.6pF/63V 2% NP0 Ceramic Size 0603 Murata
C11 1 X X X X 12pF/63V,
5.6pF/63V 2% NP0 Ceramic Size 0603 Murata
C12 1 X X X X 100nF/63V 10% X7R Ceramic Size 0805
C13
C14 1 X X X X 1mF 20% Tantal Size 1206
C15 1 X X X X 10nF/63V 10% X7R Ceramic Size 0805
C16
Q1 1 X X
X X
9.8438MHz,
13.56MHz
Order No.:
473 000 7281
Order No.:
473 000 7282
ACAL
BR0 1 0R/0.1W Size 0603
BR1 1 X X X X 0R/0.1W Size 0603
BR3 1 X X X X 0R/0.1W Size 0603
BR4 1 X X X X 0R/0.1W Size 0603
BR5 1 0R/0.1W Size 0603
BR6 1 0R/0.1W Size 0603
BR7 1 X X X X 0R/0.1W Size 0603
R10 1 X X X X 150k/0.1W 5% Size 0603
R11 1 X X X X 1k/0.1W 5% Size 0603
R5, R6 2 X X X X 47k/0.1W 5% Size 0603
R7, R8, R9 3 X X X X 100k/0.1W 5% Size 0603
R12 1 X X X X 1.2k/0.1W 2% Size 0603
S1, S2, S3 3 X X X X KSC241JB ITT
Battery 1 X X X X Battery
CR2025 Order No.:
596–090 RS Comp.
Battery Case 1 X X X X Battery Case Order No.:
596–090 RS Comp.
Board 1 X X X X Transmitter
Board FR4 Thickness
1.2mm
10.0012
2.2.2 Application Hints
U2741B/U2745BM
As usual with RF design, the peripheral circuit and layout
are very important. It is recommended to adapt the
individual design to the application suggestion.
DAntenna Design and Matching
In applications with limited space * possible antenna
length l << wavelength λ * a magnetic loop antenna is
recommended to avoid that the radiated field is affected
by the user’s hand. The major parameter of these antennas
is the need for a strong current in order to create a
magnetic field in an area inside the loop.
Some characterizing values:
Rrad +31 kW ǒA
l2Ǔ2
Rrad = radiation resistance of the antenna
A = area inside the loop antenna
λ= wavelength to transmit
The transmitted power is related to the value of Rrad. The
radiated power Prad is the product of ILoop2 and Rrad.
h+fǒ3
2Ǔ
A
η= antenna efficiency
A = area inside the loop antenna
The antenna efficiency η is a function of the area A and
means the relation between the effective radiated power
and the driven power Pout IC of the output.
ERP = h × Pout IC
ERP = effective radiated power
η= efficiency
Equivalent Circuit of the Loop Structure
LLoop RLoss Rrad
14162
Figure 11. Equivalent circuit of the loop structure
LLoop ≈ 8 nH / cm × l (w = 1 mm) ≈ 30 to 60 nH
QL+wLLoop
RLoss [30 to 50 (estimated)
RLoss = loss resistance
Rrad = radiation resistance
The equivalent circuit (see figure 11) shows the parts that
have to be considered in calculations. The range of
possible inductor values is related to the condition:
looplength << wavelength. RLoss stands for the loss of the
inductor.
Design & Layout
In order to optimize the performance, the following rules
have to be observed:
–The area enclosed by the antenna loop has to be as
large as possible.
–The field density increases towards the loop edges.
Therefore, the design of the obligatory ground plane
of the entire circuit has to be carried out so that there
is enough space to the loop’s edges.
–The design shape should be similar to a square (not a
rectangle).
Ground plane
Loop antenna
Loop antenna
Ground plane
Good
Wrong
14118
Figure 12. Antenna design shapes
Besides, the principles of layouting RF circuits as well as
the blocking concepts (see next page) must be observed.
Matching
The impedance of the designed antenna has to be matched
to the driving current source to the optimum load
impedance: ≈500 Ω. Together with the pin capacitance of
about 0.9 pF, this results in the described value Zload opt:
Zload opt 433.92 MHz = 185 + j268
Zload opt 315 MHz = 260 + j330
Since the inductance of the RF choke compensates the pin
capacitance, the antenna circuit has actually to be
matched to ≈500 Ω.
10.00 13
The matching circuit can be described as follows:
LLoop
RLoss
Rrad
14119
Cmatch2
Cmatch1
Zk
Zload––>
U2741B
––>
––>
ANT
Figure 13. Matching circuit
Transform Z|| (parallel resonance impedance) to
Zload = Rload opt. The capacitors Cmatch1 and Cmatch2 per-
form the transformation according to the equations
below:
(r = ratio)
(M.1) Z|| +Q 2pf LLoop
(M.2) Z|| [r2 Zout
(M.3) C|| +1
w2
0 LLoop +Cmatch1 Cmatch2
Cmatch1 )Cmatch2
(M.4) r +Cmatch1 )Cmatch2
Cmatch2 ³Cmatch1 +r C||
Example (Atmel Wireless & Microcontrollers’ Trans-
mitter Board)
antenna loop length: 5 cm
antenna area: 4.5 cm2
LLoop = 40 nH
QL = 40 (estimated)
Rloss = 2.7 W
Rrad = 0.026 W
h [ Rrad / Rloss [ 1%
Z|| = 4.4 kW
with (M.2): r [ 3; with (M.3): C|| = 3.38 pF
→ Cmat ch 1 [ 10 pF
→ Cmat ch 2 [ 5 pF
These values are theoretical. The chosen values are
different and the influence of parasitic capacitors is ob-
vious. Thus, continue the matching procedure by using
two equivalent transmitters with different part values ac-
cording to the following list:
Cmatch1 = 6.8 / 8.2 / 10 / 12 /15 pF ( 2%)
Cmatch2 = Trimmer 2 to 6 pF
Example:
Transmitter 1 with Cmatch1 = 10 pF and trimmer versus
transmitter 2 with Cmatch1 = 8.2 pF and trimmer.
Try to find the optimum and bear in mind the small range
of adjustable power maximum and the condition of
Zload = Rload opt.
Replace the trimmer with 2% capacitors and compare it
with the results with trimmer.
DBlocking Concepts
The design of the layout includes considerations to the
blocking concepts in order to minimize ripples on the
power supply. The following are the most important ones:
–Battery input ports: place capacitor (100 nF ceramic)
in between to prevent voltage break-in and ripples.
–Power-supply chip inputs: place capacitor (about
10 nF ceramic) in between to prevent ripples. Make
sure that every single supply voltage (VCC, LFVCC,
PVCC) is led separately from the input ports and the
blocking is done to its ground (GND, LFGND,
PGND1,2).
–Try to layout a ground plane on the back side and use
this with vias for blocking purpose.
DPeripheral Circuit
–In mixed-signal circuits, the separation of digital and
analog groups is obligatory. So design the micro-
controller separately from the RF part of the
transmitter.
–Loop filter: use the dimensions of the data sheet and
place the ground part of the filter close to LFGND.
In order to protect the sensitive loop filter structure
against currents of the blocking capacitor (LFVCC vs .
LFGND), place this component exceptionally not di-
rectly in between.
–Quartz:
FSK: The determination of the frequency deviation is
done by the combination quartz Q1 and capacitor C4
(f = f0 + ∆f) or Q1 and C3, C4 (f = f0 – ∆f), respectively.
ASK: The determination of the transmitter frequency
is done by the combination quartz Q1 and capacitor
C4.
Bear in mind the tolerances of the quartz (up to
100 ppm). The prototype must have a defined
frequency.
–Printed inductor L1:
This part works as a feed inductor.
Some additional remarks regarding this part as an RF
part and the dimensions of the inductors’ layout:
The inductance of such a printed inductor is
calculated using the following formula:
L ≈ 49.2 × N2 × rav [nH]
N = number of turns
rav = radius (average) [in cm]
(used area: about 5 mm2)
10.0014
The RF value of L1 at 433.92 / 315 MHz of the Atmel
W ireless & Microcontrollers board is about: 130 nH //
0.6 pF // 4 kΩ. Design this inductor together with the
parasitic capacitance of the antenna output in parallel
resonance so that the antenna matching procedure is
still valid in good approximation.
–Antenna: (see paragraph ‘Antenna Design and
Matching’).
DFSK: Frequency Deviation
The recommended frequency deviation is
∆f ≈ 25 to 30 kHz.
The determination of C3, C4 depends on the used quartz.
Use the capacitors to tune the circuit according to the
desired transmitter frequencies (f0 +/– ∆f).
Bear in mind the tolerances of the quartz (up to 100 ppm).
The prototype must have a defined frequency.
DQuartz: Frequency Pulling
Quartz circuits are essential to achieve stable and accu-
rate frequency performance. The use of a load capacitor
CL in conjunction with the quartz determines the actual
frequency. Since parasitic capacitors cause differences
according to the nominal transmitter frequency in a range
up to 100 ppm and more, it might be useful to apply the
pulling concept.
The compensation of parasitic parallel capacitances,
e.g., 4.7 pF, is achieved by reducing the load capacitor
from 8.2 pF down to 5.6 pF. This causes a shift towards
the nominal transmitter frequency and is to be adapted to
the chosen application.
DASK and FSK
The U2741B can be used in both ASK and FSK systems.
The following section describes the clocking concept of
the microcontroller and its cooperation with the U2741B/
U3741BM.
ASK Transmission
As shown in figure 14, the transmitter IC is activated with
VFSK = VS, VASK remains 0 V. Then the IC is enabled and
the XTO and PLL settles. After 5 ms, the output power
can be modulated by means of Pin ASK. In this case,
VFSK remains = VS during the message.
To stop the transmission set VASK = 0 V, then disable the
transmitter with VFSK = 0 V.
Timing ASK
ASK
FSK
CLK
Antenna
output
t > 5 ms
f1 f1 f1 f1 f1
Figure 14. Clocking concept ASK
10.00 15
Timing FSK
ASK
FSK
CLK
Antenna
output f1 f2
t > 5 ms
f1 f2 f2 f2f1 f1 f1f2 f2
14121
Figure 15. Clocking concept FSK
FSK Transmission
As shown in figure 15, the transmitter IC is switched on
with VFSK = VS ,VASK remains 0 V. Then the IC is enabled
and the XTO and PLL settles. After 5 ms, VS is applied
to VASK to turn on the power amplifier. The output can
then be modulated by means of Pin FSK. In this case,
VASK remains = VS during the message.
To stop the transmission set VFSK = 0 V, then disable the
transmitter with VASK = 0 V.
Take Over the Clock Pulse in the µC (MARC4)
The divided clock of the crystal oscillator of the U2741B
fCLK is used for clocking the µC. The µC (M48C892/
M44C892) has the special feature of starting with an inte-
grated RC oscillator to switch on the U2741B with VFSK
= VS. After 5 ms, the CLK of the U2741B is definitely
stable. The µC can use it now to send the message with
crystal accuracy.
The frequency fCLK depends on the crystal frequency
fXTO and the input level of Pin DIVC.
Table 3 Function of Pin DIVC
DIVC = ‘0’fCLK = fXTO / 4
DIVC = ‘1’fCLK = fXTO / 2
10.0016
2.3 Receiver Application Board
14122
Version2(V2): Without SAW
Version5(V5): With SAW
Figure 16. Receiver application board
2.3.1 General Description
Basic Function
The receiver application board is a programmable RF
receiver containing the UHF FSK/ASK remote control
receiver U3741BM. Atmel Wireless & Microcontrollers
provides 8 different types of the receiver application
board (see table 4).
The boards differ in the board version (with/without
SAW), the operating frequency (433.92 MHz/315 MHz)
and the IF bandwidth of the U3741BM (300 kHz/
600 kHz).
For operation, the receiver application board must be
connected to the basic application board.
The configuration of the U3741BM is done by the
microcontroller M48C892 on the basic application board.
After power on, the RF receiver verifies the presence of
a valid transmitter signal. If a valid signal is detected, the
receiver remains active and transfers the data stream to
the connected microcontroller M48C892 on the basic ap-
plication board.
After receiving the data stream, the microcontroller
disables the RF receiver (ENABLE = ‘0’) and verifies the
received data stream. If the data stream is equal to a
programmable testword, stored in a non-volatile memory,
this will be indicated by the LEDs H1 and H2 on the basic
application board.
Table 4 List of available receiver application boards
Receiver Appl. Board 433.92 MHz/300 kHz/SAW 433.92 MHz/600 kHz/SAW 315 MHz/300 kHz/SAW 315 MHz/600 kHz/SAW
Version V5 V5 V5 V5
R5 [kW] 10 10 not mounted not mounted
R6 [kW]not mounted not mounted 10 10
C2 [pF] 8.2 8.2 10 10
C3 [pF] 22 22 47 47
C11 [pF] 5.6 5.6 8.2 8,2
C17 [pF] 8.2 8.2 22 22
L2 [nH] 33 33 82 82
L3 [nH] 27 27 47 47
Q1 [MHz] 6.76438 6.76438 4.90625 4.90625
X2 B3555 B3555 B3551 B3551
Receiver Appl. Board 433.92 MHz/300 kHz/
no SAW 433.92 MHz/600 kHz/
no SAW 315 MHz/300 kHz/no SAW 315 MHz/600 kHz/no SAW
Version V2 V2 V2 V2
R5 [kW] 10 10 not mounted not mounted
R6 [kW]not mounted not mounted 10 10
C2 [pF] not mounted not mounted not mounted not mounted
C3 [pF] 15 15 33 33
C11 [pF] 5.6 5.6 8.2 8.2
C17 [pF] 3.3 8.2 22 22
L2 [nH] 22 22 39 39
Q1 [MHz] 6.76438 6.76438 4.90625 4.90625
10.00 17
Technical Features
DThe power supply is provided by the basic application
board (+5 V)
DPower supply if using the receiver application board
stand alone: Connectors X4 (GND) and X3 (+5 V).
DSensitivity:
315 MHz no SAW –111 dBm
433.92 MHz no SAW –110 dBm
315 MHz SAW –106 dBm
433.92 MHz SAW –105 dBm
DThe reduced sensitivity can be set with the resistor R2.
For more information, see data sheet U3741BM.
DFor measurement purposes, the Pin DATA
(U3741BM) is available on JP2.
DJumper setting on the receiver application board
ASK JP1 FSK
Modulation ASK
Modulation FSK
14164
Figure 17. Jumper setting
Programming of the RF Receiver
Starting of the RKE Design Kit
1. Switch on the PC and start the operating system
2. Assemble the RKE Design Kit as shown in figure 1.
3. Switch on the 5-V power supply of the basic applica-
tion board.
4. Connect the serial link cable (RS232) to an unused
serial port (Com1, Com2).
5. Press the reset button (Key S5).
6. Start the receiver application software
(U3741BM.EXE).
7. Program the receiver with the target values.
Reprogramming of the Receiver:
1. Press the reset button (Key S5).
2. Program the receiver with the target values.
10.0018
1 2 3
JP1
HEADER 3
Receiver Application Board Version 5: 433.92 MHz / 300 kHz / SAW
C7
2.2u
10%
C6
10n
10%
X3
VS VS
R3
27k
10%
FSK/ASK
DATA
VS
VS
1
2
3
4
5
6
7
8
9
10
11
12
JP2
HEADER 12
VS
Enable
R2
56k
2%
SENS
1FSK/ASK
2CDEM
3
AVCC
4AGND
5DGND
6
MIXVCC
7
LNAGND
8LNA_IN
9NC
10 LFVCC 11
LF 12
LFGND 13
XTO 14
DVCC 15
MODE 16
POUT 17
TEST 18
ENABLE 19
DATA 20
U1
U3741BM
C14
33n 5%
X4
GND
C13
10n
10%
C3
22p
5%
R4
0
C11
5.6p
2%
Q1
6.7643MHz
Pout
Mode
R5
10k
10%
R6
not mounted
1
2
3
4
5
6
7
8
9
10
11
12
JP3
HEADER 12
C8
150p
10%
C12
10n
10%
C15
150p
10% C16
100p
5%
C17
8,2p
5%
L3 TOKO LL2012
F27 NJ
27n
5%
R1
820
5%
C9
4.7n
5% C10
1n
5%
IN
1IN_GND
2
CASE_GND
3CASE_GND
4
OUT 5
OUT_GND 6
CASE_GND 7
CASE_GND 8
X2
B3555
X1
KOAX
C2
8.2p
5%
L2 TOKO LL2012
F33NJ
33n
5%
433.92 MHz Matching to SAW Front–End Filter
433.92 MHz / 600 kHz / SAW
NP0
NP0
NP0
NP0
NP0
Figure 18. Schematic receiver application board
V5: 433.92 MHz/ 300 kHz/SAW; 433.92 MHz/ 600 kHz/SAW
10.00 19
1 2 3
JP1
HEADER 3
Receiver Application Board Version 5: 315 MHz / 300 kHz / SAW
C7
2.2u
10%
C6
10n
10%
X3
VS VS
R3
27k
10%
FSK/ASK
DATA
VS
VS
1
2
3
4
5
6
7
8
9
10
11
12
JP2
HEADER 12
VS
Enable
R2
56k
2%
SENS
1FSK/ASK
2CDEM
3
AVCC
4AGND
5DGND
6
MIXVCC
7
LNAGND
8LNA_IN
9NC
10 LFVCC 11
LF 12
LFGND 13
XTO 14
DVCC 15
MODE 16
POUT 17
TEST 18
ENABLE 19
DATA 20
U1
U3741BM
C14
33n 5%
X4
GND
C13
10n
10%
C3
47p
5%
R4
0
C11
8.2p
2%
Q1
4.906MHz
Pout
Mode
R5
not
mounted
R6
10k
10%
1
2
3
4
5
6
7
8
9
10
11
12
JP3
HEADER 12
C8
150p
10%
C12
10n
10%
C15
150p
10% C16
100p
5%
C17
22p
5%
L3 TOKO LL2012
F47 NJ
47n
5% R1
820
5%
C9
4.7n
5% C10
1n
5%
IN
1IN_GND
2
CASE_GND
3CASE_GND
4
OUT 5
OUT_GND 6
CASE_GND 7
CASE_GND 8
X2
B3551
X1
KOAX
C2
10p
5%
L2 TOKO LL2012
F82NJ
82n
5%
315 MHz Matching to SAW Front–End Filter
315 MHz / 600 kHz / SAW
NP0
NP0
NP0
NP0
NP0
Figure 19. Schematic receiver application board
V5: 315 MHz/ 300 kHz/SAW; 315 MHz/ 600 kHz/SAW
10.0020
123
JP1
HEADER 3Receiver Application Board Version 2: 433.92 MHz / 300 kHz / NO SAW
C7
2.2u
10%
C6
10n
10%
X3
VS VS
R3
27k
10%
FSK/ASK
DATA
VS
VS
1
2
3
4
5
6
7
8
9
10
11
12
JP2
HEADER 12
VS
Enable
R2
56k
2%
SENS
1FSK/ASK
2CDEM
3
AVCC
4
AGND
5DGND
6
MIXVCC
7
LNAGND
8LNA_IN
9NC
10 LFVCC 11
LF 12
LFGND 13
XTO 14
DVCC 15
MODE 16
POUT 17
TEST 18
ENABLE 19
DATA 20
U1
U3741BM
C14
33n 5%
X4
GND
C13
10n
10%
C3
15p
5%
R4
0
Q1
6.7643MHz
C11
5.6p
2%
Pout
Mode
R5
10k
10%
R6
not mounted
1
2
3
4
5
6
7
8
9
10
11
12
JP3
HEADER 12
C8
150p
10%
C12
10n
10%
C15
150p
10%
R1
820
5%
C9
4.7n
5% C10
1n
5%
C16
100p
5%
L2 TOKO LL2012 F22NJ
22n
5%
C17
3.3p
5%
X1
KOAX
C2
not mounted
433.92 MHz / 600 kHz / NO SAW
433.92 MHz Matching to 50 Ohm without SAW Front–End Filter
NP0
NP0
NP0
NP0
Figure 20. Schematic receiver application board
V5: 433.92 MHz/ 300 kHz/ NO SAW ; 433.92 MHz/ 600 kHz/ NO SAW
10.00 21
1 2 3
JP1
HEADER 3
Receiver Application Board Version 2: 315 MHz / 300 kHz / NO SAW
C7
2.2u
10%
C6
10n
10%
X3
VS VS
R3
27k
10%
FSK/ASK
DATA
VS
VS
1
2
3
4
5
6
7
8
9
10
11
12
JP2
HEADER 12
VS
Enable
R2
56k
2%
SENS
1FSK/ASK
2CDEM
3
AVCC
4AGND
5
DGND
6
MIXVCC
7
LNAGND
8LNA_IN
9NC
10 LFVCC 11
LF 12
LFGND 13
XTO 14
DVCC 15
MODE 16
POUT 17
TEST 18
ENABLE 19
DATA 20
U1
U3741BM
C14
33n 5%
X4
GND
C13
10n
10%
C3
33p
5%
R4
0
Q1
4.906MHz
C11
8.2p
2%
Pout
Mode
R5
not
mounted
R6
10k
10%
1
2
3
4
5
6
7
8
9
10
11
12
JP3
HEADER 12
C8
150p
10%
C12
10n
10%
C15
150p
10%
R1
820
5%
C9
4.7n
5% C10
1n
5%
C16
100p
5%
L2 TOKO LL2012 F39NJ
39n
5%
C17
3.3p
5%
X1
KOAX
C2
not mounted
315 MHz / 600 kHz / NO SAW
315 MHz Matching to 50 Ohm without SAW Front–End Filter
NP0
NP0
NP0
NP0
Figure 21. Schematic receiver application board
V5: 315 MHz/ 300 kHz/ NO SAW; 315 MHz/ 600kHz/ NO SAW
10.0022
14127
Figure 22. Layer 1 receiver application board
V2: 433.92 MHz/ 300 kHz/ NO SAW; 433.92 MHz/ 600 kHz/ NO SAW;
315 MHz/ 300 kHz/ NO SAW; 315 MHz/ 600 kHz/ NO SAW; scale 1.7:1
14128
Figure 23. Layer 2 receiver application board
V2: 433.92 MHz/ 300 kHz/ NO SAW; 433.92 MHz/ 600 kHz/ NO SAW;
315 MHz/ 300 kHz/ NO SAW; 315 MHz/ 600 kHz/ NO SAW; scale 1.7:1
10.00 23
14129
Figure 24. Layer 1 receiver application board
V5: 433.92 MHz/ 300 kHz/ SAW; 433.92 MHz/ 600 kHz/ SAW;
315 MHz/ 300 kHz/ SAW; 315 MHz/ 600 kHz/ SAW; scale 1.7:1
14128
Figure 25. Layer 2 receiver application board
V5: 433.92 MHz/ 300 kHz/ SAW; 433.92 MHz/ 600 kHz/ SAW;
315 MHz/ 300 kHz/ SAW; 315 MHz/ 600 kHz/ SAW; scale 1.7:1
10.0024
Table 5 Bill of Materials
Components Pcs A*B*C*D*E*F*G*H*Value Tol. Material Housing Manufacturer
U1 1 X XXXXXXXU3741BM-A2FP
U3741BM-A3FP SO20 Atmel Wireless &
Microcontrollers
X2 1 X X X X B3551
B3555 B39421-B3551-Z10
B39431-B3555-Z10 QCC8 S + M Components
C2 1 X X X X 8.2pF/25V
10p/25V 5% NP0 ceramic Size 0603
C3 1 X X XXX X X X
33p/25V
15p/25V
47p/25V
22p/25V
5% NP0 ceramic Size 0603
C11 1 X X XXX X X X 5.6pF/25V
8.2p/25V 2% NP0 ceramic Size 0603 Murata
C17 1 X X X X X X X X
3.3p/25V
22pF/25V
8.2pF/25V 5% NP0 ceramic Size 0603
C6, C12,
C13 3 X X X X X X X X 10nF/25V 10% X7R ceramic Size 0603
C7 1 X X X X X X X X 2.2mF/6.3V 10% Tantal Size 1812
C8, C15 2 X X X X X X X X 150p/25V 10% X7R ceramic Size 0603
C9 1 X X X X X X X X 4.7nF/25V 5% X7R ceramic Size 0603
C10 1 X X X X X X X X 1nF/25V 5% X7R ceramic Size 0603
C14 1 X X X X X X X X 33nF/25V 5% X7R ceramic Size 0603
C16 1 X X X X X X X X 100pF/25V 5% NP0 ceramic Size 0603
R1 1 X X X X X X X X 820R/0.1W 5% Size 0603
R2 1 X X X X X X X X 56k/0.1W 2% Size 0603
R3 1 X X X X X X X X 56k/01W 2% Size 0603
R4 1 X X X X X X X X 0/0.1W Size 0603
R5 1 X X X X 10k/0.1W 10% Size 0603
R6 1 X X X X 10k/0.1W 10% Size 0603
L2 1
X X
X X
X X
X X 22nH
33nH
39nH
82nH
5% LL2012–F<value>
NJ LL2012 Toko
L3 1 X X X X 27nH
47nH 5% LL2012–F<value>
NJ LL2012 Toko
Q1 1 X X
X X
X X
X X
4.906MHz
6.7643MHz
Order-No.
10141392
Order-No.
10141393
Jauch
Connector 1 X X X X X X X X male Contact Radiall
Antenna 1 X X X X X X X X Antenna
400 to 470 MHz Type No. K71 32 29
Order-No. 510 195 BNC connector
165 mm Antennengesellschaft
Ulm
JP1 1 X X X X X X X X 3 pins Row connector
Jumper 1 X X X X X X X X for JP1
JP2, JP3 1XXXXXXXX12 pins Row connector
X3, X4 2XXXXXXXXConnector pin
Board 1 X X X X X X X X U3741BM-V2
U3741BM-V5 FR4 Thickness 1.5 mm
Note:
A* = 315 MHz/ 300 kHz/ NO SAW
B* = 315 MHz/ 600 kHz/ NO SAW
C* = 433.92 MHz/ 300 kHz/ NO SAW
D* = 433.92 MHz/ 600 kHz/ NO SAW
E* = 315 MHz/ 300 kHz/ SAW
F* = 315 MHz/ 600 kHz/ SAW
G* = 433.92 MHz/ 300 kHz/ SAW
H* = 433.92 MHz/ 600 kHz/ SAW
10.00 25
2.3.2 Application Hints
U3741BM/U3742BM/U3745BM
As usual with RF design, the peripheral circuit and layout
are very important. It is recommended to adapt the
individual design to the application suggestion.
DBlocking Concepts
The design of the layout includes considerations to the
blocking concepts in order to minimize ripples on the
power supply. The following are the most important ones:
–Power supply input ports: place capacitors (about
2.2 µF // 10 nF ceramic) in between to prevent voltage
break-in and ripples.
–Power supply chip inputs: place capacitor (about
10 nF ceramic) in between to prevent ripples. Make
sure that every single supply voltage (AVCC, LFVCC,
DVCC, MIXVCC) is led separately from the input
ports and the blocking is done to its ground (AGND,
LFGND, DGND).
–Try to layout a ground plane on the back side and use
this with vias for blocking purpose.
DPeripheral Circuit
–In mixed-signal circuits, the separation of digital and
analog groups is obligatory. So bear in mind the sepa-
ration of the DATA signal from the RF part like XTO
and loop filter. The harmonics of the quartz frequency
of the microcontroller must be includes in the spectral
calculations.
–Loop filter: use the dimensions of the data sheet and
place the ground part of the filter close to LFGND.
–LNAGND: the lead frame and bond wire inductance
towards the LNA ground are compensated by C3, this
capacitor forms a series resonance circuit together
with these inductances.
The inductance L = 25 nH is a feed inductor to form
a DC path. Its value is not critical but must be large
enough not to detune the series resonance circuit. For
cost reduction, this inductor can be easily printed on
the PCB. This configuration improves the sensitivity
of the receiver about 1 dB to 2 dB.
Use the measurements of the layout of the receiver
board to get an idea about the relations of printed me-
ander shaped inductors.
–Quartz (see paragraph ‘Quartz: Frequency Pulling’)
–LNA (see paragraph ‘Input Matching’)
–CDEM (see paragraph ‘Data Encoding’)
DQuartz: Frequency Pulling
Quartz circuits are essential to achieve stable and accu-
rate frequency performance. The use of a load capacitor
CL in conjunction with the quartz determines the actual
frequency. Since parasitic capacitors cause differences
according to the nominal local oscillator frequency in a
range up to 100 ppm and more, it might be useful to apply
the pulling concept (see chapter 2.2.2).
DInput Matching
The matching of the SAW filter/ antenna to the input
impedance of the LNA causes much better noise
matching results (different to power matching). Thus, it
is recommended to use the circuit & layout of the
respective application suggestion. To compensate indi-
vidual layout etc., alter inductor L3 and capacitor C17.
The matching parameters for SAW input towards the
antenna is given by the manufacturer (see application
circuits).
Notes:
–For the measurement of the input impedance, the
receiver must be ON (i.e., no polling or sleep mode).
–The use of a SAW filter results in a different selecti-
vity (see figure 8, data sheet U3741BM).
–U3742BM: The RSSI output can be used for matching
purpose. The voltage is correlated to the sensitivity o f
the receiver.
DMeasurement of the LO Frequency
To perform a measurement of the local oscillator
frequency, the version with SAW (SAW) and without
SAW (NO SAW) have to be distinguished.
NO SAW:
The LO spurious emission ISLORF (see data sheet, para-
graph LNA mixer) can be determined at the antenna input
port. A typical value is –73 dBm.
SAW:
The saw loss backwards to the antenna reduces the signal
too much, so the best way to perform the measurement is
the use of an antenna and place it just above the receiver.
DLO Frequency Shifting
For certain reasons it might be important to shift the re-
ceiving frequency. A change of the XTO frequency
causes this shift. Figure 26 shows the feed of a certain
frequency into the XTO input.
10.0026
14131
U3741BM
220p
50
Z = 50 W
<––
XTO
1/fXTO
<>
V = 200 mV
Figure 26. XTO feed circuit
DData Encoding
To obtain best performance using the U3741BM, the data
should be encoded using Manchester or Bi-phase coding
where the duty cycle of the signal is 0.5 (= 50%). This
allows to cut off the DC portion of the signal using a high-
pass filter in the data filter. If the encoding is different,
there are some restrictions of the signal timing and some
impact on the sensitivity of the receiver.
<>
<>tHtL
DC +tH
tH)tL
14132
Figure 27. Definition of the duty cycle (DC)
Limits of LOW and HIGH Times (tL and tH)
The minimum duration of a high or low period (tH, tL) is
given by the upper cut-off frequency of the data filter. If
the pulse width is lower than the recommended values,
the sensitivity is reduced. Furthermore, the minimum
time is limited by the digital circuit (see data sheet
U3741BM, Electrical Characteristics, parameter
TDATA_min). The mi-nimum time tH, tL of the encoder
may not be shorter than the values shown in the tables 6
and 7 for reduced sensitivity.
Table 6 Timing conditions for ASK (see also data sheet
U3741BM, Electrical Characteristics)
ASK Recom-
mended
CDEM
Edge-to-Edge
Time (tH, tL) for
Full Sensitivity
Extended Edge-to-
Edge Time (tH, tL)
with Reduced
Sensitivity ≈3 dB
Min.
(µs) Max.
(µs) Min.
(µs) Max.
(µs)
BR_Range0 39 nF 270 1000 200 1250
BR_Range1 22 nF 156 560 100 700
BR_Range2 12 nF 89 320 60 400
BR_Range3 8.2 nF 50 180 30 250
Table 7 T iming conditions for FSK
FSK Recom-
mended
CDEM
Edge-to-Edge
Time (tH, tL) for
Full Sensitivity
Extended Time
CDEM Min.
(µs) Max.
(µs) not available
BR_Range0 27 nF 270 1000
BR_Range1 15 nF 156 560
The maximum time of a pulse mainly depends on the cut-
off frequency of the highpass filter which is set by the
CDEM capacitor. To achieve short set-up times for the
polling procedure, the CDEM values are limited for each
baudrate range. Using the recommended values for the
CDEM capacitor, the timing should be within the ranges
shown in tables 6 and 7. The extended limits are given for
a sensitivity reduction of about 3 dB. The tolerance of the
CDEM capacitor should be ±5%. If the encoder signal
exceeds the maximum time limit, the output of the re-
ceiver becomes undefined. This could be random
switching signal (see histogram, figure 29, for the dis-
tribution of pulse width of that signal). The digital circuit
interrupts a LOW period after the time TDATA_max (see
data sheet U3741BM, Electrical Characteristics). After
the transmitter has been kept at one state for a time longer
than the maximum given in tables 6 and 7 the following
signals (1 to 2 bits) could be af fected by inaccurate output
timing or less noise immunity.
Duty cycle of the data signal for non-Manchester/
Bi-phase codes i.e. PWM codes
Duty cycle means the ratio between the pulse width (high
level) and the whole high-low period. The full sensitivity
is available at duty cycles close to 50%. Signals with
different duty cycles can be received under following
conditions:
Table 8 Operating conditions with different duty cycles
Duty
Cycle 33% to 66% 25% to 75% 15% to 85%
ASK ≈2 dB
less sensitivity ≈6 dB
less sensitivity ≈10 dB
less sensitivity
FSK Deviation of
≥30 kHz required, no
change in sensitivity not applicable
DPolling
The configurable self-polling mode with a programmable
timeframe check (bitcheck) guarantees a low power con-
sumption. It is also possible to control the polling directly
by the µC via the Pin ENABLE.
Polling via Pin ENABLE:
The receiver remains in sleep mode as long as ENABLE
is held to “L”. After switching ENABLE to “H”, the sleep
time TSleep elapses. Then, the signal-processing circuits
will be enabled and the incoming data stream will be ana-
lyzed by the bitcheck logic.
10.00 27
IF the receiver is polled exclusively by a µC, TSleep can
be programmed to zero to enable an instantaneous re-
sponse time.
If the analyzing of the incoming data stream is also be
carried out by the µC, the number of bits to be checked
during the bitcheck NBitcheck can be programmed to 0.
DLim_min and Lim_max
During bitcheck, the incoming data stream is examined
to distinguish between a valid signal from a
corresponding transmitter and signals due to noise. This
is done by sub-sequent time frame checks where the
distance between two signal edges are continuously
compared to a program-mable time window.
The limits of the time window TLim_min and TLim_max
must be programmed by the µC depending on the signal
baudrate. Generally we recommend for the limit TLim_min
to be 0.75 × the shortest distance between two signal
edges of the transmitter preburst during bitcheck and
TLim_max to be 1.25 × the longest distance between two
signal edges of the transmitter preburst during bitcheck.
Calculation of TLim_min and TLim_max for modulation
schemes like Bi-phase and Manchester where the duty
cycle is 50% and the preburst consists of a row of ‘1’ or
a row of ‘0’:
TLim_min = 0.75 / (2 × signal baudrate)
TLim_max = 1.25 / (2 × signal baudrate)
Calculation of T Lim_min and TLim_max for the modulation
schemes 1/3 – 2/3 where the duty cycle is ≠ 50%.
logical ’1’logical ’0’
1/3 1/32/32/3
Baudrate 14133
Figure 28. Modulation scheme 1/3 - 2/3
TLim_min = 0.75 / (3 × signal baudrate)
TLim_max = 1.25 / (3/2 × signal baudrate)
Additional information about the calculation of Lim_min
and Lim_max: figure 29 illustrates a typical distribution
of tee (edge-to-edge output) due to noise. The distribution
of tee shows that the incidence of short tee is much higher
than long tee. This means that the lower limit Lim_min
has an essential influence regarding wake-up of the
receiver due to noise.
14134
Figure 29. Typical distribution of tee (edge-to-edge output) due to noise; BR_range: B0
10.0028
Table 9 illustrates the lower limit of the parameter
Lim_min. To prevent wake-up of the U3741BM due to
noise, the limit Lim_min must not be programmed below
‘Lower Limit of Lim_min’. The limit Lim_max was set
to the maximum value during the determination of the
‘Lower Limit of Lim_min’. Generally, a wake-up due to
noise becomes more unlikely if programming a smaller
value for Lim_max. The ‘Lower Limit of Lim_min’ de-
pends on the selected baudrate range (BR_range) and on
the number of bits to be checked.
Table 9
BR_range Number of
Bits to be
Checked
Lower Limit
of Lim_min
B0 3 16B0
(1.0 to 1.8 kBaud) 6 12
911
B1 3 17B1
(1.8 to 3.2 kBaud) 6 13
911
B2 3 19B2
(3.2 to 5.6 kBaud) 6 13
911
B3 3 21B3
(5.6 to 10.0 kBaud) 6 14
9 12
The following method to calculate Lim_min and
Lim_max is recommended:
TLim_min = 0.75 / (2 × signal baudrate)
TLim_max = 1.25 / (2 × signal baudrate)
Lim_min = TLim_min / TXClk
Lim_max = (TLim_max / TXClk) +1
If the calculated Lim_min ≥ ‘Lower Limit of
Lim_min’ →OK
What to do if the calculated Lim_min < ‘Lower Limit of
Lim_min’?
–Reduce the tolerance to calculate TLim_min and
TLim_max (e.g. ± 20%)
–If possible, use a higher baudrate range.
Due to the characteristic, it is more likely that the
device wakes up due to noise at the upper end of the
baudrate range.
DProgramming Details
The configuration registers of the U3741BM are
programmed via the bi-directional data line. The
programming sequence is described in the chapter
‘Programming the configuration registers’ in the data
sheet U3741BM. Some features of the programming
sequence they will be described in more detail on the next
page.
Out1 (mC)
DATA (U3741BM)
Serial bi-directional
data line
X
Bit 1
(”0”)Bit 2
(”1”)Bit 13
(”0”)Bit 14
(”1”)
X
t1 t2 t3
t4
t5
t6 t8
t7
X
X
T
Programming Frame
(Startbit) (Register–
select) (Poll8) (Poll8R)
Receiver
on Startup
mode
t9 Sleep
14135
Figure 30. Programming timing
10.00 29
Programming start pulse t1:
The programming start pulse starts the programming
sequence and is generated by a connected µC. The
necessary length of the programming start pulse depends
on the active baudrate range and the logic output level of
Pin DATA (U3741BM) during the start pulse.
If the logic output level of Pin DAT A is ‘H’ during the start
pulse, the receiver is able to recognize the programming
request after t1 ≥ 3 × TClk. A proper detection of the
programming request is guaranteed after t1 ≥ 4 × TClk.
DATA = ‘H’ can be ensured by setting Pin ENABLE to
‘L’. This feature can be used if the time to reprogram is
critical. Pay attention that spikes on the serial data line
(tSpike > 3 × TClk) could start a programming sequence.
If the logic output level of Pin DATA is unknown during
the start pulse, the start pulse length must be longer as the
maximum low period at the DATA output TDATA_L_max.
After a power-on reset, the programming start pulse must
be at least 11.7 ms due to the reset marker.
Programming pulse t7:
Within the programming window t5, the individual bits
are set. If the µC pulls down the Pin DATA for the time
t7 during t5, the according bit is set to ‘0’. If no
programming pulse t7 is issued, this bit is set to ‘1’.
To guarantee the detection of the programming pulse, the
minimum length of t7 is 64 × TClk. If the programming
pulse becomes shorter (32 × TClk ≤ t7 < 64 × TClk), the
detection is not guaranteed.
Table 10
Parameter Test Condition Sym-
bol 6.76438 MHz Oscillator
(MODE: 1) 4.90625 MHz Oscillator
(MODE: 0) Variable Oscillator Unit
bol Min. Typ. Max. Min. Typ. Max. Min. Typ. Max.
Basic clock cycle of the digital circuitry
Basic clock
cycle MODE=0 (USA)
MODE=1 (Europe) TClk 2.0697 2.0383 1/(fXTO/10)
1/(fXTO/14) µs
Extended
basic clock
cycle
BR_Range =
BR_Range0
BR_Range1
BR_Range2
BR_Range3
TXClk 1.6
8.3
4.1
2.1
16.3
8.2
4.1
2.0
8 × TClk
4 × TClk
2 × TClk
1 × TClk
µs
Program-
ming start
pulse
DATA = ‘1’ during
the start pulse.
Detection of the
programming
request is not
guaranteed.
t1 6.2 6.1 3 × TClk µs
DATA = ‘1’ during
the start pulse.
Detection of the
programming
request is
guaranteed.
t1 8.3 8.2 4 × TClk µs
DATA = ‘X’ during
the start pulse
BR_Range =
BR_Range0
BR_Range1
BR_Range2
BR_Range3
after POR
t1
2188
1104
561
290
11656
3176
3176
3176
3176
2155
1087
553
286
11479
3128
3128
3128
3128
1057 × TClk
533 × TClk
271 × TClk
140 × TClk
5632 × TClk
1535 × TClk
1535 × TClk
1535 × TClk
1535 × TClk
µs
Program-
ming pulse Detection of the pro-
gramming pulse not
guaranteed.
t7 66.2 65.2 32 × TClk µs
Detection of the pro-
gramming pulse
guaranteed.
t7 132.4 529.8 130.4 521 64 × TClk 256 × TClk µs
10.0030
DAcknowledge Pulse
If the mode word just programmed is equivalent to the mode word that was already stored in that register, this will be
indicated by the acknowledge pulse t8. If the mode word is not equivalent, no acknowledge pulse occurs.
Example of a programming sequence:
Power on reset: Default value for OPMODE register: ‘48B0 Hex’
Default value for LIMIT register: ‘0E60 Hex’
Programming of the OPMODE register with ‘48B0 Hex’→Acknowledge pulse
Programming of the LIMIT register with ‘0E60 Hex’→Acknowledge pulse
Programming of the OPMODE register with ‘58B0 Hex’→no Acknowledge pulse
Programming of the LIMIT register with ‘0F60 Hex’→no Acknowledge pulse
Programming of the LIMIT register with ‘0F60 Hex’→Acknowledge pulse
Programming of the OPMODE register with ‘58B0 Hex’→Acknowledge pulse
DLoad Capacity of Pin DATA
Table 11 Load capacity of Pin DATA
Parameter Test Condition Symbol Min. Typ. Max. Unit
Data output
Saturation voltage Low Iol = 1 mA VOl 0.08 0.3 V
Internal pull-up resistor Rpup 50 61 kΩ
Maximum time constant τ = CL × (Rpup//Rext)τ2.5 ms
Maximum capacitive load Without external pull-up resistor
Rext = 5 kΩCL
CL
41
540 pF
pF
DATA
U3741BM VS
Rpup = 50 k Rext
VS
CL
DATA_OUT
DATA_IN Serial bi-directional
data line DATA_OUT
DATA_IN
Serial bi-directional
data line
tDelay
14136
Figure 31. Load capacity of Pin DATA
The U3741BM compares the internal signals DATA_OUT and DATA_IN. If the time tDelay ≥ 3 × TClk (τ > 2.5 µs), this
can start the programming sequence and switching the receiver back to the sleep mode.
10.00 31
DCalculation Example of the Receiver Parameters
1010 0101
t
Testword
Preburst
1 / Baudrate
Manchester code
0
1
1
Telegram
Separa–
tion
14137
Figure 32. Transmitter signal
Table 12
Transmitter Signal Receiver U3741BM
Signal baudrate = 2400 Baud
Testword = ‘A005 Hex’
Preburst length = 20.83 ms (50 bits)
BR_range = B1 (1.8 to 3.2 kBaud)
Number of bits to be checked = 3 *)
POUT = 0 (If a resistor is connected
between POUT and SENS2 this means full sensitivity)
TLim_min = 156.25 µs **)
TLim_max = 260.4 µs
Lim_min = 19
Lim_max = 32
TSleep = 17.3 ms ***)
Sleep = ‘01000 bin’
*) to get better immunity against disturbance and noise select 6 or 9 bits.
**) TLim_min = 0.75/ (2 × 2400 Baud) = 156.25 µs
TLim_max = 1.25/ (2 × 2400 Baud) = 260.4 µs
Lim_min = TLim_min/ TXClk = 156.25 µs/ 8.3 µs = 18.8 → 19
Lim_max = (TLim_max/ TXClk) + 1 = (260.4 µs/ 8.3 µs) + 1 = 32.4 → 32
(TXClk see table 13; 6.76438 MHz oscillator)
***) TSleep ≤TPreburst – TStartup – TBitcheck - TStart_µC
TSleep ≤20.83 ms – 1061 µs – 3.5/ 2400 Hz - 1 ms = 17.3 ms (estimated TStart_µC = 1 ms)
Sleep = Tsleep/ (Xsleep × 1024 × TClk) = 17.3 ms/ (1 × 1024 × 2.0697 µs) = 8.16 → 8 → ‘01000 bin’
10.0032
Table 13
Parameter Test Condition Symbol 6.76438 MHz Oscillator
(MODE: 1) 4.90625 MHz Oscillator
(MODE: 0) Variable Oscillator Unit
Min. Typ. Max. Min. Typ. Max. Min. Typ. Max.
Basic clock cycle of the digital circuitry
Basic
clock
cycle
MODE=0 (USA)
MODE=1 (Europe) TClk 2.0697 2.0383 1/fXTO/10
1/fXTO/14 µs
Extended
basic
clock
cycle
BR_Range =
BR_Range0
BR_Range1
BR_Range2
BR_Range3
TXClk 16.6
8.3
4.1
2.1
16.3
8.2
4.1
2.0
8 × TClk
4 × TClk
2 × TClk
1 × TClk
µs
Sleep
time Sleep and XSleep
are defined in the
OPMODE register
TSleep Sleep ×
XSleep ×
1024 ×
2.0697
Sleep ×
XSleep ×
1024 ×
2.0383
Sleep ×
XSleep ×
1024 ×
TClk
ms
Startup
time BR_Range =
BR_Range0
BR_Range1
BR_Range2
BR_Range3
Tstartup 1855
1061
1061
663
1827
1045
1045
653
896.5
512.5
512.5
320.5 ×
TClk
µs
Time for
bitcheck Average bitcheck
time while polling
BR_Range =
BR_Range0
BR_Range1
BR_Range2
BR_Range3
TBitcheck
2.3
1.3
1.2
0.8
2.3
1.3
1.2
0.8
ms
Bitcheck time for a
valid input signal
fSig
NBitcheck = 0
NBitcheck = 3
NBitcheck = 6
NBitcheck = 9
TBitcheck
0
3/fSig
6/fSig
9/fSig
0.166
3.5/fSig
6.5/fSig
9.5/fSig
0
3/fSig
6/fSig
9/fSig
0.164
3.5/fSig
6.5/fSig
9.5/fSig
0
3/fSig
6/fSig
9/fSig
8 × TClk
3.5/fSig
6.5/fSig
9.5/fSig
ms
DReset marker
To indicate a power-on reset, the receiver displays a reset
marker (RM) at Pin DATA. The RM is represented by a
fixed frequency fRM (see data sheet U3741BM) with a
50% duty cycle.
The connected µC can distinguish between the RM and
a data signal, because fRM is lower than the lowest
feasible frequency of a data signal.
If the RM is active, the receiver can not receive a
transmitter signal.
After the µC has recognized the RM, the configuration
registers must be programmed with the target values.
DDelete the reset marker
The first thing to do after power-on or a power-on reset is
to delete the RM. To activate the receiver, delete the RM
by generating a programming start pulse t1 ≥ 5632 × TClk.
The programming start pulse t1 must be generated with
a non bouncing signal (not with a lab wire!).
If using a lab wire, the spikes on the serial data line can
start a programming sequence and the register
configuration is unknown.
10.00 33
3. Software Components
3.1 Transmitter Application
Software U2741B
3.1.1 Basic Information
The transmitter application software U2741B supports
the development of RKE systems with the UHF
FSK/ASK remote control transmitter U2741B. The
software configures the transmitter application board
(RF transmitter) via PC. In this way parameters like
baudrate, modulation, testword etc. can be changed in a
very quick and comfortable way.
3.1.2 Installation and System
Requirements
DPC 486 or higher
DSerial port Com1 or Com2
DOperating system
– Win 3.1x
– Win 95
– Win NT
Installation of the transmitter– and receiver application
software:
DClose all running windows applications.
DFor Win 95 or Win NT installation, insert disk 1 in
your floppy drive
DFor Win 3.1x installation, insert disk 3 in your floppy
drive
DStart setup.exe
The setup installs the transmitter application software,
the receiver application software and the file
PRGINST.TXT (programming instructions) on the hard
disk.
To check the correct function of the whole RKE Design
Kit, read the information given in the programming
instructions first.
Table 14
Possible Problems During Installation What to do
Error message:
’Setup couldn’t copy ver.dll to C:\Windows’Remove or rename the existing ver.dll in the windows
directory.
Error message:
’*.dll is in use’Press the ignore button.
Error message:
One or more Visual Basic applications are
running (vbrun300.dll is in use)’
Close all windows applications.
10.0034
3.1.3 Start of the Transmitter Application Software
Figure 33. Start window transmitter application software
DTo ensure proper operation, the following steps should
be done before starting the transmitter application
software:
1. Switch on the PC and start the operating system.
2. Remove or insulate the 3-V lithium battery in the
transmitter.
3. Assemble the RKE Design Kit as shown in figure 1.
4. Switch on the 5-V power supply of the basic applica-
tion board.
5. Connect the serial link cable (RS232) to an unused
serial port (Com1, Com2).
6. Press the reset button (Key S5).
Start the transmitter application software with the com-
mand: u2741b.exe
Figure 33 shows the start window after a successful start.
During loading of the program all parameters used in the
latest session, stored in a non volatile memory
(EEPROM) on the transmitter application board, will be
read. These values will be used as the start values in the
corresponding windows.
If one ore more parameters are out of the valid range, this
will be reported by the error message: ‘Transmitter pa-
rameter out of range’.
During loading of the program, the file com_port.cnf will
be opened. This file contains the number of the Com-Port
(Com1 or Com2) used in the latest session. If the file
com_port.cnf does not exist, the default Com-Port is
Com2.
If the selected Com-Port is not available (e.g., used by
another program), this will be reported by the Com-Port
Error message. In this case, the other Com-Port must be
selected. The changing of the Com-Port initiates the
reading of the parameters on the transmitter application
board (EEPROM) and there update in the corresponding
windows.
If Com1 and Com2 are not available, select ‘Exit’, make
one Com-Port available and start the program again.
If there is no transmitter application board connected to
the basic application board or any other problem with the
data transmission PC <–> basic application board
<–> transmitter application board, this will be reported
by the error message: – ‘No hardware detected!’
10.00 35
3.1.4 Program Description
D‘Telegram’ (Telegram generator)
By using the telegram generator, a specific telegram can be generated. The telegram consists of a testword and a pre-
cede preburst (figure 35). The encoding of the telegram is Manchester.
14139
Figure 34. Telegram generator
1010 0101
t
Testword ( A ... 5 Hex )
Preburst
A (Hex) 5 (Hex)
1 / Baudrate
Manchester code
011
Telegram
Separa–
tion
14140
Figure 35. Telegram example
10.0036
Preburst
The preburst is a number of bits (‘1’) which precede the
testword and will be used by the receiver (U3741BM) and
the connected µC for wake-up and synchronization.
The number of bits the preburst contains can be selected
in a range of 8 to 1000 in steps of 8 by using the scrollbar
‘Preburst’. To indicate the beginning of the testword, the
last bit of the preburst is a ‘0’. The length of the preburst
depends on the selected baudrate and will be indicated by
‘Preburst_Length [µs]’.
The required length of the preburst is dependent on the
polling parameters TSleep, TStartup, TBitcheck of the
receiver U3741BM and the start-up time of a connected
µC. For more information, see data sheet U3741BM.
Testword
Either a fixed (‘F09AF09A’) or a user-defined testword
can be selected in a range of 4 to 32 bits in steps of 4 bits.
The input of the testword must be a hexadecimal value.
The special quality of the fixed testword is that every
possible value of a 4-bit word is included. This is
important for proper detection of every bit *
independent of the past one (data filter U3741BM).
Baudrate
The baudrate refers to the whole telegram (preburst and
testword) and can be selected in a range of:
EU: → 500 to 12500 Baud
USA: → 497 to 12766 Baud
The baudrate range of the receiver application board
is limited to 1.0 to 10.0 kBd.
Before selecting a baudrate, the operating frequency
(433.92 MHz/ 315 MHz) must be selected in the
‘Frequency’ – window.
Modulation
Select ASK for the transmitter application board
433.92 MHz/ ASK and 315 MHz/ ASK.
Select FSK for the transmitter application board
433.92 MHz/ FSK and 315 MHz/ FSK.
Write
Press the ‘WRITE’ button to send the selected values via
the serial port to the transmitter application board. If the
transmission was successful, the ‘WRITE’ button will be
inactive until a parameter is changed in the ‘Telegram’
window.
If there is no board selected, a transmission error occurs
(see table 15) or the selected Com-Port is not available,
this will be indicated by an error message and the
‘WRITE’ button remains active.
In this case, check the hardware or change the Com-Port
and press the ‘WRITE’ button again.
The function of the ‘WRITE’ button in the windows
‘Pattern–Patterngen.’ and ‘Button’ is equivalent.
Help:
Press the ‘HELP’ button to get help information.
Table 15
Error Error Messages
The selected Com–Port in not available. Device unavailable !
Problems with the data transmission: PC <––> basic
application board <––> transmitter application board. No hardware detected ! or
Serial Communication Error !
Problems with the data transmission: PC <––> basic
application board <––> transmitter application board. The parameters couldn’t be written to the application
board ! (not during startup)
Verifying not correct. Transmission error !
10.00 37
D‘Pattern–Patterngen’: (Pattern Generator)
By using the pattern generator, a specific pattern (code) can be generated. The pattern consists of a maximum of
256 segments.
14141
Figure 36. Pattern generator
state
Pattern
Tstep
Pattern length
00110100 1000111
t
14142
Figure 37. Example of a pattern
10.0038
Tstep
The time step Tstep is adjustable in a range of:
EU: →40.12 µs to 1000.64 µs
USA: →39.168 µs to 1005.312 µs
Before selecting Tstep, the operating frequency
(433.92 MHz/ 315 MHz) must be selected in the
‘Frequency’ – window.
Pattern_Length
The Pattern_Length can be adjusted by using a scrollbar
in a range of n × 8 × Tstep (n = 0 to 32).
Time Interval
By means of the scrollbar ‘Time Interval’, any interval
(segment) of the Pattern can be selected.
State
The state of any interval (segment) can be set to ‘0’ or ‘1’.
Modulation
Select ASK for the transmitter application board
433.92 MHz/ ASK and 315 MHz/ ASK.
Select FSK for the transmitter application board
433.92 MHz/ FSK and 315 MHz/ FSK.
Filename
Name of the loaded pattern file.
Write
Function identical with the ‘WRITE’ button in the
‘Telegram’ window (see paragraph ‘Telegram’, section
‘Write’).
Help
Press the help button to get help information.
Note:
The RF receiver U3741BM is designed for DC-free codes
like Manchester or Bi-phase. To evaluate the pattern with
the receiver application software the encoding must be
Manchester and a preburst must be generated like in the
Telegram generator.
D‘Pattern–Save_Load_Pattern’
A generated pattern can be stored or loaded in the
‘Save_Load_Pattern’ window.
The filename must have the extension *.pat.
Button
In the ‘Button’ window (see figure 38) a function can be
assigned to each of the 3 buttons existing on the transmit-
ter application board.
14143
Figure 38. Button window
10.00 39
Continuous Telegram
After pressing the button, the telegram (preburst + testword) generated by the telegram generator will be sent in a loop.
After each telegram, the carrier will be switched off for t = 150 ms.
In order to save current, the transmission will be stopped after t = 30 s.
The start and the end of the function will be indicated by the LED D1 on the transmitter application board.
Preburst Testword Preburst Testword Carrier off
Carrier off
tmax 14144
Figure 39. Timing continuous telegram
Single Telegram
After pressing the button, the telegram (preburst + testword) generated by the telegram generator will be sent once.
The start of the function will be indicated by the LED D1 on the transmitter application board.
Preburst Testword Carrier of f 14145
Figure 40. Timing single telegram
Continuous Pattern
After pressing the button, the pattern generated by the pattern generator will be sent in a loop. After each pattern, the
carrier will be switched off for t = 150 ms. In order to save current, the transmission will be stopped after t = 30 s. The
start and the end of the function will be indicated by the LED D1 on the transmitter application board.
Pattern Pattern Carrier of f
Carrier off
tmax 14146
Figure 41. Timing continuous pattern
Single Pattern
After pressing the button, the pattern generated by the pattern generator will be sent once. The start of the function will
be indicated by the LED D1 on the transmitter application board.
Pattern Carrier of f 14163
Figure 42. Single pattern
10.0040
Continuous Preburst
After pressing the button, the preburst generated by the telegram generator will be sent. In order to save current, the
transmission will be stopped after t = 30 s. The start and the end of the function will be indicated by the LED D1 on
the transmitter application board.
Preburst Preburst
tmax 14147
Figure 43. Timing continuous preburst
Continuous Carrier (unmodulated)
After pressing this button, the carrier (unmodulated) will be switched on. In order to save current, the carrier will be
switched off after t = 30 s. The start and the end of the function will be indicated by the LED D1 on the transmitter
application board.
Carrier on Carrier on
tmax 14148
Figure 44. Timing continuous carrier
Write
Function identical with the ‘WRITE’ button in the ‘Telegram’ window (see paragraph ‘Telegram’, section ‘Write’).
D‘Frequency’
The divided clock of the U2741B’s crystal oscillator (fCLK) is used for clocking the µC. To send the telegram or the
pattern with the right baudrate, select the operating frequency fSend of the used transmitter application board
Table 16
Quartz Frequency (Q1) fSend fClk
fXTO = 13.56 MHz, DIVC = ‘0’ (EU) 433.9 MHz 3.39 MHz
(fXTO = 6.78 MHz, DIVC = ‘1’ (EU)) * (433.9 MHz) (3.39 MHz)
fXTO = 9.84 MHz, DIVC = ‘0’ (US) 315 MHz 2.46 MHz
(fXTO = 4.92 MHz, DIVC = ‘1’ (US)) * (315 MHz) (2.46 MHz)
* Note: These boards are not available by Atmel Wireless & Microcontrollers
10.00 41
D‘Application’
The application window provides information about the ASK/FSK timing and the Pin DIVC. Depending on the selected
baudrate, bitcheck limit values ‘Lim_min’ and ‘Lim_max’ for the receiver U3741BM are recommended.
14149
Figure 45. Application window
D‘Default’
To operate with the transmitter in the default configuration, open the ‘Default’ window and press the ‘WRITE’ button.
Examine that the operating frequency selected in the ‘Frequency’ window is identical with the used transmitter applica-
tion board. To operate with the default configuration and an ASK transmitter board, change the modulation to ASK
in the telegram- and pattern generator after programming the default values.
14150
Figure 46. Default configuration
10.0042
D‘Com_Port’
Selection of the serial port (Com1 or Com2). If the
selected Com-Port is not available (e.g., used by another
program), this will be reported by the Com-Port error
message. In this case, the other Com-Port must be
selected.
The change of the Com-Port will initiate the reading of
the parameters on the transmitter application board and
the update of the corresponding windows.
If one ore more parameters are out of the valid range, this
will be reported by the error message ‘Transmitter
parameter out of range’ and all parameters in the
‘Telegram’–, ‘Pattern–Patterngen.’– , ‘Button’– and
‘Frequency’–window will be deleted.
In this case reprogramming of the whole transmitter is
necessary (frequency, telegram generator, pattern
generator and the button functions).
If Com1 and Com2 are not available, press Exit, make one
Com-Port available and start the program again.
3.1.5 Exit of the Transmitter Applica-
tion Software
Select ‘Exit’ to close the program.
10.00 43
3.2 Receiver Application Software U3741BM
3.2.1 Basic Information
The receiver application software U3741BM supports the
development of RKE systems with the UHF FSK/ASK
remote control receiver U3741BM. The software config-
ures the receiver application board (U3741BM) via the
PC. In this way parameters like baudrate, modulation,
testword etc. can be changed in a very quick and
comfortable way. In addition, some tools to evaluate the
data transmission are provided.
3.2.2 Installation and System
Requirements
DPC 486 or higher
DSerial port Com1 or Com2
DOperating system
– Win 3.1
– Win 95
– Win NT
Installation of the receiver- and transmitter software:
DClose all running windows applications.
DFor Win 95 or Win NT installation, insert disk 1 in
your floppy drive
DFor Win 3.1x installation, insert disk 3 in your floppy
drive
DStart setup.exe
The setup installs the receiver application software, the
transmitter application software and the file
PRGINST.TXT (programming instructions) on the hard
disk.
To check the proper operation of the whole RKE Design
Kit, read the information given in the programming
instructions first.
Table 17
Possible Problems During Installation What to Do
Error message:
‘Setup couldn’t copy ver.dll to C:\windows’Remove or rename the existing ver.dll in the windows
directory.
Error message:
‘ *.dll is in use’Press the ignore button.
Error message:
‘One ore more Visual Basic applications are running
(vbrun300.dll is in use)’
Close all windows applications.
10.0044
3.2.3 Start of the Receiver Application Software
Figure 47. Start window receiver application software
DTo ensure proper operation, the following steps have
to be carried out before starting the receiver applica-
tion software.
1. Switch on the PC and start the operating system.
2. Assemble the RKE Design Kit as shown in figure 1.
3. Switch on the 5-V power supply of the basic applica-
tion board.
4. Connect the serial link cable (RS232) to an unused
serial port (Com1,Com2).
5. Press the reset button (Key S5).
Start the receiver application software with the com-
mand: u3741bm.exe
The receiver application board only works in conjunc-
tion with the basic application board!
The µC on the basic application board controls the data
transfer with the PC, the transmitter application board and
the programming of the receiver U3741BM. The µC also
evaluates the received data stream and indicates the
results on the basic application board. If the ‘Telegram–
Testword’, ‘Evaluation–Histogram’ or ‘Evaluation–
Timing_List’ window is active, the results can also be
transmitted to the PC.
Figure 47 shows the start window after a successful start.
During loading of the program, all parameters used in the
latest session, stored in a non volatile memory
(EEPROM) on the basic application board, will be read.
These values will be used as the start values in the
corresponding windows and in the status line at the
bottom of each window.
During loading of the program, the file com_port.cnf will
be opened. This file contains the number of the Com-Port
(Com1 or Com2) used in the latest session. If the file
com_port.cnf does not exist, the default Com-Port is
Com2.
If the selected Com-Port is not available (e.g. used by
another program), this will be reported by the Com-Port
error message. In this case, the other Com-Port must be
selected. The changing of the Com-Port initiates the
reading of the parameters on the basic application board
(EEPROM) and their updated in the corresponding
windows and the status line.
10.00 45
If Com1 and Com2 are not available, select ‘Exit’, make
one Com-Port available and start the program again.
If there is no receiver application board connected on the
basic application board or any other problem with the data
transmission PC <–> basic application board <–> re-
ceiver application board, this will be reported by the error
message: – ‘No hardware detected !’
Status Line
The actually valid parameters are indicated in the status
line.
3.2.4 Program Description
D‘Register–OPMODE’
Programming of the receiver operation mode register.
BR_range
Baudrate range sets the appropriate baud rate range. At
the same time it defines XLim (see data sheet U3741BM).
XLim is used to define the bitcheck limits TLim_min and
TLim_max.
The changing of the BR_range also changes the µC_Lim-
its.
NBitcheck
Number of bits to be checked
TSleep
Sleep time
Normal : sleep time
*8: extended sleep time
*8 temp: temporary extended sleep time
POUT
Multi-purpose output port. This port can be used to con-
trol the receiver’s sensitivity.
Low: normal sensitivity
High: reduced sensitivity
(R2 = 56 kW, see data sheet U3741BM)
14152
Figure 48. OPMODE register
10.0046
Table 18.
Error Error Messages
The selected Com–Port in not available. Device unavailable !
Problems with the data transmission: PC <––> basic
application board <––> transmitter application board. No hardware detected ! or
Serial Communication Error !
Problems with the data transmission: PC <––> basic
application board <––> transmitter application board. The parameters couldn’t be written to the application
board ! (not during startup)
Verifying not correct. Transmission error !
Write
Press the ‘WRITE’ button to send the selected values via
the serial port to the receiver application board. If the
transmission was successful, the ‘WRITE’ button will be
inactive until a parameter is changed in the ‘Register–
OPMODE’ window.
If there is no board selected, a transmission error occurs
or the selected Com-Port is not available, this will be
indicated by an error message and the ‘WRITE’ button
remains active.
In this case, check the hardware or change the Com-Port
and press the ‘WRITE’ button again.
The function of the ‘WRITE’ button in the windows
‘Register–Limit’, ‘Telegram–Testword’ and
‘Evaluation–µC_Limits’ is equivalent.
D‘Register–LIMIT’
Programming of the upper and lower bitcheck limits for
time frame check.
Lim_min
Lower bitcheck limit
Lim_max
Upper bitcheck limit
Write
Function identical with the ‘WRITE’ button in the
‘Register–OPMODE’ window
14153
Figure 49. LIMIT register
10.00 47
D‘Telegram–Testword’
14154
Figure 50. Testword window
A fixed (‘F09AF09A’) or a user-defined testword can be
selected in a range of 4 to 32 bits in steps of 4 bits. The
input of the testword must be a hexadecimal value.
The reception of the testword will be indicated by
‘Testword ok.’ and ‘µC_Limits ok.’.
In addition, 2 LEDs on the basic application board
(H1, H2) indicate the receipt of the valid testword.
The encoding of the testword must be Manchester.
The special quality of the fixed testword is that every
possible value of a 4-bit word is included. This is
important for a proper detection of every bit *
independent of the past one.
Write
Function identical with the ‘WRITE’ button in the
‘Register–OPMODE’ window.
Status
Testword ok / µC_Limits ok: (see chapter
‘Evaluation–µC_Limits’)
The µC on the basic application board compares the
received data stream with the selected testword. 2 LEDs
on the basic application board (H1, H2) indicate the re-
sult. If manual or automatic update is active, the result
will also be transmitted to the PC.
Manual Update
If ‘MANUAL UPDATE’ is selected, the status of the next
testword will be indicated.
If there is no transmitter signal, this will be indicated by
the error message ‘No signal received’.
Automatic Update
If ‘AUTOMATIC UPDATE’ is selected, the status will be
updated after the reception of the next testword.
This mode is active until the button ‘MANUAL
UPDATE’ is selected or the testword will be changed.
If there is no transmitter signal, this will be indicated by
the error message ‘No signal received’.
10.0048
D‘Evaluation–Histogram’
14155
Figure 51. Histogram window
To evaluate the timing of a received data stream , the tim-
ing margins can be displayed in the
‘Evaluation–Histogram’ window. This tool is helpful to
define the time µC_Limits used by the connected µC to
evaluate the proper timing of the data stream.
The timing of the data stream (n samples) will be
transmitted to the PC. For the testword A5 Hex , shown
in figure 52, 10 samples will be transmitted. A sample is
the distance between 2 signal edges. The maximum
length of a displayed data stream is 64 samples.
0100101
t
Testword ( A5 Hex )
A (Hex) 5 (Hex)
Manchester code
Sample 1
Sample 2
Sample 3
Sample 4
Sample 5
Sample 6
Sample 7
Sample 8
Sample 10
Sample 9
14156
Figure 52. Example of a testword
Mode Select
–‘Mode1’:
The number of the target samples refers to the selected
testword in the ‘Telegram–Testword’ window.
e.g. Testword: A5 Hex –––> Target Samples: 10
–‘Mode2’:
Select the max. number of the target samples in a
range of 1 to 64.
Samples
–‘Target’: Target number of the samples to be dis-
played.
–Displayed: Number of the actually displayed samples.
The upper timing limit Tsample_max (see table 19) of a
sample depends on the selected baudrate range
(BR_range).
10.00 49
Table 19.
BR_range [kBd] Tsample_max [µs]
1.0 to 1.8 2032
1.8 to 3.2 1016
3.2 to 5.6 508
5.6 to 10.0 254
If a sample increases the upper timing limit
Tsample_max, the following samples are invalid and will
not be displayed.
Select_Edge
The histogram will be generated with the following
timings:
_| _| rising edge to rising edge
|_ |_ falling edge to falling edge
_| |_ rising edge to falling edge
|_ _| falling edge to rising edge
| | edge to edge
Duty Cycle
Resulting duty cycle of the data stream. The calculation
of the duty cycle is described in the chapter ‘3.2.6 Accu-
racy and Resolution of the Telegram Evaluation’.
Manual Update
If ‘MANUAL UPDATE’ is selected, the histogram of the
next data stream will be generated.
If there is no transmitter signal, this will be indicated by
the error message ‘No signal received’.
Automatic Update
If ‘AUTOMATIC UPDATE’ is selected, the histogram
will be updated after the reception of the next data stream.
This mode is active until the button ‘MANUAL
UPDATE’ is pressed.
If there is no transmitter signal, this is indicated by the er-
ror message ‘No signal received’.
Note:
The last values of the histogram will be displayed in the
‘Evaluation–Timing_List’ window.
D‘Evaluation–Timing_List’
To evaluate the timing of a received data stream , the
timing margins can be displayed in the
‘Evaluation–Timing_List’ window. This tool is helpful to
define the time window µC_Limits, used by the
connected µC, to evaluate the proper timing of the data
stream.
The timing of the data stream (n samples) will be
transmitted to the PC. A sample is the distance between
2 signal edges. The maximum length of a displayed data
stream is 64 samples.
For every sample, the sample time TN, the polarity and
a remark if the sample is inside of the µC_Limits are
displayed. The polarity of the first sample must be ‘H’.
This is guaranteed if the preburst of the telegram is a row
of ‘1’ and one ‘0’ to detect the beginning of the testword
(see figure 55).If the preburst consists a row of ‘0’ and one
‘1’ to detect the beginning of the testword, the displayed
polarity in the timing_List is inverted.
If a sample increases the upper timing limit Tsample_max
(see table 17), it will not be displayed.
In this case, the displayed time TN and the polarity of the
next sample are invalid.
For all following samples, the displayed time TN is valid
but the displayed polarity is invalid.
If there is no transmitter signal, this will be indicated by
the error message ‘No signal received’.
10.0050
14157
Figure 53. Timing list
D‘Evaluation–µC_Limits’
Select the timing limits, used by the connected µC, to evaluate the proper timing of the data stream.
14158
Figure 54. µC_Limits
10.00 51
14159
111 0111 1
11 10111 0
Preburst Testword ( F hex )
Testword ( 7 hex )
Start of
measurement End of
measurement
Figure 55. Example of a telegram
Note:
The measurement (sampling) of the testword begins after
the falling edge of the bit ‘0’. The trigger condition is the
distance between the rising edge of the last ‘1’ in the
preburst and the falling edge of the ‘0’ at the end of the
preburst (tee). The trigger condition is valid if tee > lower
limit of 1/BR.This time is defined in the µC_Limits
window.
If the preburst is inverted (‘000 to 001’), the trigger
condition is the distance between the falling edge of the
last ‘0’ in the preburst and the rising edge of the ‘1’ at the
end of the preburst (tee).
In this case, the evaluation of the testword fails because
the software measures the distance between the following
63 edges (64 samples) but does not check the logic level.
This fact must be considered if a telegram is generated
with the pattern generator in the transmitter application
software.
Write
Function identical with the ‘WRITE’ button in the
‘Register–OPMODE’ window.
D‘Application’
‘POR’
Press the ‘POR’ button to generate a power -on reset on the
receiver application board (see LED H4 basic application
board). The register OPMODE and LIMIT will be set to
the default values. The U3741BM displays the reset
marker at Pin DATA (≈120 Hz).
‘Delete Reset Marker’
Delete the reset marker via a ‘L’ pulse (t1 ≥ 11.7 ms) at
Pin DATA.
‘Sleep (Stop Command)’
Set the U3741BM back to the sleep mode via a ‘L’ pulse
(t1 ≥ 3.2 ms) at Pin DATA.
‘Enable’
The level on Pin ENABLE can be switched between
‘VCC’ and ‘controlled’. If enable is connected to VCC,
no evaluation of the received data stream in the ‘Tele-
gram–Testword’, ‘Evaluation–Histogram’ and
‘Evaluation– Timing_List’ window is possible.
14160
Figure 56. Application
10.0052
D‘Default’
To operate with the receiver in the default configuration, open the ‘Default’ window and press the ‘WRITE’ button.
14161
Figure 57. Default configuration
D‘Com_Port’
Selection of the serial port (Com1 or Com2 ).
If the selected Com-Port is not available (e.g., used by
another program), this will be reported by the Com-Port
error message. In this case, the other Com-Port must be
selected.
The change of the Com-Port will initiate the reading of
the parameters on the transmitter application board and
the update of the corresponding windows.
If Com1 and Com2 are not available, select ‘Exit’, make
one Com-Port available and start the program again.
3.2.5 Exit of the Receiver Application
Software
Select ‘Exit’ to close the program.
10.00 53
3.2.6 Accuracy and Resolution of
the Telegram Evaluation
The evaluation of a telegram will be done by a µC on the
basic application board. The results of the evaluation can
be displayed in the receiver application software
(Testword OK, Limits_OK, Histogram, Duty Cycle,
Timing_List).
The following gives some information about the accuracy
and the resolution of the telegram evaluation.
DResolution
The resolution depends on the selected baudrate.
Table 20
BR_range [kBd] Resolution (rs) [µs]
1.0 to 1.8 8
1.8 to 3.2 4
3.2 to 5.6 2
5.6 to 10.0 1
DAccuracy
According to the resulting resolution the worst case
(accuracy) of a measured single time T is:
Measured Time Tmeas = T ± 1 rs – 0.5 µs
DDuty Cycle
The calculation method of the duty cycle displayed in
‘Evaluation–Histogram’ is shown by the equation below.
In case of n >>1, the statistical average of the accuracy is
in the range of ±0.2% (see paragraph ‘Telegram and its
Timing List’ on this page)
Telegram and its Timing List
14159
111 0111 1
11 10111 0
Preburst Testword ( F hex )
Testword ( 7 hex )
Start of
measurement End of
measurement
Figure 58. Example of a telegram
Figure 58 shows a possible timing of a short telegram.
The possible difference between the frame of the Man-
chester-encoded part and the frame processed by the
measuring µC can be seen.
Thus, the calculated value of the duty cycle as well as the
sample numbering may be affected.
Baudrate Margins
Recommended baudrate margins: 1.0 kBd to 10.0 kBd.
Use the appropriate BR_range settings in the ‘Telegram’–
window’ (transmitter application software).
Duty cycle DC +
ȍTH i meas
nH
i=1
ȍTH i meas )
nH
i=1 ȍTL i meas
nL
i=1
nH/L = number of High/Low samples
+
ȍ(THi "1rs–0.5ms)
nH
i=1
ȍ(THi "1rs–0.5ms) )
nH
i=1 ȍ(TLi "1rs–0.5ms)
nL
i=1
