CMOS linear image sensors
S11105 series
High-speed video data rate: 50 MHz
www.hamamatsu.com 1
The S11105 series is a CMOS linear image sensor that delivers a video data rate of 50 MHz. Two package styles are provided:
a DIP type and a surface mount type.
Video data rate: 50 MHz max. Position detection
Pixel size: 12.5 × 250 μm Image reading
512 pixels
Simultaneous charge integration for all pixels
Variable integration time function (electronic shutter function)
Single 5 V power supply operation
Built-in timing generator allows operation with only
start and clock pulse inputs
Two package styles are provided:
DIP (dual inline package) type: S11105
Surface mount type: S11105-01
Absolute maximum ratings
Structure
Parameter Symbol Condition Value Unit
Supply voltage Vdd Ta=25 °C -0.3 to +6 V
Clock pulse voltage V(CLK) Ta=25 °C -0.3 to +6 V
Start pulse voltage V(ST) Ta=25 °C -0.3 to +6 V
Operating temperature*1Topr -30 to +60 °C
Storage temperature*1Tstg -40 to +85 °C
*1: No condensation
Parameter Speci cation Unit
Number of pixels 512 -
Pixel size 12.5 × 250 μm
Photosensitive area length 6.4 mm
Package Ceramic -
Window material Tempax -
Features Applications
CMOS linear image sensors S11105 series
2
Recommended terminal voltage (Ta=25 °C)
Electrical characteristics [Ta=25 °C, Vdd=5 V, V(CLK)=V(ST)=5 V]
Electrical and optical characteristics [Ta=25 °C, Vdd=5 V, V(CLK)=V(ST)=5 V, f(CLK)=50 MHz]
Parameter Symbol Min. Typ. Max. Unit
Supply voltage Vdd 4.75 5 5.25 V
Clock pulse voltage High level V(CLK) 3 Vdd Vdd + 0.25 V
Low level 0 - 0.3 V
Start pulse voltage High level V(ST) 3 Vdd Vdd + 0.25 V
Low level 0 - 0.3 V
Parameter Symbol Min. Typ. Max. Unit
Clock pulse frequency f(CLK) 1 M - 50 M Hz
Video data rate VR - f(CLK) - Hz
Output impedance Zo 70 - 260 Ω
Consumption current*2 *3I 60 90 140 mA
*2: f(CLK)=50 MHz
*3: Consumption current increases as the clock pulse frequency increases. The consumption current is 70 mA typ. at f(CLK)=1 MHz.
Parameter Symbol Min. Typ. Max. Unit
Photo sensitivity*4R - 40 - V/(lx·s)
Spectral response range λ400 to 1000 nm
Peak sensitivity wavelength λp- 680 - nm
Conversion ef ciency*5CE - 0.6 - μV/e-
Dark output voltage*6Vd 0 1.0 3.5 mV
Saturation output voltage*7Vsat 0.7 1.3 1.9 V
Readout noise Nr 0.5 2.5 4.5 mV rms
Dynamic range 1*8DR1 - 520 - times
Dynamic range 2*9DR2 - 1300 - times
Output offset voltage Vo 0.6 1.2 1.8 V
Photo response non-uniformity*4 *10 PRNU - ±8 ±15 %
*4: Measured with a tungsten lamp of 2856 K
*5: Output voltage generated per one electron
*6: Integration time Ts=10 ms
*7: Difference from Vo
*8: DR1= Vsat/Nr
*9: DR2= Vsat/Vd
Integration time Ts=10 ms
Dark output voltage is proportional to the integration time and so the shorter the integration time, the wider the dynamic range.
*10: Photo response non-uniformity (PRNU) is the output non-uniformity that occurs when the entire pixel surface is uniformly
illuminated by light which is 50% of the saturation exposure level. It is de ned using 506 pixels excluding 3 pixels each at both
ends, as follows:
PRNU= ΔX/X × 100 (%)
X: average output of all pixels, ΔX: difference between X and maximum output or minimum output
Input terminal capacitance (Ta=25 °C, Vdd=5 V)
Parameter Symbol Min. Typ. Max. Unit
Clock pulse input terminal capacitance
C(CLK) - 5 - pF
Start pulse input terminal capacitance C(ST) - 5 - pF
CMOS linear image sensors S11105 series
Block diagram
KMPDC0312EA
Trig
Video
EOS
Charge amp array
Bias
generator
Hold circuit
Photodiode array
Shift register
CLK
ST
Timing
generator
3
Spectral response (typical example)
KMPDB0309EC
Wavelength (nm)
0
20
40
60
80
100
Relative sensitivity (%)
(Ta=25 °C)
400 600 800 1000
CMOS linear image sensors S11105 series
4
The timing for acquiring the video signal is synchronized with the falling edge of a trigger pulse.
f(CLK)=VR=1 MHz
f(CLK)=VR=50 MHz
GND
GND
1.2 V (output offset voltage)
2.5 V (saturation output
voltage=1.3 V)
GND
CLK
Trig
V
ideo
5 V/div.
5 V/div.
1 V/div.
5 ns/div.
GND
GND
1.4 V (output offset voltage)
2.7 V (saturation output
voltage=1.3 V)
GND
CLK
Trig
V
ideo
5 V/div.
5 V/div.
1 V/div.
200 ns/div.
Output waveform of one pixel
CMOS linear image sensors S11105 series
5
Timing chart
KMPDC0322EB
Parameter Symbol Min. Typ. Max. Unit
Start pulse width interval tpi(ST) 58/f(CLK) - 100 m s
Start pulse high period*11 thp(ST) 6/f(CLK) - - s
Start pulse low period tlp(ST) 52/f(CLK) - - s
Start pulse rise and fall times tr(ST), tf(ST) 0 5 7 ns
Clock pulse duty - 45 50 55 %
Clock pulse rise and fall times tr(CLK), tf(CLK) 0 5 7 ns
*11: The integration time equals the high period of ST.
The shift register starts operation at the rising edge of CLK immediately after ST goes low.
The integration time can be changed by changing the ratio of the high and low periods of ST.
If the rst Trig pulse after ST goes low is counted as the rst pulse, the Video signal of the rst channel is acquired at the falling
edge of the 49th Trig pulse.
1 2 3
512 5121
17 18 19 46 47 48 49 50 51
CLK
ST
Video
Trig
EOS
Integration time
thp(ST)
tlp(ST)
tpi(ST)
CLK
ST
tf(CLK) tr(CLK)
tf(ST) tr(ST)
tlp(ST) thp(ST)
tpi(ST)
CMOS linear image sensors S11105 series
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Operation example
thp(ST)=10.24 µs
tlp(ST)=1.04 µs
ST
tpi(ST)=11.28 µs (line rate 88.65 kHz)
KMPDC0407EA
When the clock pulse frequency is maximized (video data rate is also maximized), the time of one scan is minimized, and the integra-
tion time is maximized (for outputting signals from all 512 channels).
Clock pulse frequency = Video data rate = 50 MHz
Start pulse cycle = 564/f(CLK) = 564/50 MHz = 11.28 μs
High period of start pulse = Start pulse cycle - Start pulse’s low period min.
= 564/f(CLK) - 52/f(CLK) = 564/50 MHz - 52/50 MHz = 10.24 μs
Integration time is equal to the high period of start pulse, so it will be 10.24 μs.
For outputting signals from all 512 channels
For outputting signals from 1 to 32 channels
thp(ST)=0.64 µs
tlp(ST)=1.04 µs
ST
tpi(ST)=1.68 µs (line rate 595 kHz)
KMPDC0408EA
When the clock pulse frequency is maximized (video data rate is also maximized), and the integration time is maximized (for stopping
signals at channel 32).
Clock pulse frequency = Video data rate = 50 MHz
Start pulse cycle = 84/f(CLK) = 84/50 MHz = 1.68 μs
High period of start pulse = Start pulse cycle - Start pulse’s low period min.
= 84/f(CLK) - 52/f(CLK) = 84/50 MHz - 52/50 MHz = 0.64 μs
Integration time is equal to the high period of start pulse, so it will be 0.64 μs.
CMOS linear image sensors S11105 series
7
KMPDA0248EC
KMPDA0249EC
Dimensional outline (unit: mm, unless otherwise noted: ±0.1)
S11105
S11105-01
0.125 ± 0.2
10.4 ± 0.25
5.2 ± 0.2
3.6 ± 0.3
11
22
1
12
3.0 ± 0.3
5.0 ± 0.5
2.8 ± 0.3
31.75 ± 0.3
Photosensitive area
6.4 × 0.25
*1: Length from bottom surface
of package to photosensitive
surface
*2: Length from upper surface
of window to photosensitive
surface
*3: Window thickness
2.54 ± 0.13
0.51 ± 0.05
25.4 ± 0.13
1 ch
10.2 ± 0.25
1.4 ± 0.2*1
1.3 ± 0.2*2
0.25
Photosensitive
surface
0.5 ± 0.05*3
Photosensitive area
6.4 × 0.25
0.125 ± 0.2
9.0 ± 0.2
4.5 ± 0.2
3.6 ± 0.2
1 ch
2.8 ± 0.2
12.5 ± 0.2
18
16 9
*1: Length from bottom surface of package
to photosensitive surface
*2: Length from upper surface of window
to photosensitive surface
*3: Window thickness
(16 ×) 1.0
(16 ×) 0.6
1.27
916
81
8.89
(4 ×) R0.2
Index mark
0.5 ± 0.05*3
1.1 ± 0.2*2
0.9 ± 0.2*1
Photosensitive
surface
CMOS linear image sensors S11105 series
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Pin no. Symbol I/O Description Pin no. Symbol I/O Description
1 NC No connection 12 NC No connection
2 ST I Start pulse 13 NC No connection
3 CLK I Clock pulse 14 NC No connection
4 Vss GND 15 NC No connection
5 Vdd I Supply voltage 16 NC No connection
6 NC No connection 17 NC No connection
7 Trig O Trigger pulse for video signal
acquisition 18 NC No connection
8 Vdd I Supply voltage 19 NC No connection
9 Video O Video signal 20 NC No connection
10 EOS O End of scan 21 Vdd I Supply voltage
11 Vss GND 22 NC No connection
Pin no. Symbol I/O Description Pin no. Symbol I/O Description
1 Vss GND 9 Video O Video signal
2 Vdd I Supply voltage 10 EOS O End of scan
3 Vss GND 11 Vss GND
4 NC No connection 12 NC No connection
5 NC No connection 13 NC No connection
6 NC No connection 14 Vdd I Supply voltage
7 Trig O Trigger pulse for video signal
acquisition 15 ST I Start pulse
8 Vdd I Supply voltage 16 CLK I Clock pulse
Pin connections
S11105
S11105-01
Precautions
(1) Electrostatic countermeasures
This device has a built-in protection circuit against static electrical charges. However, to prevent destroying the device with electro-
static charges, take countermeasures such as grounding yourself, the workbench and tools to prevent static discharges. Also protect
this device from surge voltages which might be caused by peripheral equipment.
(2) Light input window
If the incident window is contaminated or scratched, the output uniformity will deteriorate considerably, so care should be taken in
handling the window. Avoid touching it with bare hands.
The window surface should be cleaned before using the device. If dry cloth or dry cotton swab is used to rub the window surface,
static electricity may be generated, and therefore this practice should be avoided. Use soft cloth, cotton swab or soft paper moist-
ened with ethyl alcohol to wipe off dirt and foreign matter on the window surface.
(3) Soldering
To prevent damaging the device during soldering, take precautions to prevent excessive soldering temperatures and times. Solder-
ing should be performed within 5 seconds at a soldering temperature below 260 °C.
(4) Re ow soldering (S11105-01)
Soldering conditions may differ depending on the board size, re ow furnace, etc. Check the conditions before soldering. A sudden
temperature rise and cooling may be the cause of trouble, so make sure that the temperature change is within 4 °C per second.
The bonding portion between the ceramic base and the glass may discolor after re ow soldering, but this has no adverse effects on
the hermetic sealing of the product.
(5) Operating and storage environments
Handle the device within the temperature range speci ed in the absolute maximum ratings. Operating or storing the device at an
excessively high temperature and humidity may cause variations in performance characteristics and must be avoided.
(6) UV exposure
This product is not designed to prevent deterioration of characteristics caused by UV exposure, so do not expose it to UV
light.
CMOS linear image sensors S11105 series
Cat. No. KMPD1111E04 Oct. 2011 DN
www.hamamatsu.com
HAMAMATSU PHOTONICS K.K., Solid State Division
1126-1 Ichino-cho, Higashi-ku, Hamamatsu City, 435-8558 Japan, Telephone: (81) 53-434-3311, Fax: (81) 53-434-5184
U.S.A.: Hamamatsu Corporation: 360 Foothill Road, P.O.Box 6910, Bridgewater, N.J. 08807-0910, U.S.A., Telephone: (1) 908-231-0960, Fax: (1) 908-231-1218
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France: Hamamatsu Photonics France S.A.R.L.: 19, Rue du Saule Trapu, Parc du Moulin de Massy, 91882 Massy Cedex, France, Telephone: 33-(1) 69 53 71 00, Fax: 33-(1) 69 53 71 10
United Kingdom: Hamamatsu Photonics UK Limited: 2 Howard Court, 10 Tewin Road, Welwyn Garden City, Hertfordshire AL7 1BW, United Kingdom, Telephone: (44) 1707-294888, Fax: (44) 1707-325777
North Europe: Hamamatsu Photonics Norden AB: Smidesvägen 12, SE-171 41 Solna, Sweden, Telephone: (46) 8-509-031-00, Fax: (46) 8-509-031-01
Italy: Hamamatsu Photonics Italia S.R.L.: Strada della Moia, 1 int. 6, 20020 Arese, (Milano), Italy, Telephone: (39) 02-935-81-733, Fax: (39) 02-935-81-741
Product specifications are subject to change without prior notice due to improvements or other reasons. Before assembly into final products, please contact
us for the delivery specification sheet to check the latest information.
T
ype numbers of products listed in the delivery specification sheets or supplied as samples may have a suffix "(X)" which means preliminary specifications or
a suffix "(Z)" which means developmental specifications.
T
he product warranty is valid for one year after delivery and is limited to product repair or replacement for defects discovered and reported to us within that
one year period. However, even if within the warranty period we accept absolutely no liability for any loss caused by natural disasters or improper product
use.
Copying or reprinting the contents described in this material in whole or in part is prohibited without our prior permission.
Information described in this material is current as of October, 2011.
9
Recommended solder reflow condition (S11105-01)
Temperature (°C)
Time (s)
0
50
100
150
250
200
300
0 50 100 150 200 250 300
Peak temperature 240 °C max.
KAPDB0169EA