© Semiconductor Components Industries, LLC, 2016
January, 2018 − Rev. 5 1Publication Order Number:
NCP130/D
NCP130
300 mA, Very Low Dropout
Bias Rail CMOS Voltage
Regulator
The NCP130 is a 300 mA VLDO equipped with NMOS pass
transistor and a separate bias supply voltage (VBIAS). The device
provides very stable, accurate output voltage with low noise suitable
for space constrained, noise sensitive applications. In order to
optimize performance for battery operated portable applications, the
NCP130 features low IQ consumption. The XDFN6 1.2 mm x 1.2 mm
package is optimized for use in space constrained applications.
Features
Input Voltage Range: 0.8 V to 5.5 V
Bias Voltage Range: 2.4 V to 5.5 V
Fixed Output Voltage Device
Output Voltage Range: 0.8 V to 2.1 V
±1.5% Accuracy over Temperature, 0.5% VOUT @ 25°C
Ultra−Low Dropout: 150 mV Maximum at 300 mA
Very Low Bias Input Current of Typ. 80 mA
Very Low Bias Input Current in Disable Mode: Typ. 0.5 mA
Logic Level Enable Input for ON/OFF Control
Output Active Discharge Option Available
Stable with a 1 mF Ceramic Capacitor
Available in XDFN6 − 1.2 mm x 1.2 mm x 0.37 mm Package
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Typical Applications
Battery−powered Equipment
Smartphones, Tablets
Cameras, DVRs, STB and Camcorders
BIAS
IN
EN
OUT
GND
1 mF
VOUT
1.0 V @ 300 mA
VBIAS
2.7 V
VIN
1.3 V
VEN
1 mF
100 nF NCP130
Figure 1. Typical Application Schematics
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See detailed ordering, marking and shipping information on
page 8 of this data sheet.
ORDERING INFORMATION
MARKING
DIAGRAM
XDFN6
CASE 711AT
PIN CONNECTIONS
Thermal
T
Pad
1
2
3
6
5
4
OUT
NC
EN
IN
GND
BIAS
(Top VIew)
XX M
XX = Specific Device Code
M = Date Code
NCP130
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2
EN
CURRENT
LIMIT
THERMAL
LIMIT
UVLO
+
VOLTAGE
REFERENCE
IN
BIAS
GND
OUT
*Active
DISCHARGE
ENABLE
BLOCK
*Active output discharge function is present only in NCP130AMXyyyTCG devices.
yyy denotes the particular output voltage option.
Figure 2. Simplified Schematic Block Diagram
150 W
PIN FUNCTION DESCRIPTION
Pin No. Pin Name Description
1 OUT Regulated Output Voltage pin
2 N/C Not internally connected
3 EN Enable pin. Driving this pin high enables the regulator. Driving this pin low puts the regulator into shutdown mode.
4 BIAS Bias voltage supply for internal control circuits. This pin is monitored by internal Under-Voltage Lockout Circuit.
5 GND Ground pin
6 IN Input Voltage Supply pin
Pad Should be soldered to the ground plane for increased thermal performance.
ABSOLUTE MAXIMUM RATINGS
Rating Symbol Value Unit
Input Voltage (Note 1) VIN −0.3 to 6 V
Output Voltage VOUT −0.3 to (VIN+0.3) 6 V
Chip Enable and Bias Input VEN, VBIAS −0.3 to 6 V
Output Short Circuit Duration tSC unlimited s
Maximum Junction Temperature TJ150 °C
Storage Temperature TSTG −55 to 150 °C
ESD Capability, Human Body Model (Note 2) ESDHBM 2000 V
ESD Capability, Machine Model (Note 2) ESDMM 200 V
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be af fected.
1. Refer to ELECTRICAL CHARACTERISTIS and APPLICATION INFORMATION for Safe Operating Area.
2. This device series incorporates ESD protection (except OUT pin) and is tested by the following methods:
ESD Human Body Model tested per EIA/JESD22−A114
ESD Machine Model tested per EIA/JESD22−A115
Latchup Current Maximum Rating tested per JEDEC standard: JESD78.
THERMAL CHARACTERISTICS
Rating Symbol Value Unit
Thermal Characteristics, XDFN6 1.2 mm x 1.2 mm Thermal Resistance, Junction−to−Air RqJA 170 °C/W
NCP130
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ELECTRICAL CHARACTERISTICS
−40°C TJ 85°C; VBIAS = 2.7 V or (VOUT + 1.6 V), whichever is greater, VIN = VOUT(NOM) + 0.3 V, IOUT = 1 mA, VEN = 1 V, unless
otherwise noted. CIN = 1 mF, CBIAS = 0.1 mF, COUT = 1 mF (effective capacitance) (Note 3). Typical values are at TJ = +25°C. Min/Max
values are for −40°C TJ 85°C unless otherwise noted. (Note 4)
Parameter Test Conditions Symbol Min Typ Max Unit
Operating Input
Voltage Range VIN VOUT+VDO 5.5 V
Operating Bias Voltage
Range VBIAS (VOUT+1.35)
2.4 5.5 V
Undervoltage Lock−out VBIAS Rising
Hysteresis UVLO 1.6
0.2 V
Output Voltage
Accuracy −40°C TJ 85°C, VOUT(NOM) + 0.3 V VIN
5.0 V, 2.7 V or (VOUT(NOM) + 1.6 V), whichever is
greater < VBIAS < 5.5 V, 1 mA < IOUT < 300 mA
VOUT −1.5 +1.5 %
Output Voltage
Accuracy VOUT ±0.5 %
VIN Line Regulation VOUT(NOM) + 0.3 V VIN 5.0 V LineReg 0.01 %/V
VBIAS Line Regulation 2.7 V or (VOUT(NOM) + 1.6 V), whichever is
greater < VBIAS < 5.5 V LineReg 0.01 %/V
Load Regulation IOUT = 1 mA to 300 mA LoadReg 1.5 mV
VIN Dropout Voltage IOUT = 300 mA (Note 5) VDO 75 150 mV
VBIAS Dropout Voltage IOUT = 300 mA, VIN = VBIAS (Note 5) VDO 1.1 1.4 V
Output Current Limit VOUT = 90% VOUT(NOM) ICL 400 550 850 mA
Bias Pin Operating
Current VBIAS = 2.7 V IBIAS 80 110 mA
Bias Pin Disable
Current VEN 0.4 V IBIAS(DIS) 0.5 1 mA
Vinput Pin Disable
Current VEN 0.4 V IVIN(DIS) 0.5 1 mA
EN Pin Threshold
Voltage EN Input Voltage “H” VEN(H) 0.9 V
EN Input Voltage “L” VEN(L) 0.4
EN Pull Down Current VEN = 5.5 V IEN 0.3 1.0 mA
T urn−On Time COUT = 1 mF, From assertion of VEN to
VOUT = 98% VOUT(NOM), VOUT(NOM) = 1.05 V tON 150 ms
Power Supply
Rejection Ratio VIN to VOUT, f = 1 kHz, IOUT = 300 mA,
VIN VOUT +0.5 V PSRR(VIN) 65 dB
VBIAS to VOUT, f = 1 kHz, IOUT = 300 mA,
VIN VOUT +0.5 V PSRR(VBIAS) 80 dB
Output Noise Voltage VIN = VOUT +0.5 V, VOUT(NOM) = 1.05 V,
f = 10 Hz to 100 kHz VN40 mVRMS
Thermal Shutdown
Threshold Temperature increasing 160 °C
Temperature decreasing 140
Output Discharge
Pull−Down VEN 0.4 V, VOUT = 0.5 V,
NCP130A options only RDISCH 150 W
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. Effective capacitance, including the effect of DC bias, tolerance and temperature. See the Application Information section for more
information.
4. Performance g u a r anteed over the indicated operating temperature range by design and/or characterization. Production tested at TA = 25°C.
Low duty cycle pulse techniques are used during the testing to maintain the junction temperature as close to ambient as possible.
5. Dropout voltage is characterized when VOUT falls 3% below VOUT(NOM).
NCP130
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4
APPLICATIONS INFORMATION
IN
EN FB
LX
GND
Processor
I/O
BIAS
IN
OUT
GND
NCP130
LOAD
VBAT
2.6 V − 4.2 V.
1.3 V
1.0 V
To other circuits
I/O
EN
Figure 3. Typical Application: Low−Voltage Post−Regulator with ON/OFF functionality
DC/DC
1.3 V VOUT(NOM)
NCP130
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5
TYPICAL CHARACTERISTICS
At TJ = +25°C, VIN = VOUT(TYP) + 0.3 V, VBIAS = 2.7 V, VEN = VBIAS, VOUT(NOM) = 1.05 V, IOUT = 300 mA,
CIN = 1 mF, CBIAS = 0.1 mF, and COUT = 1 mF (effective capacitance), unless otherwise noted.
Figure 4. VIN Dropout Voltage vs. IOUT and
Temperature TJ
Figure 5. VIN Dropout Voltage vs. (VBIAS
VOUT) and Temperature TJ
IOUT, OUTPUT CURRENT (mA) VBIAS − VOUT (V)
3002001000
0
10
20
30
40
50
60
4.03.53.02.52.01.51.00.5
0
50
100
200
250
V
DO
(V
IN
− V
OUT
) DROPOUT VOLTAGE (mV)
+125°C
+25°C
−40°C
4.
5
150
300
+125°C
+25°C−40°C
IOUT = 300 mA
VDO (VIN − VOUT) DROPOUT VOLTAGE (mV)
Figure 6. VIN Dropout Voltage vs. (VBIAS
VOUT) and Temperature TJ
Figure 7. VBIAS Dropout Voltage vs. IOUT and
Temperature TJ
VBIAS − VOUT (V) IOUT, OUTPUT CURRENT (mA)
4.03.53.02.52.01.51.00.5
0
20
60
80
120
140
180
200
3
00
2001000
800
900
1000
1100
1200
1300
1400
Figure 8. BIAS Pin Current vs. IOUT and
Temperature T
J
Figure 9. BIAS Pin Current vs. VBIAS and
Temperature T
J
IOUT, OUTPUT CURRENT (mA) VBIAS (V)
3002001000
0
20
60
80
120
140
5.04.54.0 5
.5
3.53.02.52.0
0
20
60
80
100
140
180
200
V
DO
(V
IN
− V
OUT
) DROPOUT VOLTAGE (mV)
I
BIAS
(
m
A)
IBIAS (mA)
4.5
IOUT = 100 mA
40
100
160
VDO (VBIAS − VOUT) DROPOUT VOLTAGE (mV)
+125°C
+25°C
−40°C
40
100
+125°C
+85°C
−40°C
40
120
160
70
80
90
100
+85°C
25015050
+85°C
25015050
+85°C
+25°C
25015050
+125°C+25°C−40°C
+85°C
+125°C
+85°C
−40°C+25°C
NCP130
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TYPICAL CHARACTERISTICS
At TJ = +25°C, VIN = VOUT(TYP) + 0.3 V, VBIAS = 2.7 V, VEN = VBIAS, VOUT(NOM) = 1.05 V, IOUT = 300 mA,
CIN = 1 mF, CBIAS = 0.1 mF, and COUT = 1 mF (effective capacitance), unless otherwise noted.
Figure 10. Current Limit vs. (VBIAS − VOUT)
VBIAS − VOUT (V)
4.54.03.02.51.51.00.50
0
100
300
400
500
700
800
ICL, CURRENT LIMIT (mA)
+125°C
+25°C
−40°C
2.0 3.5 5.0
200
600 +85°C
NCP130
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APPLICATIONS INFORMATION
The NCP130 dual−rail very low dropout voltage regulator
is using NMOS pass transistor for output voltage regulation
from VIN voltage. All the low current internal controll
circuitry is powered from the VBIAS voltage.
The use of an NMOS pass transistor offers several
advantages in applications. Unlike a PMOS topology
devices, the output capacitor has reduced impact on loop
stability. VIN to VOUT operating voltage difference can be
very low compared with standard PMOS regulators in very
low VIN applications.
The NCP130 offers smooth monotonic start-up. The
controlled voltage rising limits the inrush current.
The Enable (EN) input is equipped with internal
hysteresis.
NCP130 is a Fixed Voltage linear regulator.
Dropout Voltage
Because of two power supply inputs VIN and VBIAS and
one VOUT regulator output, there are two Dropout voltages
specified.
The first, the VIN Dropout voltage is the voltage
difference (VIN – VOUT) when VOUT starts to decrease by
percents specified in the Electrical Characteristics table.
VBIAS is high enough, specific value is published in the
Electrical Characteristics table.
The second, VBIAS dropout voltage is the voltage
difference (VBIAS – VOUT) when VIN and VBIAS pins are
joined together and VOUT starts to decrease.
Input and Output Capacitors
The device is designed to be stable for ceramic output
capacitors with Ef fective capacitance in the range from 1 mF
to 10 mF. The device is also stable with multiple capacitors
in parallel, having the total effective capacitance in the
specified range.
In applications where no low input supplies impedance
available (PCB inductance in VIN and/or VBIAS inputs as
example), the recommended CIN = 1 mF and CBIAS = 0.1 mF
or greater. Ceramic capacitors are recommended. For the
best performance all the capacitors should be connected to
the NCP130 respective pins directly in the device PCB
copper layer, not through vias having not negligible
impedance.
When using small ceramic capacitor, their capacitance is
not constant but varies with applied DC biasing voltage,
temperature and tolerance. The effective capacitance can be
much lower than their nominal capacitance value, most
importantly in negative temperatures and higher LDO
output voltages. That is why the recommended Output
capacitor capacitance value is specified as Effective value in
the specific application conditions.
Enable Operation
The enable pin will turn the regulator on or off. The
threshold limits are covered in the electrical characteristics
table i n this data sheet. If the enable function is not to be used
then the pin should be connected to VIN or VBIAS.
Current Limitation
The internal Current Limitation circuitry allows the
device to supply the full nominal current and surges but
protects the device against Current Overload or Short.
Thermal Protection
Internal thermal shutdown (TSD) circuitry is provided to
protect the integrated circuit in the event that the maximum
junction temperature is exceeded. When TSD activated , the
regulator output turns of f. When cooling down under the low
temperature threshold, device output is activated again. This
TSD feature is provided to prevent failures from accidental
overheating.
NCP130
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ORDERING INFORMATION
Device
Nominal
Output
Voltage Marking Marking
Rotation Option Package Shipping
NCP130AMX080TCG 0.80 V Q 180°
Output Active Discharge
XDFN6
(Pb−Free) 3000 / Tape & Reel
NCP130AMX090TCG 0.90 V EA No rotation
NCP130AMX100TCG 1.00 V EC No rotation
NCP130AMX105TCG 1.05 V R 180°
NCP130AMX110TCG 1.10 V T 180°
NCP130AMX115TCG 1.15 V V 180°
NCP130AMX120TCG 1.20 V Y 180°
NCP130AMX150TCG 1.50 V 2 180°
NCP130AMX170TCG 1.70 V ED No rotation
NCP130AMX180TCG 1.80 V 3 180°
NCP130AMX210TCG 2.10 V 4 180°
NCP130BMX080TCG 0.80 V Q 270°
Non−Active Discharge
NCP130BMX090TCG 0.90 V HA No rotation
NCP130BMX100TCG 1.00 V HC No rotation
NCP130BMX105TCG 1.05 V R 270°
NCP130BMX110TCG 1.10 V T 270°
NCP130BMX115TCG 1.15 V V 270°
NCP130BMX120TCG 1.20 V Y 270°
NCP130BMX150TCG 1.50 V 2 270°
NCP130BMX170TCG 1.70 V HD No rotation
NCP130BMX180TCG 1.80 V 3 270°
NCP130BMX210TCG 2.10 V 4 270°
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Spe-
cifications Brochure, BRD8011/D.
To order other package and voltage variants, please contact your ON sales representative
NCP130
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9
PACKAGE DIMENSIONS
XDFN6 1.20x1.20, 0.40P
CASE 711AT
ISSUE C
ÍÍÍ
ÍÍÍ
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO THE PLATED
TERMINALS.
4. COPLANARITY APPLIES TO THE PAD AS
WELL AS THE TERMINALS.
A
SEATING
PLANE
A
A1
DIM
A
MIN TYP
MILLIMETERS
0.30 0.37
A1 0.00 0.03
b0.13 0.18
D
E
e
L
PIN ONE
REFERENCE
0.05 C
0.05 C
NOTE 3
L
eb
3
66X
1
4
MOUNTING FOOTPRINT*
0.15 0.20
BOTTOM VIEW
E2
DIMENSIONS: MILLIMETERS
0.37
6X
0.24
6X
1.40
0.40
PITCH
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
E2 0.20 0.30
TOP VIEW
B
SIDE VIEW
NOTE 4
RECOMMENDED
C
6X
A
M
0.10 BC
PACKAGE
OUTLINE
D2 0.84 0.94
L1
1.20
1.20
0.40 BSC
0.05
D2
1.08
0.40
D
E
DET AIL A
1
L1
6X
MAX
0.45
0.05
0.23
0.25
0.40
1.04
1.15 1.25
1.15 1.25
0.00 0.10
DETAIL A
OPTIONAL
CONSTRUCTION
L
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NCP130/D
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