NCV7680PWR2GEVB - ON Semiconductor

March, 2013 − Rev. 6

1Publication Order Number:

NCV7680/D

NCV7680

Linear Current Regulator

and Controller for

Automotive LED Rear

Combination Lamps

The NCV7680 consists of eight linear programmable constant

current sources. The part is designed for use in the regulation and

control of LED based Rear Combination Lamps for automotive

applications. System design with the NCV7680 allows for two

brightness levels, one for stop and one for tail illumination, or optional

PWM control can also be implemented.

Discrete LED brightness levels are easily programmed (stop current

value, tail duty cycle value) optional external ballast FET allows for

power distribution on designs requiring high currents. Set back power

limit reduces the drive current during overvoltage conditions. This is

most useful for low current applications when no external FET is used.

Features

•Constant Current Outputs for LED String Drive

•LED Drive Current up to 75 mA per Channel

•Open LED String Diagnostic with Open−Drain Output

•Slew Rate Control Eliminates EMI Concerns

•Low Dropout Operation for Pre−Regulator Applications

•External Modulation Capable

•On−chip 1 kHz Tail PWM Dimming

•Single Resistor for Stop Current Set Point

•Single Resistor for Tail Dimming Set Point

•Overvoltage Set Back Power Limitation

•AEC Q100 Qualified

•16 Lead SOICW Exposed Pad

•This is a Pb−Free Device

Applications

•Rear Combination Lamps (RCL)

•Daytime Running Lights (DRL)

•Fog Lights

•Center High Mounted Stop Lamps (CHMSL) Arrays

•Turn Signal and Other Externally Modulated Applications

•LCD Back Lighting

MARKING

DIAGRAM

A = Assembly Location

WL = Wafer Lot

YY = Year

WW = Work Week

G = Pb−Free Device

SOIC−16 WB

PW SUFFIX

CASE 751AG

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Device Package Shipping†

ORDERING INFORMATION

NCV7680PWR2G SOIC−16WB

(Pb−Free)

1000 /

Tape & Reel

V7680

AWLYYWWG

†For information on tape and reel specifications,

including part orientation and tape sizes, please

refer to our Tape and Reel Packaging Specifications

Brochure, BRD8011/D.

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Figure 1. Simple Block Diagram

Out1

Out8

Out7

Out6

Out5

Out4

Out3

Out2

Ballast

Drive

STOP

DIAG

GND

RSTOP RTAIL

FET Drive

1.05 V

Output Control

Ballast Drive

Regulation Control

Diagnostic

Reporting

(high reporting)

Open Circuit

Rstop Current Limit

Overvoltage Set Back Current

(down 20%)

Output Current

Current

Programming

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Figure 2. Detailed Block Diagram

Channel

Control

Output

Disable

Open

Circuit

Detect

Oscillator

and PWM

IRSTOP x 100

DIAG

Interface

Overtemperature &

Overvoltage sense

OUT1

Ballast

Drive

STOP

DIAG GND

RSTOP RTAIL

OUT2

OUT3

OUT4

OUT5

OUT6

OUT7

OUT8

Control

Logic

V−I

Converter

Current

Limit 4.4 V

0.4 V

FET Drive

100k

1.05 V

200k

Soft Start,

Bias, and Reference

Overvoltage

1 of 8

−

400 mV

100 mV

Setback

Current

−20%

Vreg

Irstop

Rtail

−

Figure 3. Pinout Diagram

OUT1 OUT2

OUT3

OUT4

OUT5

OUT6

OUT7

OUT8

GND

RTAIL

RSTOP

DIAG

STOP/PWM

Ballast Drive

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OUT1

NCV7680

OUT2

OUT3

OUT4

OUT5

OUT6

OUT7

OUT8

GND

RTAIL

RSTOP

DIAG

STOP/PWM

Ballast Drive

100nF

MRA4003T3G

10k

10nF

R5, 2.21k

R4, 3.09k

8.87k

R1 limits the current out of STOP/PWM during reverse battery condition.

R6 and R7 values shown yield 10.5 V regulation on VSTRING.

C1 is for line noise considerations.

C3 is for EMS considerations.

Figure 4. Application Diagram with External FET Ballast Transistor

0.22mF

0.1mF

epad

TAIL Input

STOP Input

VSTRING

Vref

NTD2955

Figure 5. Application Diagram without the FET Ballast Transistor

OUT1

NCV7680

OUT2

OUT3

OUT4

OUT5

OUT6

OUT7

OUT8

GND

RTAIL

RSTOP

DIAG

STOP/PWM

Ballast Drive

100nF

MRA4003T3G

10k

10nF

R5, 2.21k

R4, 3.09k

10k

TAIL Input

STOP Input

epad

When using the NCV7680 without the FET ballast transistor, tie the FB Pin to VP through a 10k resistor.

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Table 1. APPLICATION I/O TRUTH TABLE (FB = Vref) (Reference Figure 2)

Stop Input Tail Input

OUTX Current

(1−8) Fault State* DIAG State

0 0 OFF −HIGHZ**

1 0 ISTOP NORMAL LOW

1 0 ISTOP OPEN CIRCUIT*** HIGH**

0 1 PWM DO NOT CARE HIGH**

1 1 ISTOP NORMAL LOW

1 1 ISTOP OPEN CIRCUIT*** HIGH**

* Open Circuit, RSTOP Current Limit, and Set Back Current Limit down 20%

** Pullup resistor to DIAG

*** OPEN CIRCUIT = Any string open

0 = LOW

1 = HIGH

TAIL

STOP

DIAG

Open String Occurs Open String OccursOpen String Removed

Figure 6. DIAG Timing Diagram

HIGHZ

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Table 2. PIN FUNCTION DESCRIPTION (16 Pin SO Wide Exposed Pad Package)

Pin # Label Description

1 OUT1 Channel 1 constant current output to LED.

Unused pin should be grounded.

2 VP Supply Voltage Input.

3Ballast Drive Gate drive for external power distribution PFET.

Ground if not used.

4 FB Feedback Sense node for VP regulation.

Use feedback resistor divider or connect to VP with a 10k resistor.

5 STOP/PWM Stop Logic Input. External Modulation Input.

6 DIAG Open−drain diagnostic output.

Reporting Open Circuit, RSTOP Current Limit,

and Overvoltage Set Back Current down 20%.

Normal Operation = LOW.

Ground if not used.

7 RSTOP Stop current bias program resistor.

8 RTAIL Tail current duty cycle PWM program resistor.

Ground if using external modulation.

9 OUT8 Channel 8 constant current output to LED.

Unused pin should be grounded.

10 OUT7 Channel 7 constant current output to LED.

Unused pin should be grounded.

11 OUT6 Channel 6 constant current output to LED.

Unused pin should be grounded.

12 OUT5 Channel 5 constant current output to LED.

Unused pin should be grounded.

13 GND Ground.

14 OUT4 Channel 4 constant current output to LED.

Unused pin should be grounded.

15 OUT3 Channel 3 constant current output to LED.

Unused pin should be grounded.

16 OUT2 Channel 2 constant current output to LED.

Unused pin should be grounded.

epad* epad Ground. Do not connect to pcb traces other than GND.

*Grounding will provide better thermal and electrical performance.

MAXIMUM RATINGS (Voltages are with respect to device substrate)

Rating Value Unit

VP, Ballast Drive, STOP, DIAG

Peak Transient

−0.3 to 45

Output Pin Voltage (OUTX) −0.3 to 45 V

Output Pin Current (OUTX) 100 mA

Input Voltage (RTAIL, RSTOP, FB) −0.3 to 5 V

Junction Temperature, TJ−40 to 150 °C

Peak Reflow Soldering Temperature: Pb−Free

60 to 150 seconds at 217°C (Note 1)

260 peak °C

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the

Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect

device reliability.

1. For additional information, see or download ON Semiconductor’s Soldering and Mounting Techniques Reference Manual, SOLDERRM/D,

and Application Note AND8003/D.

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Table 3. ATTRIBUTES

Characteristics Value

ESD Capability Human Body Model (RSTOP Pin)

Human Body Model (All Remaining Pins)

Machine Model

> $1.8 kV

> $2.0 kV

> $200 V

Moisture Sensitivity Level (Note 2) MSL 1

Storage Temperature −55°C to 150°C

Package Thermal Resistance (Note 3)

Junction−to−Board (RYJB)

Junction−to−Ambient (RqJA)

Junction−to−Pin (RYJL)

27°C/W

78°C/W

38°C/W

Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test

2. For additional information, see or download ON Semiconductor’s Soldering and Mounting Tech-

niques Reference Manual, SOLDERRM/D, and Application Note AND8003/D.

3. Values represent typical still air steady−state thermal performance on 1 oz. copper FR4 PCB with

650 mm2 copper area.

ELECTRICAL CHARACTERISTICS (6 V < VP < 16 V, VSTOP = VP

, RSTOP = 3.09 kW, RTAIL = 2.21 kW, −40°C v TJ v 150°C, unless

otherwise specified) (Note 4)

Characteristic Conditions Min Typ Max Unit

GENERAL PARAMETERS

Quiescent Current (IOUTx = 35 mA)

STOP Mode, 8 Channel

STOP Mode, 4 Channel

Tail Mode

VP = 16 V

VP = 16 V, OUT5 = OUT6 = OUT7 = OUT8 = GND

VP = 16 V

−

6.5

6.4

6.0

8.0

CURRENT SOURCE OUTPUTS

Output Current OUTX = 1.0 V, TJ = 25°C, 150°C

OUTX = 1.0 V, TJ = −40°C

31.5

30.8

38.5

39.2

Maximum Regulated Output

Current

75 − − mA

Current Matching −40°C

25°C

150°Cƪ2IOUTx(min)

IOUTx(min) )IOUTx(max) *1ƫ 100

ƪ2IOUTx(max)

IOUTx(min) )IOUTx(max) *1ƫ 100

−7

−6

−5

Line Regulation 6 V v VP v 16 V −0.6 3.0 mA

Open Circuit Detection Threshold 0.3 0.4 0.5 V

Current Slew Rate IOUT = 35 mA, 10% to 90% Points −6.0 25 mA/us

Overvoltage Set Back Threshold @ 99% IOUT 16.0 18.7 24.5 V

Overvoltage Set Back Current VP = 20 V −94 −%IOUT

Diag Reporting of Set Back

Current

−80 −%IOUT

Output Disable Threshold −100 250 mV

FET DRIVER

Ballast Drive

Leakage Current

Sink Current

FB = 1.5 V, Ballast Drive = 3 V

FB = 0.5 V, Ballast Drive = 3 V

−

Ballast Drive Reference Voltage 0.95 1.05 1.15 V

4. Designed to meet these characteristics over the stated voltage and temperature recommended operating ranges, though may not be 100%

parametrically tested in production.

5. Guaranteed by design.

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ELECTRICAL CHARACTERISTICS (6 V < VP < 16 V, VSTOP = VP

, RSTOP = 3.09 kW, RTAIL = 2.21 kW, −40°C v TJ v 150°C, unless

otherwise specified) (Note 4)

Characteristic UnitMaxTypMinConditions

STOP LOGIC

Input High Threshold 1.6 1.9 2.2 V

Input Low Threshold 0.7 0.85 1.1 V

VIN Hysteresis −1.05 −V

Input Bias Current STOP = 14 V 0 150 300 mA

PROGRAMMING

RSTOP Bias Voltage Stop Current Programming Voltage 0.96 1.08 1.21 V

RSTOP K multiplier IOUTX / IRSTOP −100 − −

RSTOP Current Limit −1.8 2.2 mA

RTAIL Bias Current Tail Duty Cycle Programming Current 300 350 450 mA

Duty Cycle RTAIL = 0.59 V

RTAIL = 1.21 V

RTAIL = 3.29 V

3.5

59.5

5.0

6.5

80.5

DIAG OUTPUT

Output Low Voltage DIAG Active, IDIAG =1 mA −0.1 0.40 V

Output Leakage Current VDIAG = 5 V − − 10 mA

THERMAL LIMIT

Thermal Limit Temperature OUTx Reduction Initiated @ 99% IOUT (Note 5) 150 − − °C

Thermal Shutdown (Note 5) 150 190 −°C

Thermal Hysteresis (Note 5) −15 −°C

4. Designed to meet these characteristics over the stated voltage and temperature recommended operating ranges, though may not be 100%

parametrically tested in production.

5. Guaranteed by design.

AC CHARACTERISTICS (6 V < VP < 16 V, VSTOP = VP

, RSTOP = 3.09 kW, RTAIL = 2.21 kW, −40°C v TJ v 150°C, unless otherwise

specified)

Characteristic Conditions Min Typ Max Unit

Stop Turn−on Delay Time VSTOP/PWM 90% to IOUTX 90% −14 45 ms

Stop Turn−off Delay Time VSTOP/PWM 10% to IOUTX 10% −21 45 ms

PWM Frequency STOP = 0 V 0.5 1.0 2.1 kHz

Tail Frequency Stabilization Time VP step from 0 V to 6 V −2.0 4.0 ms

Open Circuit to DIAG Reporting −4.0 10 ms

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TYPICAL PERFORMANCE CHARACTERISTICS

qJA MAXIMUM (°C/W)

COPPER HEAT SPREADER AREA (2mm)

Figure 7. qJA vs. Copper Spreader Area

0.1

100

1000

0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000

R(t) MAXIMUM (°C/W)

PULSE TIME (s)

Figure 8. Thermal Duty Cycle Curves on 650 mm2 Spreader Test Board

D = 0.5

0.2

0.1

SINGLE PULSE

0.05

0.02

0.01

Figure 9. Single Pulse Heating Curve

PULSE TIME (s)

R(t) MAXIMUM (°C/W)

0.1

100

1000

0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000

50 mm2

100 mm2

500 mm2

100

120

140

160

0 100 200 300 400 500 600 700

1 oz

2 oz

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Figure 10. IOUT vs. RSTOP

RSTOP (kW)

RTAIL (kW)

4.0 5.03.02.01.51.00.50

643210

IOUT

, OUTPUT CURRENT (mA)

DUTY CYCLE (%)

2.5 3.5 4.5

T = 25°C

Figure 11. IOUT vs. Temperature

TEMPERATURE (°C)

120 1608040200−20−40

33.5

34.5

35.5

IOUT

, OUTPUT CURRENT (mA)

60 100 140

Figure 12. Duty Cycle vs. RTAIL

RSTOP = 3.09 kW

DUTY CYCLE (%)

Figure 13. Duty Cycle vs. V(RTAIL)

TEMPERATURE (°C)

120 1608040 60 100 140

RTAIL = 4 kW

RTAIL = 3 kW

RTAIL = 2 kW

Figure 14. Duty Cycle vs. Temperature Figure 15. IOUT vs. VP

VP (V)

211715119272523

IOUT

, OUTPUT CURRENT (mA)

13 19

10879

0−40 −20 20

RSTOP = 3.09 kW

V(RTAIL)

321.510.50

DUTY CYCLE (%)

2.5 3.5

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IRSTOP (mA)

2.52.01.51.00.50

100

120

IOUT (mA)

OUTx current is limited

during short circuit events of

RSTOP

. The current rolls off

per the diagram to prevent

unexpected excessive

power dissipation.

R6 (W)

1200080006000400020000

VSTRING (V)

10000

per eq. 1

R7 = 1K

Figure 16. VP Line Regulation Figure 17. VSTRING vs. R6

Figure 18. IOUT vs. IRSTOP

151312109876

34.2

34.4

34.6

34.8

35.2

35.4

IOUTx, OUTPUT CURRENT (mA)

11 14 16

OUTX = 1 V

35.6

35.8

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DETAILED OPERATING DESCRIPTION

General

The NCV7680 consists of eight linear programmable

constant current sources. The part is designed for use in the

regulation and control of LED based Rear Combination

Lamps for automotive applications. System design with the

NCV7680 allows for two brightness levels; one for stop, and

one for tail illumination.

Brightness levels are easily programmed (stop current

absolute value, tail current duty cycle value) with two

external resistors.

The use of an external FET allows for power distribution

on designs requiring high currents. Additionally, set back

power limit reduces the drive current during overvoltage

conditions. Set back power limit is most useful for low

current applications when no external FET is used.

The NCV7680 offers all of the built in protection normal

to regulator systems, such as current limit, thermal limit, and

provides an open load diagnostic that coincides with the

STOP input signal.

Open String Reporting (DIAG)

Open string detection is reported on the DIAG pin as a

high with STOP Input high, or a combination of STOP Input

high and TAIL Input high. Reference Table 1 on page 5 for

more details. Open circuit is sensed on each of the 8 outputs.

The typical threshold voltage for detection is 0.4 V. Care

must be taken not to breach this voltage level under normal

operation , or a false open will be reported. Make sure worst

case system design focuses on the voltage level on top of the

LED string (top anode) (VSTRING) and includes the worst

case LED voltage drop while considering temperature

effects.

Input Voltage and Set Back Current

Automotive battery systems have wide variations in line

supply voltage. Low dropout is a key attribute for providing

consistent LED light output at low line voltage. Unlike

adjustable regulator based constant current source schemes

where the set point resistor resides in the load path, the

NCV7680’s set point resistor lies outside the LED load path,

and aids in the low dropout capability.

Setback Current Limit is employed during high voltage.

During a Setback Current Limit event, the drive current is

reduced resulting in lower power dissipation on the IC. This

occurs during high battery voltage (VP > 16 V). In this way

the NCV7680 can operate in extreme conditions and still

provide a controlled level of light output

The Overvoltage condition is reported on the DIAG Pin.

Reference Figures 19 and 20 for Power Limiting Behavior.

Voltage

Low Drop−out

Area

Constant Current Area Overvoltage

Set Back

Area

Only Voltage Effects

Thermal

Shutdown

Figure 19. Ballast FET Power

DRIVER POWER DISSIPATION

180°C (typ)

Voltage

Low Drop−out

Area

Constant Current Area Overvoltage

Set Back

Area

Only Voltage Effects

Thermal

Shutdown

Figure 20. IC Power

IC POWER DISSIPATION

180°C (typ)

Quiescent Current Power

Further reduction in power to the NCV7680 can be

achieved by moving the VP pin connection to the drain of the

external FET. The contribution of power at the NCV7680

caused by the quiescent current into VP is lowered due to the

lower operating voltage of VP with the new connection.

Note also the addition of an external resistor Rsd in Figure

21. This will be required to insure startup of the system. A

value for Rsd should be chosen low enough to provide

current into VP and the current in the ILEDs & feedback string

under all required input voltage input conditions. Rsd’s

value should be chosen lower for slow rising Vbat signals to

avoid switching between an Output Disable state and an

Open Circuit state during power−up.

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Figure 21. Alternative VP Connection with Rsd

OUT1

NCV7680

OUT2

OUT3

OUT4

OUT5

OUT6

OUT7

OUT8

GND

RTAIL

RSTOP

DIAG

STOP

Ballast Drive

ILEDs &

feedback

1K C3

100 nF

0.22 mF

0.1 mF

Vbat

MRA4003T3G

Rsd

NTD2955

Programmability

Strings of LEDs are a common configuration for RCL

applications. The NCV7680 provides eight matched outputs

allowing individual string drive with current set by a single

resistor. Individual string drive is a benefit to ensure equal

current distribution amongst all of the strings. Output

currents are mirrored and matched within ±5% at hot

temperature.

A high STOP condition sets the output current using

equation 1 below.

A low STOP condition, modulates the output currents at

a duty cycle (DC) programmed using equation 2 below.

Note, current limiting on RSTOP limits the current which

can be referenced from the RSTOP Pin. Exceeding the

RSTOP Current Limit will reduce the output current and the

DIAG Pin will go high (reference Figure 18). This helps

limit output current (brightness and power) for this type of

fault.

The average ISTOP Duty Cycle current provides the

dimmed tail illumination function and assures a fixed

brightness level for tail. The PWM generator’s fixed

frequency (1 kHz typ.) oscillator allows flicker−free

illumination. PWM control is the preferred method for

dimming LEDs.

The diagnostic function allows the detection of an open in

any one of the output circuits. The active−low diagnostic

output (DIAG) is coincident with the STOP input. DIAG

remains high (pulled up) if an open load is detected in any

LED string when STOP is high.

Output Current Programming

Reference Figure 10 to choose programming resistor

(RSTOP) value for stop current. Reference Figure 12 (Duty

Cycle vs. RTAIL) to choose a typical value programming

resistor for output duty cycle (with a typical RSTOP value of

3.09 kW). Note the duty cycle is dependent on both RSTOP

and RTAIL values. RSTOP should always be chosen first as the

stop current is only dependent on this value.

Alternatively, the equations below can be used to calculate

a typical value and used for worst case analysis.

Set the Stop Current using RSTOP

OUTX +100

RSTOP_Bias_Voltage

RSTOP

RSTOP Bias Voltage = 1.08 V (typ)

(eq. 1)

Set the Duty Cycle (DC) using RTAIL

RTAIL +ǒ4

mǓ RSTOP(DC )0.1)

DC = duty cycle expressed in fractional form.

(e.g. 0.50 is equivalent to 50% duty cycle)

(eq. 2)

(ground RTAIL when using external modulation)

m = 1.16 = Mirror Coupling Ratio = IRTAIL

IRSTOP

Output Current is directly tested per the electrical

parameter table to be ±10% (with RSTOP = 3.09 kW) or

31.5 mA (min), 35 mA (typ), 38.5 mA (max) at room and hot

temperature.

Duty Cycle will vary according to the changes in RTAIL

Voltage and RTAIL Bias Current (generated form the current

through RSTOP).

Voltage errors encompass generator errors (0.4 V to 4.4 V)

and comparator errors and are included in testing as the Duty

Cycle. Typical duty cycle measurements are 5% with RTAIL

= 0.59 V and 70% with RTAIL = 3.29 V.

RTAIL Bias Current errors are measured as RTAIL Bias

Current and vary as 300 mA (min), 350 mA (typ), and 450 mA

(max) with RSTOP = 3.09 kW.

The error duality and choice of duty cycle levels make it

difficult to specify duty cycle minimum and maximum

limits, but worst case conditions can be calculated when

considering the variation in the voltage threshold and

current source. Duty Cycle variation must include the direct

duty cycle as specified in the electrical parameter table plus

an additional error due to the Irstop current which generates

this voltage in the system.

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−

4.4V

0.4V

Oscillator

and PWM

Figure 22. Duty Cycle Generator Circuitry

RTAIL

Vreg

Irstop

Alternative Setup of Duty Cycle

Alternatively, the duty cycle can be controlled by

providing a voltage to the RTAIL pin as per Figure 13 (Duty

Cycle vs. V(RTAIL). Note the pull-up current source (Irstop)

is still present on the RTAIL pin due to current setting resistor

connected to RSTOP

. For proper operation the system

designer needs to insure there is sufficient loading on the

RTAIL pin such that Irstop does not pull the referenced voltage

higher than its regulated state.

Setting VSTRING

VSTRING should be set to a level to allow proper operation

of the IC without detecting an open circuit (0.5 V max on

OUTx) and to keep power to the IC at reduced levels below

the 150°C max die temperature thermal limit (die

temperature will depend on printed circuit board

composition, PCB size, thermal via number and placement,

module component placement, and air flow).

Example:

VSTRING is set using resistors R6 and R7 (reference

Figure 4).

VSTRING +VFBǒR6

R7 )1Ǔ(eq. 3)

VFB = Ballast Drive Reference Voltage

This simplifies to an equation for R6.

R6 +

R7ǒVSTRING *VFBǓ

VFB

(eq. 4)

Calculate system design VSTRING.

Let VLED be the voltage drop across your LEDs (3 included

in Figure 4). 9.5 V

Choose a value for OUTx, 1 V

VSTRING +VOUTx )VLED (eq. 5)

Using Equation 3

VSTRING +1V)9.5 V +10.5 V

Using Equation 4

Choose a value for R7.

R7 = 1k

R6 +

1kǒ10.5 V *1.08 VǓ

1.08 V +8.72k

The closest standard resistor value is 8.87k.

Reduced Channel Operation

The previously shown applications (Figures 4 and 5)

show system operation using all 8 available channels of the

NCV7680. When less than 8 channels are used, the unused

OUTx pins can be grounded eliminating the unused OUTx

drive current. This is accomplished by voltage threshold

detection on OUTx (100 mV typ). A voltage less than

100 mV on OUTx turns the driver off, reducing quiescent

current to the IC. This also helps reduce system power by

eliminating the need for an external pullup resistor (from

OUTx to VP) while maintaining open circuit detection.

External pullup resistors may be used as an alternative.

Adding LED’s to the String

The NCV7680 can function as a standalone device or in

conjunction with additional support circuitry for more

complex systems. Figure 23 shows the NCV7680 operating

with a boost controller. This setup allows additional LEDs

in a string to be increased. Eight are shown in the diagram.

Consideration of the 45 V maximum limit on the OUTx Pin

is the limitation of this configuration. The DC on voltage

level on OUTx must also be considered for thermal reasons.

Electromagnetic Interference (EMI)

One of the key contributors to electromagnetic

interference is the rise and fall times of the electrical signals.

This is a concern with both the initial startup of a device, and

the repeated turn on/off cycles of a device.

The NCV7680 employs current slew rate control. Each

output is rated at 6.0 mA/ms (typ). Slew rate control reduces

overshoot and allows for a predictable electrical signal. Slew

rate control is used in the stop mode for soft−start and in the

tail mode for low EMI operation.

EMC susceptibility improvements to the NCV7680

device can be made by adding a ferrite bead directly on the

VP (pin 2) of the device. The recommended component for

this setup is the TDK PN/ MMZ2012S601A, FERRITE

CHIP 600 OHM 500MA 0805 device. Care should be taken

to add this component no less than 10mils from the pin.

An R-C network can also be used as an alternative to the

ferrite bead. A 100 W resistor in series with VP (pin 2) with

a 1nF – 10 nF very low ESR ceramic capacitor provides a

similar roll-off. A very-low ESR ceramic capacitor is a

requirement here. A normal ceramic capacitor will not

suffice in this setup. The design should consider that the

dropout voltage of the LED strings must be higher than the

minimum operating voltage of the IC plus the voltage drop

across the 100 W resistor.

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Figure 23. Boost Mode

OUT1

NCV7680

OUT2

OUT3

OUT4

OUT5

OUT6

OUT7

OUT8

GND

RTAIL

RSTOP

DIAG

STOP/PWM

Ballast Drive

MRA4003T3G

10k

10nF

R5, 2.21k

R4, 3.09k

TAIL Input

STOP Input

R8, 10k

−

1mF

NCV3163

Boost Controller

epad

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Figure 24. Cross Coupled LEDs

OUT1

NCV7680

OUT2

OUT3

OUT4

OUT5

OUT6

OUT7

OUT8

GND

RTAIL

RSTOP

DIAG

STOP

Ballast Drive

VSTRING

epad

Cross-Coupled LEDs

The setup in Figure 24 shows the LEDs set up in a

cross-coupled configuration connected to all the outputs of

the NCV7680 in parallel. This allows the user to maintain

illumination of all the remaining LEDs when one fails due

to an open circuit (the most common form of LED failure).

Comparatively, the standard setup shown in Figure 4 will

result in a full string turning off when one LED is open. Be

aware as LEDs fail as open circuits in the cross-coupled

arrangement will cause the row of LEDs to run at a higher

current level affected by the smaller number of LEDs in that

row.

NCV7680

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Figure 25. No Tail Light, Stop Illuminated

OUT1

NCV7680

OUT2

OUT3

OUT4

OUT5

OUT6

OUT7

OUT8

GND

RTAIL

RSTOP

DIAG

STOP/PWM

Ballast Drive

100nF

MRA4003T3G

10k

10nF

R5, 2.21k

R4, 3.09k

8.87k

TAIL Input

STOP Input

LED Module

−

0.22mF

0.1mF

epad

VSTRING

Vref

NTD2955

Figure 26. Tail Light Illuminated, No Stop

OUT1

NCV7680

OUT2

OUT3

OUT4

OUT5

OUT6

OUT7

OUT8

GND

RTAIL

RSTOP

DIAG

STOP/PWM

Ballast Drive

100nF

MRA4003T3G

10k

10nF

R5, 2.21k

R4, 3.09k

8.87k

TAIL Input

STOP Input

LED Module

−

0.22mF

0.1mF

epad

VSTRING

Vref

NTD2955

NCV7680

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Figure 27. PWM Operation (suggested LCD backlighting applications)

OUT1

NCV7680

OUT2

OUT3

OUT4

OUT5

OUT6

OUT7

OUT8

GND

RTAIL

RSTOP

DIAG

STOP/PWM

Ballast Drive

MRA4003T3G

10k

C4*

10nF

R4, 3.09k

VBAT or

Boost Voltage

PWM

1mF

epad

* Optional for EMI considerations

External PWM Operation

Using the NCV7680 in a PWM setup requires RTAIL to be

grounded. Grounding RTAIL disables the internal PWM

circuitry. With RTAIL grounded, the STOP input pin can then

be modulated externally with a microprocessor using the

STOP logic input level thresholds.

Tail Frequency Stabilization Time requires 2 pulses from

the internal oscillator. This is typically 2 ms (from the 1 kHz

oscillator.

Circuit limitations dictate the maximum output current

(IOUTX) to be 60 mA when operated at VP = 5 V. Part

capability increases up to the part maximum capability as VP

is increased.

NCV7680

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Latch−Off on Open String Detection

Some LED lighting systems require the complete lighting

system to shut down when the output intensity has

diminished. This eliminates a slow degradation of output

illumination. Figure 28 provides one solution for this

requirement. The open circuit fault information provided on

the DIAG pin coupled with external discrete transistors

provides the feedback needed to the FB pin to turn off the

ballast transistor drive removing the LED anode string from

any power source. This condition is held until the input

signal is toggled.

Figure 28. Latch−Off Circuit

100nF

0.1uF

NTD2955G

8.87K

0.22uF

TAIL Input

STOP Input

10k

10nF R5, 2.21k

R4, 3.09k

4.99k

R9, 499

R10

10k

R11

10k

0.1uF

OUT1

NCV7680

OUT2

OUT3

OUT4

OUT5

OUT6

OUT7

OUT8

GND

RTAIL

RSTOP

DIAG

STOP

Ballast Drive

MRA4003T3G

MUN2211

VSTRING

Vref

Note: Latch−off will be implemented under all conditions which cause DIAG to go high.

Reference the pin function description table for a summary of DIAG performance.

MUN2111LT1G

Checking DIAG After Assembly

Production requirements often require the functional

testing of all parameters in a system. This can be a difficult

parameter to check if the function is exercising the DIAG

pin. You cannot easily create an open circuit condition to

check on the reporting capability of the DIAG pin. This

would require you to remove one or all LEDs in a string.

As an alternative you can use the Set Back Current Limit

function of the device. Increasing the voltage to the VP pin

(STOP mode) will cause the current through the LEDs to

decrease. Because DIAG also reports when the current limit

has decreased 20%, we can calculate the minimum voltage

needed to create that condition.

The Voltage Fold-Back equation is:

VP@(x% reduction) +ǒx% reduction

kv Ǔ)VP(1% reduction)

(eq. 6)

Where kv= %/V

Using the electrical parameters in the datasheet, we have:

(x% reduction)=20, kv=4%min(@20% reduction), VP(1%

reduction)max=24.5V.

VP(@20% reduction) max +ǒ20

4ǓV)24.5 V +29.5 V

(eq. 7)

This is the maximum worst case voltage the NCV7680

will toggle the DIAG pin at VP. An additional increase in

voltage should be used for good engineering judgment here.

A supply voltage of 32V is recommended. Note the

maximum capability of the VP and DIAG pins is 45V.

An alternative to supplying the higher voltage on VP to

toggle DIAG requires the short the Rstop pin to ground

(must be less than 0.5 V).

Note the Rstop pin is self-protected as per Figure 18 Iout

vs. Irstop.

NCV7680

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PACKAGE DIMENSIONS

SOIC 16 LEAD WIDE BODY, EXPOSED PAD

CASE 751AG−01

ISSUE A

−W−

−U−

0.25 (0.010) W

−T−

SEATING

PLANE

D16 PL

0.25 (0.010) TUW

S S

DETAIL E

R x 45_

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION A AND B DO NOT INCLUDE MOLD

PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER

SIDE.

5. DIMENSION D DOES NOT INCLUDE DAMBAR

PROTRUSION. ALLOWABLE PROTRUSION SHALL BE

0.13 (0.005) TOTAL IN EXCESS OF THE D DIMENSION

AT MAXIMUM MATERIAL CONDITION.

6. 751R-01 OBSOLETE, NEW STANDARD 751R-02.

14 PL

PIN 1 I.D.

16 9

TOP SIDE

0.10 (0.004) T

EXPOSED PAD 18

BACK SIDE

DIM

MIN MAX MIN MAX

INCHES

10.15 10.45 0.400 0.411

MILLIMETERS

B7.40 7.60 0.292 0.299

C2.35 2.65 0.093 0.104

D0.35 0.49 0.014 0.019

F0.50 0.90 0.020 0.035

G1.27 BSC 0.050 BSC

H3.45 3.66 0.136 0.144

J0.25 0.32 0.010 0.012

K0.00 0.10 0.000 0.004

L4.72 4.93 0.186 0.194

M0 7 0 7

P10.05 10.55 0.395 0.415

R0.25 0.75 0.010 0.029

____

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

SOLDERING FOOTPRINT*

0.350

0.175

0.050

0.376

0.188

0.200

0.074

DIMENSIONS: INCHES

0.024 0.150

Exposed

Pad

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice

to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability

arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.

“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All

operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights

nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications

intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should

Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,

and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death

associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal

Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

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Phone: 81−3−5817−1050

NCV7680/D

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