FEATURES PIN CONFIGURATIONS Rail-to-rail input/output Low power: 625 A typical Gain bandwidth product: 15.9 MHz at AV =100 typical Unity-gain crossover: 9.9 MHz typical -3 dB closed-loop bandwidth: 13.9 MHz typical at 15 V Low offset voltage: 100 V maximum (SOIC) Unity-gain stable High slew rate: 4.6 V/s typical Low noise: 3.9 nV/Hz typical at 1 kHz ADA4084-2 OUT A 1 8 V+ -IN A 2 7 OUT B +IN A 3 6 -IN B V- 4 5 +IN B TOP VIEW (Not to Scale) NOTES 1. FOR THE LFSCP PACKAGE THE EXPOSED PAD MUST BE CONNECTED TO V-. 08237-001 Data Sheet 30 V, Low Noise, Rail-to-Rail I/O, Low Power Operational Amplifier ADA4084-2 Figure 1. 8-Lead MSOP (RM) 8-Lead SOIC (R) 8-Lead LFCSP (CP) APPLICATIONS Battery-powered instrumentation Power supply control and protection Telecommunications DAC output amplifier ADC input buffer GENERAL DESCRIPTION The ADA4084-2 is a dual, single-supply, 10 MHz bandwidth amplifier featuring rail-to-rail inputs and outputs. It is guaranteed to operate from 3 V to 30 V (or 1.5 V to 15 V). These amplifiers are well suited for single-supply applications requiring both ac and precision dc performance. The combination of wide bandwidth, low noise, and precision makes the ADA4084-2 useful in a wide variety of applications, including filters and instrumentation. Other applications for these amplifiers include portable telecommunications equipment, power supply control and protection, and use as amplifiers or buffers for transducers with wide output ranges. Sensors requiring a rail-to-rail input amplifier include Hall effect, piezoelectric, and resistive transducers. The ability to swing rail-to-rail at both the input and output enables designers to build multistage filters in single-supply systems and to maintain high signal-to-noise ratios. The ADA4084-2 is specified over the industrial temperature range of -40C to +125C. The dual ADA4084-2 is available in the 8-lead SOIC, MSOP, and LFCSP surface-mount packages. The ADA4084-2 is a member of a growing series of high voltage, low noise op amps offered by Analog Devices, Inc., (see Table 1). For a more complete selection table of low input voltage noise amplifiers, see the AN-940 Application Note, Low Noise Amplifier Selection Guide for Optimal Noise Performance, available at www.analog.com. Table 1. Low Noise Op Amps Voltage Noise 1.1 nV/Hz 1.8 nV/Hz 2.8 nV/Hz RRO1 2.8 nV/Hz 3.2 nV/Hz 3.9 nV/Hz RRIO2 1 2 Single AD8597 ADA4004-1 AD8675 AD8671 OP27/OP37 Dual AD8599 ADA4004-2 AD8676 AD8672 Quad ADA4004-4 AD8674 ADA4084-2 Rail-to-rail output. Rail-to-rail input/output. Rev. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2011-2012 Analog Devices, Inc. All rights reserved. ADA4084-2 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 15 V Characteristics ................................................................ 17 Applications ....................................................................................... 1 Applications Information .............................................................. 22 General Description ......................................................................... 1 Functional Description .............................................................. 22 Pin Configurations ........................................................................... 1 Startup Characteristics .............................................................. 23 Revision History ............................................................................... 2 Input Protection ......................................................................... 23 Specifications..................................................................................... 3 Output Phase Reversal ............................................................... 23 Electrical Characteristics ............................................................. 3 Absolute Maximum Ratings............................................................ 6 Designing Low Noise Circuits in Single-Supply Applications ................................................................................ 24 Thermal Resistance ...................................................................... 6 Comparator Operation .............................................................. 24 ESD Caution .................................................................................. 6 Outline Dimensions ....................................................................... 25 Typical Performance Characteristics ............................................. 7 Ordering Guide .......................................................................... 26 1.5 V Characteristics.................................................................. 7 5 V Characteristics ................................................................... 12 REVISION HISTORY 6/12--Rev. A to Rev. B 2/12--Rev. 0 to Rev. A Added LFCSP Package ....................................................... Universal Changes to Figure 1 ........................................................................... 1 Changes to Output Voltage High Parameter, Table 4 ................... 5 Added Figure 5 and Figure 7, Renumbered Sequentially ............ 7 Added Figure 30 and Figure 32......................................................12 Added Figure 55 and Figure 57......................................................17 Added Startup Characteristics Section .........................................23 Moved Figure 78 ..............................................................................23 Changes to Output Phase Reversal Section and Comparator Operation Section ............................................................................24 Updated Outline Dimensions ........................................................25 Changes to Ordering Guide ...........................................................26 Changes to Data Sheet Title .............................................................1 Changes to Voltage Range in General Description .......................1 Changes to Supply Current/Amplifier Parameter, Table 2 ..........3 Changes to Common-Mode Rejection Ratio Parameter, Table 3 .. 4 Changes to Common-Mode Rejection Ratio Parameter, Table 4 .. 5 Changes to Figure 2 ...........................................................................6 Changes to Figure 24...................................................................... 10 Changes to Figure 32...................................................................... 12 Changes to Figure 47...................................................................... 14 Changes to Figure 55...................................................................... 16 Changes to Figure 62...................................................................... 17 Changes to Figure 73...................................................................... 20 10/11--Revision 0: Initial Version Rev. B | Page 2 of 28 Data Sheet ADA4084-2 SPECIFICATIONS ELECTRICAL CHARACTERISTICS VSY = 3 V, VCM =1.5 V, TA = 25C, unless otherwise noted. Table 2. Parameter INPUT CHARACTERISTICS Offset Voltage Offset Voltage Drift Offset Voltage Matching Input Bias Current Symbol Test Conditions/Comments VOS SOIC package -40C TA +125C MSOP package -40C TA +125C LFCSP package -40C TA +125C -40C TA +125C Channel A vs. Channel B, TA = 25C VOS/T Min IB Typ Max Unit 0.5 100 200 130 250 200 300 1.75 150 300 450 25 50 3 V V V V V V V/C V nA nA nA nA V dB dB dB dB k||pF M||pF 140 -40C TA +125C Input Offset Current IOS -40C TA +125C Input Voltage Range Common-Mode Rejection Ratio CMRR Large Signal Voltage Gain AVO Input Impedance, Differential Input Impedance, Common-Mode OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low 0 64 60 100 97 80 104 100||1.1 80||2.9 VOH VOL Short-Circuit Current POWER SUPPLY Power Supply Rejection Ratio ISC Supply Current/Amplifier ISY DYNAMIC PERFORMANCE Slew Rate Gain Bandwidth Product Unity-Gain Crossover Phase Margin -3 dB Closed-Loop Bandwidth NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Density VCM = 0 V to 3 V -40C TA +125C RL = 2 k, 0.5 V VO 2.5 V RL = 2 k, -40C TA +125C PSRR SR GBP UGC M -3 dB en p-p en in RL = 10 k to VCM -40C TA +125C RL = 2 k to VCM -40C TA +125C RL = 10 k to VCM -40C TA +125C RL = 2 k to VCM -40C TA +125C 2.85 2.8 2.8 2.7 2.95 2.9 10 20 40 50 75 -17/+10 VSY = 1.25 V to 1.75 V -40C TA +125C IO = 0 mA -40C TA +125C 100 90 RL = 2 k VIN = 5 mV p-p, RL = 10 k, AV = 100 VIN = 5 mV p-p, RL = 10 k, AV = 1 2.0 110 565 650 950 V V V V mV mV mV mV mA dB dB A A AV = 1, VIN = 5 mV p-p 2.6 15.4 8.08 86 12.3 V/s MHz MHz Degrees MHz 0.1 Hz to 10 Hz f = 1 kHz f = 1 kHz 0.14 3.9 0.55 V p-p nV/Hz pA/Hz Rev. B | Page 3 of 28 ADA4084-2 Data Sheet VSY = 5.0 V, VCM = 0 V, TA = 25C, unless otherwise noted. Table 3. Parameter INPUT CHARACTERISTICS Offset Voltage Offset Voltage Drift Offset Voltage Matching Input Bias Current Symbol Conditions VOS SOIC package -40C TA +125C MSOP package -40C TA +125C LFCSP package -40C TA +125C -40C TA +125C Channel A vs. Channel B, TA = 25C VOS/T Min IB Typ Max Unit 0.5 100 250 130 250 200 300 1.75 150 300 450 25 50 +5 V V V V V V V/C V nA nA nA nA V dB dB dB dB k||pF M||pF 140 -40C TA +125C Input Offset Current IOS -40C TA +125C Input Voltage Range Common-Mode Rejection Ratio CMRR Large Signal Voltage Gain AVO Input Impedance, Differential Input Impedance, Common-Mode OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Short Circuit Current POWER SUPPLY Power Supply Rejection Ratio Supply Current/Amplifier DYNAMIC PERFORMANCE Slew Rate Gain Bandwidth Product Unity-Gain Crossover Phase Margin -3 dB Closed-Loop Bandwidth NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Density VCM = 4 V VCM = 5 V, -40C TA +125C RL = 2 k, -4 V VO 4 V RL = 2 k, -40C TA +125C -5 106 76 108 103 124 112 100||1.1 200||2.5 VOH VOL RL = 10 k to VCM -40C TA +125C RL = 2 k to VCM -40C TA +125C RL = 10 k to VCM -40C TA +125C RL = 2 k to VCM -40C TA +125C 4.9 4.8 4.8 4.7 ISY SR GBP UGC M -3 dB en p-p en in 4.85 -4.95 -4.95 ISC PSRR 4.95 -4.9 -4.8 -4.8 -4.7 -24/+17 VSY = 2 V to 18 V -40C TA +125C IO = 0 mA -40C TA +125C 110 105 RL = 2 k to VCM VIN = 5 mV p-p, RL = 10 k, AV = 100 VIN = 5 mV p-p, RL = 10 k, AV = 1 2.4 AV = 1, VIN = 5 mV p-p 0.1 Hz to 10 Hz f = 1 kHz Rev. B | Page 4 of 28 120 595 700 1000 V V V V V V V V mA dB dB A A 3.7 15.9 9.6 85 13.9 V/s MHz MHz Degrees MHz 0.14 3.9 0.55 V p-p nV/Hz pA/Hz Data Sheet ADA4084-2 VSY = 15.0 V, VCM = 0 V, TA = 25C, unless otherwise noted. Table 4. Parameter INPUT CHARACTERISTICS Offset Voltage Offset Voltage Drift Offset Voltage Matching Input Bias Current Symbol Conditions VOS SOIC package -40C TA +125C MSOP package -40C TA +125C LFCSP package -40C TA +125C Min VOS/T Typ Max Unit 0.5 100 200 130 250 200 300 1.75 150 300 450 25 50 +15 V V V V V V V/C V nA nA nA nA V dB dB dB dB k||pF M||pF Channel A vs. Channel B, TA = 25C IB 140 -40C TA +125C Input Offset Current IOS -40C TA +125C Input Voltage Range Common-Mode Rejection Ratio CMRR Large Signal Voltage Gain AVO Input Impedance, Differential Input Impedance, Common-Mode OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Short Circuit Current POWER SUPPLY Power Supply Rejection Ratio Supply Current/Amplifier DYNAMIC PERFORMANCE Slew Rate Gain Bandwidth Product Unity-Gain Crossover Phase Margin -3 dB Closed-Loop Bandwidth NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Density VCM = 14 V VCM = 15 V, -40C TA +125C RL = 2 k, -13.5 V VO +13.5 V -40C TA +125C -15 106 85 110 105 124 117 100||1.1 200||2.5 VOH VOL RL = 10 k to VCM -40C TA +125C RL = 2 k to VCM -40C TA +125C RL = 10 k to VCM -40C TA +125C RL = 2 k to VCM -40C TA +125C 14.8 14.8 14.5 14.0 ISY SR GBP UGC M -3 dB en p-p en in 14.6 -14.95 -14.9 ISC PSRR 14.9 -14.9 -14.8 -14.8 -14.7 30 VSY = 2 V to 18 V -40C TA +125C IO = 0 mA -40C TA +125C 110 105 RL = 2 k VIN = 5 mV p-p, RL = 10 k, AV = 100 VIN = 5 mV p-p, RL = 10 k, AV = 1 2.4 AV = 1, VIN = 5 mV p-p 0.1 Hz to 10 Hz f = 1 kHz Rev. B | Page 5 of 28 120 625 750 1050 V V V V V V V V mA dB dB A A 4.6 15.9 9.9 86 13.9 V/s MHz MHz Degrees MHz 0.1 3.9 0.55 V p-p nV/Hz pA/Hz ADA4084-2 Data Sheet ABSOLUTE MAXIMUM RATINGS Table 5. THERMAL RESISTANCE Parameter Supply Voltage Input Voltage Differential Input Voltage1 Output Short-Circuit Duration to GND Storage Temperature Range Operating Temperature Range Junction Temperature Range Lead Temperature (Soldering 60 sec) JA is specified for the device soldered on a 4-layer JEDEC standard printed circuit board (PCB) with zero airflow. Table 6. Thermal Resistance Package Type 8-Lead SOIC 8-Lead MSOP 8-Lead LFCSP1 1 For input differential voltages greater than 0.6 V, the input current should be limited to less than 5 mA to prevent degradation or destruction of the input devices. JA 121 142 55 JC 43 45 6 ESD CAUTION Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. VCC R3 R4 R6 Q24 D2 Q23 D1 Q2 Q1 MIRROR D100 Q4 D101 FOLDED CASCADE Q3 VOUT R7 C2 Q13 D5 VBIAS D4 R5 Q18 C1 Q19 R1 Unit C/W C/W C/W Numbers are based on 4-layer JEDEC thermal boards with the exposed pad soldered to the PCB. R2 Q21 D20 Figure 2. Simplified Schematic Rev. B | Page 6 of 28 VEE 08237-002 1 Rating 18 V V- VIN V+ 0.6 V Indefinite -65C to +150C -40C to +125C -65C to +150C 300C Data Sheet ADA4084-2 TYPICAL PERFORMANCE CHARACTERISTICS TA = 25C, unless otherwise noted. 1.5 V CHARACTERISTICS 120 60 ADA4084-2 VSY = 1.5V TA = 25C RL = 50 80 60 40 20 40 30 20 ADA4084-2 VSY = 1.5V TA = 25C RL = -40 TA +125C 10 -75 -50 -25 0 25 75 50 100 VOS (V) 0 08237-003 0 -100 0 0.4 0.6 0.8 1.0 1.2 30 ADA4084-2 VSY = 1.5V TA = 25C RL = 2.0 1.8 ADA4084-2 VSY = 1.5V TA = 25C RL = -40 TA +125C 25 NUMBER OF AMPLIFIERS 40 1.6 Figure 6. TCVOS Distribution, SOIC and MSOP 50 45 1.4 TCVOS (V/C) Figure 3. Input Offset Voltage Distribution, SOIC NUMBER OF AMPLIFIERS 0.2 08237-005 NUMBER OF AMPLIFIERS NUMBER OF AMPLIFIERS 100 35 30 25 20 15 10 20 15 10 5 -50 -25 0 25 50 75 100 VOS (V) 0 0 0.4 0.6 0.8 1.0 1.2 1.4 2.0 500 VSY = 1.5V TA = 25C RL = INPUT OFFSET VOLTAGE (V) 400 150 100 50 300 200 100 0 -100 -200 -300 ADA4084-2 VSY = 1.5V TA = 25C RL = -100 -50 0 50 VOS (V) 100 08237-081 -400 -150 1.8 Figure 7. TCVOs Distribution, LFCSP 200 0 -200 1.6 TCVOS (V/C) Figure 4. Input Offset Voltage Distribution, MSOP NUMBER OF AMPLIFIERS 0.2 Figure 5. Input Offset Voltage Distribution, LFCSP -500 0 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00 2.25 2.50 2.75 3.00 COMMON-MODE VOLTAGE (V) Figure 8. Input Offset Voltage vs. Common-Mode Voltage Rev. B | Page 7 of 28 08237-006 -75 08237-004 0 -100 08237-082 5 ADA4084-2 Data Sheet -50 1000 IB+ 100 IB- 10 VOL - (V-) -200 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (C) 1 0.001 0.01 0.1 1 Figure 12. Dropout Voltage vs. Sink Current Figure 9. Input Bias Current vs. Temperature 120 600 270 ADA4084-2 VSY = 1.5V TA = 25C RL = 10k 100 400 80 225 180 200 GAIN (dB) INPUT BIAS (nA) 10 LOAD CURRENT (mA) TA = +125C 0 TA = +85C 60 135 40 90 20 45 0 0 -200 TA = +25C -400 TA = -40C -1.0 -0.5 0 0.5 1.0 1.5 VCM (V) -40 0.1 08237-008 -600 -1.5 -45 -20 ADA4084-2 VSY = 1.5V 1 10 100 1k -90 100k 10k 08237-011 -25 08237-007 -250 -40 08237-010 ADA4084-2 VSY = 1.5V TA = 25C ADA4084-2 VSY = 1.5V VCM = 0V RL = PHASE (Degrees) -150 VDO (mV) INPUT BIAS (nA) -100 FREQUENCY (kHz) Figure 13. Open-Loop Gain and Phase vs. Frequency Figure 10. Input Bias Current vs. VCM and Temperature 60 1000 ADA4084-2 VSY = 1.5V TA = 25C 50 40 AV = +100 GAIN (dB) 20 AV = +10 10 (V+) -VOH 0 ADA4084-2 VSY = 1.5V TA = 25C 1 0.001 0.01 0.1 1 LOAD CURRENT (mA) 10 AV = +1 -10 Figure 11. Dropout Voltage vs. Source Current -20 10 100 1k 10k 100k 1M 10M FREQUENCY (Hz) Figure 14. Closed-Loop Gain vs. Frequency Rev. B | Page 8 of 28 100M 08237-012 10 08237-009 VDO (mV) 30 100 Data Sheet ADA4084-2 1.5 1000 AV = +10 100 1.0 AV = +100 VOLTAGE (V) ZOUT () 0.5 10 AV = +1 1 0 -0.5 100 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) -1.5 08237-013 0 2 10 12 14 16 18 16 18 80 ADA4084-2 VSY = 1.5V TA = 25C 120 60 100 40 VOLTAGE (mV) 60 PSRR- 40 20 20 0 -20 ADA4084-2 VSY = 1.5V TA = 25C RL = 2k CL = 100pF -40 PSRR+ -60 0 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) -80 08237-014 100 0 2 4 6 8 10 12 14 TIME (s) Figure 19. Small Signal Transient Response Figure 16. PSRR vs. Frequency 2 120 ADA4084-2 VSY = 1.5V TA = 25C 110 100 08237-017 80 0.08 INPUT 0 90 0.06 0.04 VOLTAGE (V) -2 80 70 60 0.02 -4 OUTPUT -6 0 50 40 ADA4084-2 VSY = 1.5V TA = 25C -8 20 10 100 1k 10k 100k 1M FREQUENCY (Hz) 10M 100M 08237-015 30 Figure 17. CMRR vs. Frequency -10 -1 -0.02 -0.04 0 1 2 3 4 5 6 TIME (s) Figure 20. Settling Time Rev. B | Page 9 of 28 7 8 9 08237-018 PSRR (dB) 8 Figure 18. Large Signal Transient Response 140 CMRR (dB) 6 TIME (s) Figure 15. Output Impedance vs. Frequency -20 10 4 VOLTAGE (V) 0.01 10 ADA4084-2 VSY = 1.5V TA = 25C RL = 2k CL = 100pF -1.0 ADA4084-2 VSY = 1.5V TA = 25C 08237-016 0.10 ADA4084-2 Data Sheet 0 ADA4084-2 VSY = 1.5V TA = 25C VIN = 1V p-p CHANNEL SEPARATION (dB) -20 4 ADA4084-2 VSY = 1.5V TA = 25C 10 100 1k 10k -60 -80 -100 -120 100k FREQUENCY (Hz) -160 100 1k 100k Figure 24. Channel Separation Figure 21. Voltage Noise Density 60 1 ADA4084-2 VSY = 1.5V VIN = 100mV p-p RL = 2k TA = 25C 50 OS+ 40 0.1 THD + N (%) 30 20 0.01 OS- ADA4084-2 VSY = 1.5V TA = 25C f = 1kHz 10 1 10 100 0.001 0.001 08237-020 0 1000 CAPACITANCE (pF) 0.01 0.1 1 AMPLITUDE (VRMS) Figure 22. Overshoot vs. Capacitance 08237-023 OVERSHOOT (%) 10k FREQUENCY (Hz) 08237-022 1 1 -40 -140 08237-019 VOLTAGE NOISE DENSITY (nV/Hz) 10 Figure 25. THD + N vs. Amplitude 80 0.01 60 THD + N (%) 20 0 -20 0.001 ADA4084-2 VSY = 1.5V TA = 25C -60 -80 0 1 2 3 4 5 6 7 8 TIME (Seconds) 9 10 Figure 23. Voltage Noise 0.1 Hz to 10 Hz 0.0001 10 100 1k 10k FREQUENCY (Hz) Figure 26. THD + N vs. Frequency Rev. B | Page 10 of 28 100k 08237-024 ADA4084-2 RL = 2k VIN = 0.4VRMS VSY = 1.5V TA = 25C 500kHz FILTER -40 08237-021 VOLTAGE NOISE (nV) 40 Data Sheet ADA4084-2 2.0 ADA4084-2 VSY = 1.5V TA = 25C 1.5 0.5 OUTPUT 0 -0.5 INPUT -1.0 -1.5 -2.0 0 100 200 300 400 500 600 700 TIME (s) 800 900 1000 08237-025 VOLTAGE (V) 1.0 Figure 27. No Phase Reversal Rev. B | Page 11 of 28 ADA4084-2 Data Sheet 5 V CHARACTERISTICS 50 120 ADA4084-2 VSY = 5V TA = 25C RL = 45 40 80 60 40 35 30 25 20 15 ADA4084-2 VSY = 5V RL = -40 TA +125C 10 20 5 -75 -50 -25 0 25 50 75 100 VOS (V) 0 08237-026 0 -100 0 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 Figure 31. TCVOS Distribution, SOIC and MSOP 35 60 ADA4084-2 VSY = 5V TA = 25C RL = ADA4084-2 VSY = 5V RL = -40 TA +125C 30 NUMBER OF AMPLIFIERS 50 40 30 20 10 25 20 15 10 -50 -25 0 25 50 75 100 VOS (V) 0 08237-027 -75 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 TCVOS (V/C) 08237-084 5 0 -100 Figure 32. TCVOS Distribution, LFCSP Figure 29. Input Offset Voltage Distribution MSOP 250 600 VSY = 5V TA = 25C RL = 500 400 150 100 50 300 200 100 0 -100 -200 -300 ADA4084-2 VSY = 5V TA = 25C RL = -400 -150 -100 -50 0 50 VOS (V) 100 08237-080 -500 0 -200 Figure 30. Input Offset Voltage Distribution, LFCSP -600 -5 -4 -3 -2 -1 0 1 2 3 4 COMMON-MODE VOLTAGE (V) Figure 33. Input Offset Voltage vs. Common-Mode Voltage Rev. B | Page 12 of 28 5 08237-029 INPUT OFFSET VOLTAGE (V) 200 NUMBER OF AMPLIFIERS 0.4 TCVOS (V/C) Figure 28. Input Offset Voltage Distribution SOIC NUMBER OF AMPLIFIERS 0.2 08237-028 NUMBER OF AMPLIFIERS NUMBER OF AMPLIFIERS 100 Data Sheet ADA4084-2 -50 1000 100 VDO (mV) IB+ -150 IB- ADA4084-2 VSY = 5V VCM = 0V RL = 5 20 35 50 65 80 95 110 125 TEMPERATURE (C) 1 0.001 0.01 0.1 1 08237-033 -10 10 LOAD CURRENT (mA) Figure 34. Input Bias Current vs. Temperature Figure 37. Dropout Voltage vs. Sink Current 120 800 600 100 400 80 TA = +85C TA = +125C GAIN (dB) 200 0 -200 TA = +25C -400 TA = -40C ADA4084-2 VSY = 5V -800 -5 -4 -3 -2 -1 0 1 2 3 4 VCM (V) 225 180 60 135 40 90 20 45 0 0 -45 -20 5 08237-031 -600 270 ADA4084-2 VSY = 5V TA = 25C RL = 10k PHASE (Degrees) -25 ADA4084-2 VSY = 5V TA = 25C -40 0.1 1 10 100 1k -90 100k 10k 08237-034 -250 -40 INPUT BIAS (nA) VOL - (V-) 10 -200 08237-030 INPUT BIAS (nA) -100 FREQUENCY (kHz) Figure 38. Open-Loop Gain and Phase vs. Frequency Figure 35. Input Bias Current vs. VCM and Temperature 60 ADA4084-2 VSY = 5V TA = 25C 1000 50 AV = +100 30 GAIN (dB) 100 20 AV = +10 10 (V+) -VOH 0 ADA4084-2 VSY = 5V TA = 25C 1 0.001 0.01 0.1 1 10 LOAD CURRENT (mA) AV = +1 -10 -20 10 100 1k 10k 100k 1M 10M FREQUENCY (Hz) Figure 39. Closed-Loop Gain vs. Frequency Figure 36. Dropout Voltage vs. Source Current Rev. B | Page 13 of 28 100M 08237-035 10 08237-032 VDO (mV) 40 ADA4084-2 Data Sheet 5 1000 4 100 3 AV = +10 VOLTAGE (V) AV = +100 1 1 0 -1 -2 0.10 ADA4084-2 VSY = 5V TA = 25C 100 1k 10k 100k 1M 10M -4 100M FREQUENCY (Hz) -5 08237-036 0.01 10 ADA4084-2 VSY = 5V TA = 25C RL = 2k CL = 100pF -3 0 2 8 10 12 14 16 18 9 10 Figure 43. Large Signal Transient Response 140 80 ADA4084-2 VSY = 5V TA = 25C 120 60 40 VOLTAGE (mV) 100 PSRR (dB) 6 TIME (s) Figure 40. Output Impedance vs. Frequency 80 60 PSRR- 40 20 20 0 -20 ADA4084-2 VSY = 5V TA = 25C RL = 2k CL = 100pF -40 PSRR+ -60 0 100 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) -80 08237-037 -20 10 4 08237-039 AV = +1 0 1 4 5 6 7 8 Figure 44. Small Signal Transient Response 120 ADA4084-2 VSY = 5V TA = 25C 100 3 TIME (s) Figure 41. PSRR vs. Frequency 110 2 08237-040 ZOUT () 2 10 10 0.16 5 0.12 INPUT 60 50 0.04 -5 OUTPUT 0 -10 -15 -0.04 ADA4084-2 VSY = 5V TA = 25C 40 -20 30 20 10 100 1k 10k 100k 1M FREQUENCY (Hz) 10M 100M -25 -2 -0.08 -0.12 0 2 4 6 8 10 12 TIME (s) Figure 45. Settling Time Figure 42. CMRR vs. Frequency Rev. B | Page 14 of 28 VOLTAGE (V) 70 14 16 18 08237-041 VOLTAGE (V) 80 08237-038 CMRR (dB) 0.08 0 90 Data Sheet ADA4084-2 0 ADA4084-2 VSY = 5V TA = 25C VIN = 5V p-p CHANNEL SEPARATION (dB) -20 4 ADA4084-2 VSY = 5V TA = 25C 10 100 1k 10k -60 -80 -100 -120 100k FREQUENCY (Hz) -160 100 1k Figure 46. Voltage Noise Density 1 ADA4084-2 VSY = 5V VIN = 100mV p-p RL = 2k TA = 25C 50 OS+ 0.1 40 THD + N (%) 30 20 0.01 OS- 1 10 100 0.0001 0.001 08237-043 0 1000 CAPACITANCE (pF) ADA4084-2 VSY = 5V TA = 25C f = 1kHz 0.01 0.1 08237-046 0.001 10 1 AMPLITUDE (VRMS) Figure 47. Overshoot vs. Load Capacitance Figure 50. THD + N vs. Amplitude 80 1 60 40 0.1 THD + N (%) 20 0 -20 -40 ADA4084-2 RL = 2k VIN = 2.0VRMS VSY = 5V TA = 25C 500kHz FILTER 0.01 0.001 -80 0 1 2 3 4 5 6 7 8 TIME (Seconds) 9 10 08237-044 ADA4084-2 VSY = 5V TA = 25C -60 Figure 48. Volage Noise 0.1 Hz to 10 Hz 0.0001 10 100 1k 10k FREQUENCY (Hz) Figure 51. THD + N vs. Frequency Rev. B | Page 15 of 28 100k 08237-047 OVERSHOOT (%) 100k Figure 49. Channel Separation 60 VOLTAGE NOISE (nV) 10k FREQUENCY (Hz) 08237-045 1 1 -40 -140 08237-042 VOLTAGE NOISE DENSITY (nV/Hz) 10 ADA4084-2 Data Sheet 6 ADA4084-2 VSY = 5V TA = 25C 4 0 OUTPUT -2 INPUT -4 -6 0 100 200 300 400 500 600 700 TIME (s) 800 900 1000 08237-048 VOLTAGE (V) 2 Figure 52. No Phase Reversal Rev. B | Page 16 of 28 Data Sheet ADA4084-2 15 V CHARACTERISTICS 60 100 ADA4084-2 VSY = 15V TA = 25C RL = 50 60 50 40 30 20 40 30 20 ADA4084-2 VSY = 15V RL = -40 TA +125C 10 10 -75 -50 -25 0 25 50 75 100 VOS (V) 0 08237-049 0 -100 0 0.8 1.0 1.2 1.4 1.6 1.8 2.0 30 ADA4084-2 VSY = 15V TA = 25C RL = ADA4084-2 VSY = 15V RL = -40 TA +125C 25 NUMBER OF AMPLIFIERS 50 40 30 20 20 15 10 5 10 -75 -50 -25 0 25 50 75 100 VOS (V) 0 08237-050 0 -100 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 TCVOS (V/C) 08237-085 NUMBER OF AMPLIFIERS 0.6 Figure 56. TCVOS Distribution, SOIC and MSOP 60 Figure 57. TCVOS Distribution, LFCSP Figure 54. Input Offset Voltage Distribution, MSOP 600 VSY = 15V TA = 25C RL = 500 INPUT OFFSET VOLTAGE (V) 400 150 100 50 300 200 100 0 -100 -200 -300 ADA4084-2 VSY = 15V TA = 25C RL = -400 -500 0 -200 -150 -100 -50 0 50 VOS (V) 100 08237-079 NUMBER OF AMPLIFIERS 0.4 TCVOS (V/C) Figure 53. Input Offset Voltage Distribution, SOIC 200 0.2 08237-051 70 -600 -15 -10 -5 0 5 10 COMMON-MODE VOLTAGE (V) Figure 58. Input Offset Voltage vs. Common-Mode Voltage Figure 55. Input Offset Voltage Distribution, LFCSP Rev. B | Page 17 of 28 15 08237-052 NUMBER OF AMPLIFIERS 80 NUMBER OF AMPLIFIERS 90 ADA4084-2 Data Sheet -50 10000 IB+ -100 VDO (mV) -250 -40 -25 -10 5 20 35 50 65 80 95 110 VOL - (V-) 10 ADA4084-2 VSY = 15V VCM = 0V RL = 125 TEMPERATURE (C) 1 0.001 0.01 ADA4084-2 VSY = 15V TA = 25C 0.1 1 Figure 59. Input Bias Current vs. Temperature Figure 62. Dropout Voltage vs. Sink Current 120 1200 270 ADA4084-2 VSY = 15V TA = 25C RL = 10k 100 800 80 400 INPUT BIAS (nA) 10 LOAD CURRENT (mA) TA = +125C GAIN (dB) TA = +85C 0 TA = +25C -400 -800 -5 5 0 60 135 40 90 20 45 0 0 10 VCM (V) -45 -20 15 08237-054 -10 180 TA = -40C ADA4084-2 VSY = 15V -1200 -15 225 -40 100 1k 10k 100k 1M -90 100M 10M 08237-057 -200 100 08237-056 IB- PHASE (Degrees) -150 08237-053 INPUT BIAS (nA) 1000 FREQUENCY (Hz) Figure 60. Input Bias Current vs. VCM and Temperature Figure 63. Open-Loop Gain and Phase vs. Frequency 60 ADA4084-2 VSY = 15V TA = 25C 10000 50 40 AV = +100 1000 GAIN (dB) 100 20 AV = +10 10 1 0.001 0.01 0 ADA4084-2 VSY = 15V TA = 25C 10 0.1 1 10 LOAD CURRENT (mA) AV = +1 -10 Figure 61. Dropout Voltage vs. Source Current -20 10 100 1k 10k 100k 1M 10M FREQUENCY (Hz) Figure 64. Closed-Loop Gain vs. Frequency Rev. B | Page 18 of 28 100M 08237-058 (V+) -VOH 08237-055 VDO (mV) 30 Data Sheet ADA4084-2 1000 15 10 100 AV = +10 VOLTAGE (V) ZOUT () 5 10 AV = +100 1 0 -5 AV = +1 -10 ADA4084-2 VSY = 15V TA = 25C 100 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) -15 08237-059 0 4 20 24 32 36 60 40 VOLTAGE (mV) 100 PSRR- 40 20 0 -20 ADA4084-2 VSY = 15V TA = 25C RL = 2k CL = 100pF -40 PSRR+ -60 0 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) -80 08237-060 100 0 1 3 2 4 5 6 7 8 9 10 TIME (s) Figure 69. Small Signal Transient Response Figure 66. PSRR vs. Frequency 10 120 ADA4084-2 VSY = 15V TA = 25C 110 100 0.20 0.15 5 INPUT 0.10 0 VOLTAGE (V) 90 80 70 60 50 0.05 -5 OUTPUT 0 -10 -15 -0.05 40 ADA4084-2 VSY = 15V TA = 25C -20 1k 10k 100k 1M FREQUENCY (Hz) 10M 100M 08237-061 30 100 -25 -2 Rev. B | Page 19 of 28 -0.10 -0.15 0 2 4 6 8 10 12 TIME (s) Figure 70. Settling Time Figure 67. CMRR vs. Frequency VOLTAGE (V) 60 20 08237-063 80 20 10 28 80 ADA4084-2 VSY = 15V TA = 25C 120 PSRR (dB) 16 Figure 68. Large Signal Transient Response 140 CMRR (dB) 12 TIME (s) Figure 65. Output Impedance vs. Frequency -20 10 8 14 16 18 08237-064 0.01 10 ADA4084-2 VSY = 15V TA = 25C RL = 2k CL = 100pF 08237-062 0.1 ADA4084-2 Data Sheet 10 0 ADA4084-2 VSY = 15V TA = 25C VIN = 10V p-p CHANNEL SEPARATION (dB) 4 ADA4084-2 VSY = 15V TA = 25C 10 100 1k 10k -60 -80 -100 -120 -140 100k FREQUENCY (Hz) -180 100 10k 100k FREQUENCY (Hz) Figure 71. Voltage Noise Density Figure 74. Channel Sepatation 70 1 ADA4084-2 VSY = 15V VIN = 100mV p-p RL = 2k TA = 25C 60 OS+ 0.1 THD + N (%) 50 40 30 20 OS- 0.01 0.001 ADA4084-2 VSY = 15V TA = 25C f = 1kHz 10 1 10 100 0.0001 0.001 08237-066 0 1000 CAPACITANCE (pF) 0.01 0.1 1 10 AMPLITUDE (VRMS) 08237-069 OVERSHOOT (%) 1k 08237-068 1 1 -40 -160 08237-065 VOLTAGE NOISE DENSITY (nV/Hz) -20 Figure 75. THD + N vs. Amplitude Figure 72. Overshoot vs. Load Capacitance 1 60 ADA4084-2 VSY = 15V TA = 25C 500kHz FILTER 40 THD + N (%) 0 0.01 -20 0.001 -60 0 2 4 6 8 TIME (Seconds) 10 Figure 73. Voltage Noise 0.1 Hz to 10 Hz 0.0001 10 100 1k 10k FREQUENCY (Hz) Figure 76. THD + N vs. Frequency Rev. B | Page 20 of 28 100k 08237-070 ADA4084-2 VSY = 15V TA = 25C -40 08237-067 VOLTAGE NOISE (nV) 0.1 20 Data Sheet ADA4084-2 20 ADA4084-2 VSY = 15V TA = 25C 15 5 0 OUTPUT -5 INPUT -10 -15 -20 0 100 200 300 400 500 600 700 TIME (s) 800 900 1000 08237-071 VOLTAGE (V) 10 Figure 77. No Phase Reversal Rev. B | Page 21 of 28 ADA4084-2 Data Sheet APPLICATIONS INFORMATION FUNCTIONAL DESCRIPTION The ADA4084-2 is a precision single-supply, rail-to-rail operational amplifier. Intended for portable instrumentation, the ADA4084-2 combines the attributes of precision, wide bandwidth, and low noise to make it an ideal choice in single-supply applications that require both ac and precision dc performance. Other low supply voltage applications for which the ADA4084-2 is well suited are active filters, audio microphone preamplifiers, power supply control, and telecommunications. To combine all of these attributes with rail-to-rail input/output operation, novel circuit design techniques are used. To achieve rail-to-rail output, the ADA4084-2 output stage design employs a unique topology for both sourcing and sinking current. This circuit topology is illustrated in Figure 79. The output stage is voltage-driven from the second gain stage. The signal path through the output stage is inverting; that is, for positive input signals, Q13 provides the base current drive to Q19 so that it conducts (sinks) current. For negative input signals, the signal path via Q18 mirror Q24 provides the base current drive for Q23 to conduct (source) current. Both transistors provide output current until they are forced into saturation. VCC R4 R3 R6 Q24 D2 Q1 D1 Q2 MIRROR D100 Q4 D101 Q3 VOUT R7 C2 Q13 D5 Q23 D4 VBIAS R5 Q18 C1 R2 Q21 D20 VEE Figure 78. ADA4084-2 Equivalent Input Circuit For example, Figure 78 illustrates a simplified equivalent circuit for the input stage of the ADA4084-2. It comprises a PNP differential pair, Q1 and Q2, and an NPN differential pair, Q3 and Q4, operating concurrently. Diode D100 and Diode D101 serve to clamp the applied differential input voltage to the ADA4084-2, thereby protecting the input transistors against Zener breakdown of the emitter-base junctions. Input stage voltage gains are kept low for input rail-to-rail operation. The two pairs of differential output voltages are connected to the second stage of the ADA4084-2, which is a modified compound folded cascade gain stage. It is also in the second gain stage, where the two pairs of differential output voltages are combined into a single-ended output signal voltage used to drive the output stage. 08237-074 R1 08237-073 Q19 Figure 79. ADA4084-2 Equivalent Output Circuit Thus, the saturation voltage of the output transistors sets the limit on the ADA4084-2 maximum output voltage swing. Output short-circuit current limiting is determined by the maximum signal current into the base of Q13 from the second gain stage. The output stage also exhibits voltage gain. This is accomplished by the use of common-emitter amplifiers, and, as a result, the voltage gain of the output stage (thus, the open-loop gain of the device) exhibits a dependence on the total load resistance at the output of the ADA4084-2. A key issue in the input stage is the behavior of the input bias currents over the input common-mode voltage range. Input bias currents in the ADA4084-2 are the arithmetic sum of the base currents in Q1 and Q4 and in Q2 and Q3. As a result of this design approach, the input bias currents in the ADA4084-2 not only exhibit different amplitudes; they also exhibit different polarities. This effect is best illustrated by Figure 9, Figure 10, Figure 34, Figure 35, Figure 59, and Figure 60. It is therefore important that the effective source impedances connected to the ADA4084-2 inputs be balanced for optimum dc and ac performance. Rev. B | Page 22 of 28 Data Sheet ADA4084-2 The ADA4084-2 is specified to operate from 3 V to 30 V (1.5 V to 15 V) under nominal power supplies. During power up as the supply voltage increases from 0 V to the nominal power supply voltage, the supply current (ISY) increases as well to the point at which it stabilizes and the amplifier is ready to operate. The stabilization varies with temperature, as shown in Figure 80, below such that at -40C it takes a higher voltage and stabilizes at a lower supply current than at hot temperatures where it takes a lower voltage but stabilizes at a higher current. In all cases, the ADA4084-2 is specified to start up and operate at a minimum of 3 V under all temperature conditions. 1000 For example, a 1 k resistor protects the ADA4084-2 against input signals up to 5 V above and below the supplies. Note that the thermal noise of a 1 k resistor at room temperature is 4 nV/Hz, which exceeds the voltage noise of the ADA4084-2. For other configurations where both inputs are used, each input should be protected against abuse with a series resistor. Again, to ensure optimum dc and ac performance, it is recommended that source impedance levels be balanced. R2 1/2 ADA4084-2 VIN R1 900 Figure 81. Resistance in Series with Input Limits Overvoltage Currents to Safe Values +125C +85C 700 +25C 600 -40C 500 400 300 200 ADA4084-2 TA = 25C RL = 100 0 0 4 8 12 16 20 24 28 VSY (V) 32 36 08237-072 ISY/AMPLIFIER (A) 800 Figure 80. Supply Current vs. Supply Voltage INPUT PROTECTION As with any semiconductor device, if conditions exist where the applied input voltages to the device exceed either supply voltage, the input overvoltage I-to-V characteristic of the device must be considered. When an overvoltage occurs, the amplifier may be damaged, depending on the magnitude of the applied voltage and the magnitude of the fault current. The D1, D2, D4, and D5 diodes conduct when the input commonmode voltage exceeds either supply pin by a diode drop. This varies with temperature and is in the range of 0.3 V to 0.8 V. As illustrated in the simplified equivalent circuit shown in Figure 78, the ADA4084-2 does not have any internal current limiting resistors; thus, fault currents can quickly rise to damaging levels. This input current is not inherently damaging to the device, provided that it is limited to 5 mA or less. If a fault condition causes more than 5 mA to flow, an external series resistor should be added at the expense of additional thermal noise. Figure 81 illustrates a typical noninverting configuration for an overvoltageprotected amplifier where the series resistance, RS, is chosen, such that RS = VOUT 08237-075 STARTUP CHARACTERISTICS To protect Q1-Q2 and Q3-Q4 from large differential voltages that may result in Zener breakdown of the emitter-base junction, D100 and D101 are connected between the two inputs. This precludes operation as a comparator. For a more complete description, see the MT-035 Tutorial, Op Amp Inputs, Outputs, Single-Supply, and Rail-to-Rail Issues; the MT-083 Tutorial, Comparators, the MT-084 Tutorial, Using Op Amps As Comparators; and the AN-849 Application Note, Using Op Amps as Comparators, at www.analog.com. OUTPUT PHASE REVERSAL Some operational amplifiers designed for single-supply operation exhibit an output voltage phase reversal when their inputs are driven beyond their useful common-mode range. Typically, for single-supply bipolar op amps, the negative supply determines the lower limit of their common-mode range. With these devices, external clamping diodes, with the anode connected to ground and the cathode to the inputs, prevent input signal excursions from exceeding the negative supply of the device (that is, GND), preventing a condition that causes the output voltage to change phase. JFET input amplifiers can also exhibit phase reversal, and, if so, a series input resistor is usually required to prevent it. The ADA4084-2 is free from reasonable input voltage range restrictions, provided that input voltages no greater than the supply voltages are applied (see Figure 27, Figure 52, and Figure 77). Although device output does not change phase, large currents can flow through the input protection diodes. Therefore, the technique recommended in the Input Protection section should be applied to those applications where the likelihood of input voltages exceeding the supply voltages is high. VIN ( MAX ) - VSUPPLY 5 mA Rev. B | Page 23 of 28 ADA4084-2 Data Sheet In single-supply applications, devices like the ADA4084-2 extend the dynamic range of the application through the use of rail-to-rail operation. Referring to the op amp noise model circuit configuration illustrated in Figure 82, the expression for an amplifier's total equivalent input noise voltage for a source resistance level, RS, is given by e nT = 2 [(e nR ) 2 + (inOA x R S )2 ] + (e nOA )2 , units in V Hz where: RS = 2R, the effective, or equivalent, circuit source resistance. (enR)2 is the source resistance thermal noise voltage power (4kTR). k is the Boltzmann's constant, 1.38 x 10-23 J/K. T is the ambient temperature in Kelvin of the circuit, 273.15 + TA (C). (inOA)2 is the op amp equivalent input noise current spectral power (1 Hz bandwidth). (enOA)2 is the op amp equivalent input noise voltage spectral power (1 Hz bandwidth). enR enOA NOISELESS R inOA enR NOISELESS inOA IDEAL NOISELESS OP AMP RS = 2R 08237-076 R Figure 82. Op Amp Noise Circuit Model Used to Determine Total Circuit Equivalent Input Noise Voltage and Noise Figure As a design aid, Figure 83 shows the total equivalent input noise of the ADA4084-2 and the total thermal noise of a resistor for comparison. Note that for source resistance less than 1 k, the equivalent input noise voltage of the ADA4084-2 is dominant. Because circuit SNR is the critical parameter in the final analysis, the noise behavior of a circuit is sometimes expressed in terms of its noise figure, NF. The noise figure is defined as the ratio of a circuit's output signal-to-noise to its input signal-to-noise. Noise figure is generally used for RF and microwave circuit analysis in a 50 system. This is not very useful for op amp circuits where the input and output impedances can vary greatly. For a more complete description of noise figure, see the MT-052 Tutorial, Op Amp Noise Figure: Don't be Mislead, available at www.analog.com. Signal levels in the application invariably increase to maximize circuit SNR, which is not an option in low voltage, single-supply applications. Therefore, to achieve optimum circuit SNR in single-supply applications, it is recommended that an operational amplifier with the lowest equivalent input noise voltage be chosen, along with source resistance levels that are consistent with maintaining low total circuit noise. COMPARATOR OPERATION Although op amps are quite different from comparators, occasionally an unused section of a dual or a quad op amp can be used as a comparator; however, this is not recommended for any rail-to-rail output op amps. For rail-to-rail output op amps, the output stage is generally a ratioed current mirror with bipolar or MOSFET transistors. With the part operating open loop, the second stage increases the current drive to the ratioed mirror to close the loop. However, it cannot, which results in an increase in supply current. With the op amp configured as a comparator, the supply current can be significantly higher (see Figure 84). An unused section should be configured as a voltage follower with the noninverting input connected to a voltage within the input voltage range. The ADA4084-2 has unique second stage and output stage designs that greatly reduce the excess supply current when the op amp is operating open loop. 800 SUPPLY CURRENT (A) ADA4084-2 TOTAL EQUIVALENT NOISE 10 600 BUFFER COMPARATOR OUTPUT HIGH 500 400 300 200 ADA4084-2 TA = 25C RL = 100 RESISTOR THERMAL NOISE ONLY 0 0 1 100 08237-077 EQUIVALENT THERMAL NOISE (nV/ Hz) 100 FREQUENCY = 1kHz TA = 25C COMPARATOR OUTPUT LOW 700 1k 10k 4 8 12 16 20 24 28 32 VSY (V) Figure 84. Supply Current vs. Supply Voltage 100k TOTAL SOURCE RESISTANCE, RS () Figure 83. ADA4084-2 Equivalent Thermal Noise vs. Total Source Resistance Rev. B | Page 24 of 28 36 08237-078 DESIGNING LOW NOISE CIRCUITS IN SINGLESUPPLY APPLICATIONS Data Sheet ADA4084-2 OUTLINE DIMENSIONS 3.20 3.00 2.80 8 3.20 3.00 2.80 5.15 4.90 4.65 5 1 4 PIN 1 IDENTIFIER 0.65 BSC 0.95 0.85 0.75 15 MAX 1.10 MAX 0.80 0.55 0.40 0.23 0.09 6 0 0.40 0.25 10-07-2009-B 0.15 0.05 COPLANARITY 0.10 COMPLIANT TO JEDEC STANDARDS MO-187-AA Figure 85. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters 5.00 (0.1968) 4.80 (0.1890) 1 5 4 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040) COPLANARITY 0.10 SEATING PLANE 6.20 (0.2441) 5.80 (0.2284) 1.75 (0.0688) 1.35 (0.0532) 0.51 (0.0201) 0.31 (0.0122) 0.50 (0.0196) 0.25 (0.0099) 45 8 0 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) COMPLIANT TO JEDEC STANDARDS MS-012-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 86. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches) Rev. B | Page 25 of 28 012407-A 8 4.00 (0.1574) 3.80 (0.1497) ADA4084-2 Data Sheet 3.10 3.00 SQ 2.90 0.50 BSC 8 5 0.50 0.40 0.30 0.80 0.75 0.70 0.30 0.25 0.20 1 4 BOTTOM VIEW TOP VIEW SEATING PLANE 1.70 1.60 SQ 1.50 EXPOSED PAD 0.05 MAX 0.02 NOM COPLANARITY 0.08 0.203 REF PIN 1 INDICATOR (R 0.15) FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION DATA SHEET. COMPLIANT TO JEDEC STANDARDS MO-229-WEED 07-06-2011-A PIN 1 INDEX AREA Figure 87. 8-Lead Lead Frame Chip Scale Package [LFCSP_WD] 3 x 3 mm Body, Very Very Thin, Dual Lead (CP-8-12) Dimensions shown in millimeters ORDERING GUIDE Model 1 ADA4084-2ARMZ ADA4084-2ARMZ-R7 ADA4084-2ARMZ-RL ADA4084-2ARZ ADA4084-2ARZ-R7 ADA4084-2ARZ-RL ADA4084-2ACPZ-R7 ADA4084-2ACPZ-RL 1 Temperature Range -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C Package Description 8-Lead Mini Small Outline Package [MSOP] 8-Lead Mini Small Outline Package [MSOP] 8-Lead Mini Small Outline Package [MSOP] 8-Lead Standard Small Outline Package [SOIC_N] 8-Lead Standard Small Outline Package [SOIC_N] 8-Lead Standard Small Outline Package [SOIC_N] 8-Lead Lead Frame Chip Scale Package [LFCSP_WD] 8-Lead Lead Frame Chip Scale Package [LFCSP_WD] Z = RoHS Compliant Part. Rev. B | Page 26 of 28 Package Option RM-8 RM-8 RM-8 R-8 R-8 R-8 CP-8-12 CP-8-12 Branding A2Q A2Q A2Q A2Q A2Q Data Sheet ADA4084-2 NOTES Rev. B | Page 27 of 28 ADA4084-2 Data Sheet NOTES (c)2011-2012 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D08237-0-6/12(B) Rev. B | Page 28 of 28