Supertex inc.
Supertex inc.
www.supertex.com
Doc.# DSFP-TP2424
B081313
TP2424
Features
►Low threshold
►High input impedance
►Low input capacitance
►Fast switching speeds
►Free from secondary breakdown
►Low input and output leakage
Applications
►Logic level interfaces
►Solid state relays
►Linear ampliers
►Power management
►Analog switches
►Telecom switches
General Description
This low threshold enhancement-mode (normally-off)
transistor utilizes a vertical DMOS structure and Supertex’s
well-proven silicon-gate manufacturing process. This
combination produces a device with the power handling
capabilities of bipolar transistors and with the high input
impedance and positive temperature coefcient inherent
in MOS devices. Characteristic of all MOS structures, this
device is free from thermal runaway and thermally-induced
secondary breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a wide
range of switching and amplifying applications where very
low threshold voltage, high breakdown voltage, high input
impedance, low input capacitance, and fast switching speeds
are desired.
Pin Conguration
Product Marking
TO-243AA (SOT-89)
TO-243AA (SOT-89)
TP4CW W = Code for week sealed
= “Green” Packaging
GATE
SOURCE
DRAIN
DRAIN
P-Channel Enhancement-Mode
Vertical DMOS FET
Absolute Maximum Ratings
Parameter Value
Drain-to-source voltage BVDSS
Drain-to-gate voltage BVDGS
Gate-to-source voltage ±20V
Operating and storage temperature -55OC to +150OC
Absolute Maximum Ratings are those values beyond which damage to the device
may occur. Functional operation under these conditions is not implied. Continuous
operation of the device at the absolute rating level may affect device reliability. All
voltages are referenced to device ground.
Ordering Information
Part Number Package Option Packing
TP2424N8-G TO-243AA (SOT-89) 2000/Reel
Product Summary
BVDSS/BVDGS
RDS(ON)
(max)
VGS(th)
(max)
ID(ON)
(min)
-240V 8.0Ω-2.4V -800mA
-G denotes a lead (Pb)-free / RoHS compliant package.
Contact factory for Wafer / Die availablity.
Devices in Wafer / Die form are lead (Pb)-free / RoHS compliant.
Typical Thermal Resistance
Package θja
TO-243AA (SOT-89) 133OC/W Package may or may not include the following marks: Si or
2
Supertex inc.
www.supertex.com
Doc.# DSFP-TP2424
B081313
TP2424
Thermal Characteristics
Package ID
(continuous)†
ID
(pulsed)
Power Dissipation
@ TA = 25OCIDR
†IDRM
TO-243AA (SOT-89) -316mA -1.9A 1.6W -316mA -1.9A
† ID (continuous) is limited by max rated Tj .
‡ Mounted on FR5 board, 25mm x 25mm x 1.57mm.
Switching Waveforms and Test Circuit
90%
10%
90% 90%
10%
10%
Pulse
Generator
VDD
R
L
OUTPUT
D.U.T.
t
(ON)
td(ON)
t(OFF)
td(OFF) tf
tr
INPUT
R
GEN
INPUT
OUTPUT
0V
VDD
0V
-10V
Sym Parameter Min Typ Max Units Conditions
Electrical Characteristics (TA = 25°C unless otherwise specied)
BVDSS Drain-to-source breakdown voltage -240 - - V VGS = 0V, ID = -250μA
VGS(th) Gate threshold voltage -1.0 - -2.4 V VGS = VDS, ID= -1.0mA
∆VGS(th) Change in VGS(th) with temperature - - 4.5 mV/OC VGS = VDS, ID= -1.0mA
IGSS Gate body leakage - - -100 nA VGS = ± 20V, VDS = 0V
IDSS Zero gate voltage drain current -
- -10 μA VGS = 0V, VDS = Max Rating
--1.0 mA VDS = 0.8 Max Rating,
VGS = 0V, TA = 125°C
ID(ON) On-state drain current -0.3 - - AVGS = -4.5V, VDS = -25V
-0.8 - - VGS = -10V, VDS = -25V
RDS(ON)
Static drain-to-source on-state
resistance
- - 10 ΩVGS = -4.5V, ID = -150mA
- - 8.0 VGS = -10V, ID = -500mA
∆RDS(ON) Change in RDS(ON) with temperature - - 0.75 %/OC VGS = -10V, ID = -500mA
GFS Forward transconductance 150 - - mmho VDS = -25V, ID = -200mA
CISS Input capacitance - - 200
pF
VGS = 0V,
VDS = -25V,
f = 1.0 MHz
COSS Common source output capacitance - - 100
CRSS Reverse transfer capacitance - - 40
td(ON) Turn-on delay time - - 20
ns
VDD = -25V,
ID = -250mA,
RGEN = 25Ω
trRise time - - 30
td(OFF) Turn-off delay time - - 35
tfFall time - - 25
VSD Diode forward voltage drop - - -1.5 V VGS = 0V, ISD = -500mA
trr Reverse recovery time - 300 - ns VGS = 0V, ISD = -500mA
Notes:
1. All D.C. parameters 100% tested at 25OC unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)
2. All A.C. parameters sample tested.
Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives
an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability
to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and
specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com)
©2013 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited. Supertex inc.
1235 Bordeaux Drive, Sunnyvale, CA 94089
Tel: 408-222-8888
www.supertex.com
3
TP2424
(The package drawing(s) in this data sheet may not reect the most current specications. For the latest package outline
information go to http://www.supertex.com/packaging.html.)
Doc.# DSFP-TP2424
B081313
3-Lead TO-243AA (SOT-89) Package Outline (N8)
Symbol A b b1 C D D1 E E1 e e1 H L
Dimensions
(mm)
MIN 1.40 0.44 0.36 0.35 4.40 1.62 2.29 2.00†
1.50
BSC
3.00
BSC
3.94 0.73†
NOM-------- --
MAX 1.60 0.56 0.48 0.44 4.60 1.83 2.60 2.29 4.25 1.20
JEDEC Registration TO-243, Variation AA, Issue C, July 1986.
† This dimension differs from the JEDEC drawing
Drawings not to scale.
Supertex Doc. #: DSPD-3TO243AAN8, Version F111010.
b b1
D
D1
E H E1
C
A
1 2 3
e
e1
Top View Side View
L