PI2DDR3212 1.35V/ 1.5V/1.8V 14 bit 2:1 DDR3/DDR4 Switch Features Description II14 bit 2:1 switch that supports DDR3 800 2133Mbps, DDR4 This 14-bit DDR3/DDR4 switch is designed for 1.35V/ 1.5V/ 1.8V supply voltage, POD_12, SSTL_135, SSTL_15 or SSTL_18 signaling and CMOS select input signals. It is designed for DDR3 or DDR4 memory bus with speed up to 5Gbps. It supports DDR3 800 2133Mbps and DDR4 1600~4266 Mbps. 1600~4266 Mbps IIVDD 1.35V/ 1.5V/ 1.8V IIFlow through pinout option for easy layout IISEL and Global Enable PI2DDR3212 has a 1:2 demux or 2:1 mux topology. All 14-bit channels can be switched to one of the two ports simultaneously with the SEL input. This device also allows all ports to be disconnected. II110 A typ. operating current at 1.35V VDD. IIHigh impedance and low Coff channel output when disabled or deselected IILow RON: 8 typical PI2DDR3212 uses Pericom's proprietary high speed switch technology providing consistent high bandwidth across all channels, with very little insertion loss, cross-talk, and bit to bit skew. II3dB Bandwidth: 3.3GHz IILow insertion loss: -0.7dB (0 IILow return loss: -23dB (0 f 1 GHz) f 1 GHz) It is available in a 52-pin TQFN 3.5x9mm package and 48pin TFBGA 4.5x4.5mm package. The 48-pin version is pin compatible with CBTW28DD14. IILow cross-talk for high speed channels: -25dB typ. (0<f<2GHz) IILow off-isolation: -28dB (0 f 1 GHz) IILow bit-to-bit skew 20ps Max Application IIESD: 2KV HBM IIDDR3/DDR4 Memory Bus System IIPOD_12, SSTL_12, SSTL_135, SSTL_15 or SSTL_18 IINVDIMM Module signaling IIFlash Memory Array sub system IIPackaging (Pb-free and Green) IIHigh Speed multiplexing aa 52 pin TQFN (3.5x9mm) aa 48 pin TFBGA (4.5x4.5mm)pin compatible with CBTW28DD14 B13 C13 B12 C12 GND Pin Configuration (52-pin TQFN) 52 51 50 49 48 Pin Configuration (48 pin TFBGA ) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 B11 C11 B10 C10 B9 C9 B8 C8 B7 C7 VDD B6 C6 B5 C5 B4 C4 B3 C3 B2 C2 C0 B0 C1 B1 GND 22 23 24 25 26 GND EN A13 A12 A11 VDD A10 A9 A8 A7 GND A6 A5 A4 A3 VDD A2 A1 A0 SEL GND 14-0169 1 www.pericom.com10/23/14 PI2DDR3212 1.35V/ 1.5V/1.8V 14 bit 2:1 DDR3/DDR4 Switch Block Diagram A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 SEL EN LOGIC CONTROL Application Supercapacitor NVDIMM Application using PI2DDR3212 SSD, Flash storage application using PI2DDR3212 14-0169 2 www.pericom.com10/23/14 PI2DDR3212 1.35V/ 1.5V/1.8V 14 bit 2:1 DDR3/DDR4 Switch Pin Description Pin Name IO Type Descriptions VDD Power 1.35V, 1.5V or 1.8V power supply. GND Ground 1.35V, Ground connection A[0:13] I/O 14-bit wide input/output, port A B[0:13] I/O 14-bit wide input/output, port B C[0:13] I/O 14-bit wide input/output, port C SEL I CMOS input for channel selection CMOS input EN I When HIGH, connection is set using the SEL input signal When LOW, all ports are mutually isolated Truth Table (SEL) Truth Table (EN) SEL Function EN Function 0 Output B is selected 1 Global Enable 1 Output C is selected 0 Global Disable 14-0169 3 www.pericom.com10/23/14 PI2DDR3212 1.35V/ 1.5V/1.8V 14 bit 2:1 DDR3/DDR4 Switch Maximum Ratings (Above which useful life may be impaired. For user guidelines, not tested.) Supply Voltage to Ground Potential ...................................... -0.3V to 2.5V All Inputs.......................................................................... -0.3V to VDD+0.3V Ambient Operating Temperature ............................................-10 to +85C Storage Temperature.................................................................-65 to +150C Junction Temperature .......................................................................... 150C Soldering Temperature.......................................................................... 260C Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Recommended Operation Conditions Parameter Min. Ambient Operating Temperature -10 Power Supply Voltage (measured in respect to GND) +1.28 Typ. 1.8 Max. Unit +85 C +2.0 V Static Characteristics Symbol Parameter VDD Supply Voltage IDD VDD Supply Current IDD VDD Supply Current Conditions Min. Typ. Max. Unit 1.35/ 2 1.5 / 1.8 V EN= HIGH; VDD =1.8V 220 350 A EN= LOW; VDD =1.8V 0.1 10 A EN= HIGH; VDD =1.35V 110 200 A EN= LOW; VDD =1.35V 0.05 2 A 1.28 Control pin (SEL, EN) IIH High level digital input current VIH=VDD, VDD =2.0V 5 A IIL Low level digital input current VIL = GND, VDD =2.0V 5 A VIH High level digital input voltage VIL Low level digital input voltage 0.8 *VDD V 0.2*VDD V I/O pin (A, B ,C) COFF Switch OFF capacitance f = 1MHz; VI/O = 0V 1.1 pF CON Switch ON capacitance f = 1MHz; VI/O = 0V 2.1 pF 14-0169 4 www.pericom.com10/23/14 PI2DDR3212 1.35V/ 1.5V/1.8V 14 bit 2:1 DDR3/DDR4 Switch Dynamic Characteristics (over recommended operating conditions unless otherwise noted) Symbol Parameter tstartup Startup time Test Conditions Min. Supply voltage valid or EN going Typ.(1) Max. 5 HIGH to channels specified characteristics 10 s trcfg Reconfiguration time SEL state change to channel specified operating characteristics tpd Propagation delay From A port to B port or C port or vice versa 60 tsk Skew time From any output to any output 18 VI Input Voltage B Bandwidth C Crosstalk attenuation IL Insertion Loss RL OI 0.02 -0.3 0.04 ps 20 ps Vdd+0.3 V 3.3 GHz -26 dB 0 f 1GHz -0.7 dB f = 2.5GHz -2.5 dB Input Return Loss 0 f 1GHz -23 dB Off Isolation 0 f 1 GHz -28 dB 14-0169 -3dB intercept Units Adjacent channels are on; 0 f 1GHz 5 www.pericom.com10/23/14 PI2DDR3212 1.35V/ 1.5V/1.8V 14 bit 2:1 DDR3/DDR4 Switch Packaging Mechanical: 48-Pin TFBGA DATE: 07/21/11 DESCRIPTION: 48-pin, Thin Fine Pitch Ball Grid Array PACKAGE CODE: NC (NC48) DOCUMENT CONTROL #: PD-2103 14-0169 6 REVISION: -- www.pericom.com10/23/14 PI2DDR3212 1.35V/ 1.5V/1.8V 14 bit 2:1 DDR3/DDR4 Switch Packaging Mechanical: 52-Pin TQFN (ZL) DATE: 07/15/11 Notes: 1. All dimensions are in millimeters. 2. Refer JEDEC MO-220 3. Bilateral coplanarity zone applies to the exposed heat sink slug aswell as the terminals. DESCRIPTION: 52-Pin, Thin Quad Flat No-Lead (TQFN) PACKAGE CODE: ZL (ZL52) DOCUMENT CONTROL #: PD-2102 REVISION: -- Ordering Information Ordering Code Packaging Code Package Description PI2DDR3212ZLE ZL 52-Pin, Thin Quad Flat No-Lead (TQFN) PI2DDR3212NCE NC 48-Pin, Thin Fine Pitch Ball Grid Array (TFBGA) NOTES: 1. Thermal characteristics can be found on the company web site at www.pericom.com/package 2. E = Pb-free and Green 3. Adding an X suffix = Tape/Reel Pericom Semiconductor Corporation * 1-800-435-2336 14-0169 7 www.pericom.com10/23/14