Dot-Matrix
LCD Units
(with built-in controllers)
DISPLAY UNIT USER’S MANUAL
Specifications are subject to change without notice.
Suggested applications (if any) are for standard use; See Important Restrictions for limitations on
special applications. See Limited Warranty for SHARP’s product warranty. The Limited Warranty is
in lieu, and exclusive of, all other warranties, express or implied. ALL EXPRESS AND IMPLIED
WARRANTIES, INCLUDING THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR USE
AND FITNESS FOR A PARTICULAR PURPOSE, ARE SPECIFICALLY EXCLUDED. In no event
will SHARP be liable, or in any way responsible, for any incidental or consequential economic or
property damage.
© 1999 Copyright SHARP Microelectronics of the Americas. Printed in the USA.
Reference No. SMT99007
Contents
PREFACE . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . 3
OVERVIE W . . . . . . . . . . . . . . . . . . . . . . . . . . 3
HARDWARE . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Interfa ce Sig na l s . . . . . . . . . . . . . . . . . . . . . 4
Functiona l B l ocks . . . . . . . . . . . . . . . . . . . . . 4
Microprocessor In te rfa ce . . . . . . . . . . . . . . . . 11
Reset Fun ctio n . . . . . . . . . . . . . . . . . . . . . 12
INSTRUCTIONS . . . . . . . . . . . . . . . . . . . . . . . 15
General In fo rmat i on . . . . . . . . . . . . . . . . . . . 1 5
Description of I nst ruct ion . . . . . . . . . . . . . . . . 1 5
ELECTRICAL CHARACTERISTICS . . . . . . . . . . . . . 19
Absolute Ma ximum Rat ing s . . . . . . . . . . . . . . . 19
Electrical Ch ara cte ristics . . . . . . . . . . . . . . . . 1 9
Timing Chara cte ristics . . . . . . . . . . . . . . . . . . 1 9
Power Con dit ion s f or In terna l Re set . . . . . . . . . . . 20
LCD UNIT USAGE I N STRUCTI ONS . . . . . . . . . . . . 21
Interfac e with E xte rna l Micro processo r . . . . . . . . . 21
Co ntrast Control Vol tage . . . . . . . . . . . . . . . . 24
Sample I nst ruct ion P r oce dur es . . . . . . . . . . . . . 24
HANDLING INSTRUCTI ONS . . . . . . . . . . . . . . . . 28
OPERATING RESTRICTIONS . . . . . . . . . . . . . . . 29
Dot-Matrix LCD Units
Display Unit User’s Manual 1
PREFACE
The Sharp dot-matrix LCD units, with built-in con-
trollers, operate under the control of a 4-bit or 8-bit
microcomputer to display alphanumeric characters,
symbols, etc.
The LCD unit provides the user with a dot-matrix
display panel featuring simple interfac e circ uitry.
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Table 1.
Dot-Matrix LCD Unit with Built-In Controllers
Dot-Matrix LCD Un its
2Display Unit User’s Manual
FEATURES
•Inter fa c e wi th either 4-bit or 8-bit
microprocessor.
•Display data RAM
•80 × 8 bits (80 characters).
•Charact er ge ner ator ROM
•160 differen t 5 × 7 do t-m atri x char acter
patterns.
•Charact er ge ner ator RAM
•8 differen t user prog r am med 5 × 7
dot-matrix patterns.
•Displa y dat a RAM an d char acter gene rat or
RAM may be acce ssed b y t he
microprocessor.
•Numerous instructions
•Clear Display, Cursor Home, Display
ON/OFF, Cursor ON/ OFF, Blin k Chara cte r,
Cursor Shift, Display Shift.
•Built-in reset circuit is triggered at power
ON.
•Built-in oscillator.
OVERVIEW
The LCD unit receives character codes (8 bits per
character) from a microprocessor or microcomputer,
latches the codes to its display data RAM (80-byte
DD RAM for storing 80 characters), transforms each
character code into a 5 × 7 dot-matrix character
pattern, and displays the characters on its LCD
screen.
The LCD unit incorporates a character generator
ROM which produces 160 differ ent 5 × 7 dot-matrix
character patterns. The unit also provides a char-
acter generator RAM (64 bytes) through which the
user may define up to eight additional 5 × 7 dot-ma-
trix character patterns, as required by the applica-
tion.
To display a character, positional data is sent via
the data bus from the microprocessor to the LCD
unit, where it is written into the instruction register.
A character code is then sent and written into the
data register. The LCD unit displays the correspond-
ing character pattern in the specified position. The
LCD unit can either increment or decrement the
display position automatically after each character
entry, so that only successive characters codes
need to be entered to display a continuous character
string. The display/cursor shift instruction allows the
entry of characters in either the left-to-right or right-
to-left direction. Since the display data RAM (DD
RAM) and the character generator RAM (CG RAM)
many be accessed by the microprocessor, unused
portions of each RAM may be used as general
purpose data areas. The LCD unit may be operated
with either dual 4-bit or single 8-bit data transers, to
accommodate interfaces with both 4-bit and 8-bit
microprocessors. The low power feature of the LCD
unit will be further appreciated when combined with
a CMOS microproc essor.
Dot-Matrix LCD Units
Display Unit User’s Manual 3
HARDWARE
Interface Signals
Functional Blocks
Registers
The LCD unit has two 8-bit register s - an instruc-
tion register (IR) and a data register (DR). The
instruction register stores instruction c odes such as
"clear display" or "shift cursor", and also stores
address information for the display data RAM and
character generator RAM. The IR can be accessed
by the microproces sor only for wr iting.
The data register is used for temporarily storing
data during data transactions with the microproces-
sor. When writing data to the LCD unit, the data is
initially stored in the data register, and is then auto-
matically written into either the display data RAM or
character generator RAM, as determined by the
current operation. The data register is also used as
a temporary storage area when reading data from
the display data RAM or character gener ator RAM.
When address information is written into the instruc-
tion register, the corresponding data from the display
data RAM or character generator RAM is moved to
the data register. Data transfer is completed when
the microprocessor reads the contents of the data
register by the next instr uction. After the tr ansfer is
completed, data from the next address position of
the appropriate RAM is moved to the data register,
in preparation for subsequent reading operations by
the microprocessor. One of the two registers is
selected by the regis ter select (RS) signal.
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Table 2. Interface Signals
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Table 3. Register Selection
Dot-Matrix LCD Un its
4Display Unit User’s Manual
Busy Flag (BF)
When the busy flag is set at a logical "1", the LCD
unit is executing an internal operation, and no in-
struction will be accepted. The state of the busy flag
is output on data line DB7 in response to the register
selection signals RS = 0, R/W = 1 as shown in Table
3. The next instruction may be entered after the
busy flag is reset to logical "0".
Addre ss Co un te r ( A C )
The address counter generates the address for
the display data RAM and character generator
RAM. When the address set instruction is written
into the instruction register, the address information
is sent to the address counter. The same instruciton
also determines which of the two RAM’s is to be
selected.
After data has been written to or read from the
display data RAM or charac ter generator RAM , the
address counter is automatically incremented or
decremented by one. The contents of the address
counter are output on data lines DB0 - DB6 in
response to the register selection signals RS = 0,
R/W = 1 as shown in Table 3.
Display Data RAM (DD RAM)
This 80 x 8 bit RAM stores up to 80 8-bit character
codes as display data. The unused area of the RAM
may be used by the microprocessor as a general
purpose RAM area.
The display data RAM address, set in the address
counter, is expressed in hexadecimal (HEX) num-
bers as follows:
The address of the display data RAM corre-
sponds to the display position on the LCD panel as
follows:
a. Address type a . . . .For dual-line display
When a display shift takes place, the addresses
shift is as follows:
The addresses for the second line are not con-
tinuous to the addresses for the first line. A 40-char-
acter RAM area is assigned to each of the two line
as follows:
line 1: 00H - 27H
line 2: 40H - 67H
For an LCD unit with a display capacity of less
than 40 characters per line, characters equal in
number to the display capacity, as counted from
display position 1, are displayed.
b. Address type b . . . .For single-line display with
logically dual-line addres sing
When a display shift takes place, the addresses
shift as follows:
The right-hand eight characters, for the purposes
of addressing and shifting, may be considered to
constitute a second display line. For the address
type of each model, see Table 12.
AC6 AC5 AC4 AC3 AC2 AC1 AC0
HEX
Digit
AC
High-order
Bits Lower-order
Bits
HEX
Digit
1
Example: DD RAM address '4E'
001 11 0
4E
9876543213940
Display Position
DD RAM Address (HEX)
Digit
Line 1
Line 2
00
H
01
H
02
H
03
H
04
H
05
H
06
H
07
H
08
H
26
H
27
H
40
H
41
H
42
H
43
H
44
H
45
H
46
H
47
H
48
H
66
H
67
H
. . .
. . .
Left
Shift
01
H
02
H
03
H
04
H
05
H
06
H
07
H
08
H
09
H
27
H
00
H
41
H
42
H
43
H
44
H
45
H
46
H
47
H
48
H
49
H
67
H
40
H
. . .
. . .
Right
Shift
27
H
00
H
01
H
02
H
0
3
H
04
H
05
H
06
H
07
H
25
H
26
H
67
H
40
H
41
H
42
H
43
H
44
H
45
H
46
H
47
H
65
H
66
H
. . .
. . .
161514
Display PositionDigit
Line
1DD RAM Address (HEX)
13121110987654321
00H47H
46H
45H
44H
43H
42H
41H
40H
07H
06H
05H
04H
03H
02H
01H
Left
Shift
01
H
48
H
47
H
46
H
45
H
44
H
43
H
42
H
41
H
08
H
07
H
06
H
05
H
04
H
03
H
02
H
Right
Shift
27
H
46
H
45
H
44
H
43
H
42
H
41
H
40
H
67
H
06
H
05
H
04
H
03
H
02
H
01
H
00
H
Dot-Matrix LCD Units
Display Unit User’s Manual 5
Character Generator ROM (CG ROM)
This ROM generates a 5 × 7 dot-matrix character
pattern for each of 160 different 8-bit character
codes. The correspondence between character
codes and character patterns is shown in Tables 4
and 5. Inquiries are invited for units with custom
character patterns.
Character Generator RAM (CG RAM)
This RAM stores eight arbitrary 5 x 7 dot-matrix
character patterns, as programmed by the user . For
displaying a character pattern stored in the CG
RAM, a character code corresponding to the left-
most column in Tables 4 and 5 is written into the
display data RAM.
For the relationship among the CG RAM address,
the display data, and the displayed pattern, see
Table 6. As shown in Table 6., the unused portion
of the CG RAM may be us ed as a general purpos e
RAM area.
Timing G en erato r
The timing generator produces timing signals
used for the internal operation of the display data
RAM, character generator ROM,and character gen-
erator RAM. T iming in controlled so that read-out of
the RAM for display and access to the RAM by the
external microprocessor do not interfere. Display
flicker when data is written to the display data RAM
is eliminated.
Cursor/Blink Controller
This circuit can be used to generate a cursor or
blink a character in the display position indicated by
the DD RAM address, which is set in the address
counter (AC). The following example shows the
cursor position when the address counter contains
"08" (HEX).
Parallel-to-Serial Converter
This circuit converts parallel data read from the
CG ROM or CG RAM to serial data for use by the
display driver.
Bias Voltag e Ge nerator
This circuit provides the bias voltage level re-
quired for driving the liquid crystal display. Some
models incorporate a temperature compensation
circuit which generates a temperature dependent
bias voltage in order to provide constant display
contrast at all ambient temper ature levels.
LCD Driver
This circuit receives display data, timing signals,
and bias voltage, and produces the common and
segment display si gnals.
LCD Panel
This is a dot-matix liquid crystal display panel
arranged in either 1 row of 16 characters, 2 r ows of
16 characters, 2 rows of 20 characters, or 2 rows of
40 characters.
AC 0001000
AC
6
AC
0
AC
1
AC
2
AC
3
AC
4
AC
5
Digit
Line 1
Line 2
Display Position
DD RAM
Address (HEX)
DD RAM
Address (HEX)
Cursor Position
Cursor Position
Single-Line
Display
1110987654321
00 0A090807060504030201
Digit Display Position
Dual-Line
Display
NOTE:
The address counter has the dual function of containing either
a DD RAM address or a CG RAM address. The cursor/blink
controller does not distinguish between these two functions,
and thus, when activated, it always considers the address
counter to contain a DD RAM address. To avoid spurious
cursor/blink effects, the cursor/blink function should be turned
off while the microprocessor writes to or reads from the CG RAM.
1110987654321
00 0A090807060504030201
40 4A494847464544434241
Dot-Matrix LCD Un its
6Display Unit User’s Manual
LCD
Panel
Common
Electrode
Drive
Circuit
Segment
Electrode
Drive
Circuit
Display
Data
Signals 4
Scanning
Signals 3
LED
back-
light
V
LED
V
LSS
4
EL
back-
light
EL
Inverter
(See note 2) 5 V
Timing
Generator
Cursor/Blink
Controller
33
7
7
7
Display Data
RAM
(DD RAM)
80 x 8 bits
Address
Counter
(AC)
7
7
7
Instruction
Decoder
Instruction
Register (/R)
8
Character
Generator
ROM
(CG ROM)
7,200 bits
8
8
Character
Generator
ROM
(CG ROM)
512 bits
7
8
Parallel-to-Serial
Converter
5
5
Bias
Voltage
Generator
(See Note 1)
6
Data Register
(DR)
8
I/O Buffer
8
Busy
Flag (BF)
7
8
RS R/W E
4 4
DB
4
- DB
7
DB
0
- DB
3
V
DD
V
O
V
SS
LCD27-6
NOTES:
1. LM16152 incorporates a temperature compensation circuit
within the bias voltage generator. See table 12.
2. For the inverters of EL backlights, please contact your
representative.
Figur e 1. Fu nct ion al Block Diag r am
Dot-Matrix LCD Units
Display Unit User’s Manual 7
0000
HIGH-ORDER
4 BIT
LOW-
ORDER 4 BIT
0010 0011 0100 0101 0110 0111 1010 1011 1100 1101 1110 1111
xxxx0000
xxxx0001
xxxx0010
xxxx0011
xxxx0100
xxx0101
xxx0110
xxxx0111
xxxx1000
xxxx1001
xxxx1010
xxxx1011
xxxx1100
xxxx1101
xxxx1110
xxxx1111
CG
RAM
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
NOTES:
1. The CG RAM generates character patterns in accordance with the user's program.
2. Shaded areas indicate 5 x 10 dot character patterns.
Table 4. Character Codes
Dot-Matrix LCD Un its
8Display Unit User’s Manual
High-Order
CG
RAM
(1)
(3)
(4)
(5)
(6)
(7)
(8)
(1)
(2)
(3)
(4)
(6)
(7)
(8)
××××0000
××××0001
××××0010
××××0011
××××0100
××××0101
××××0110
××××0111
××××1000
××××1001
××××1010
××××1011
××××1100
××××1101
××××1110
××××1111
0000
0@P\p
1
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αp
äq
2
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BRb r
3
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CSc s
4$DTdt
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GWg w
8
(HXh x
9
)IYi y
:
*
JZj z
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K[k{
βθ
ε∞
µΩ
σü
ρΣ
π
√x
_1y
j
x
¢
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n
ö
0010 0011 0100 0101 0110 0111 1010 1011 1100 1101 1110 1111
Low-
Order 4 bit
(2)
(5) <
’
L¥1|
=
-
M]m}
>
.
N^n→
?
/
O_o←
4 bit
Table 5. Character Codes
Dot-Matrix LCD Units
Display Unit User’s Manual 9
Character Code
(DD RAM Data) CG RAM Address Character Pattern
(CG RAM Data)
Sample
Character
Pattern
(1)
Cursor
Position
Sample
Character
Pattern
(2)
7
High-order
bit Low-order
bit
6543210
000011
0000*000
000 1101
**
*
*
**
1
001
010
100
101
111
110
001011
000
001
010
100
101
111
110
111
100
101
111
110
001
000
0000*001
0000*111
High-order
bit Low-order
bit
543210 7
High-order
bit Low-order
bit
6543210
00110
00110
1001001010
00110
00000
11011
001
*1
**
***
***
***
001001
11111
1111110000
10000
00000
10000
NOTES:
1. Character code bits 0 - 2 correspond to CG RAM address bits
3 - 5. Each of the 8 unique bit strings designates one of the 8
character patterns.
2. CG RAM address bits 0 - 2 designate the row position of each
character pattern. The 8th row is the cursor position. CG RAM
data in the 8th row is OR'ed with the display cursor. Any '1'
bits in the 8th row will result in a displayed dot regardless of the
cursor status (ON/OFF). Accordingly, if the cursor is to be
used, CG RAM data for the 8th row should be set to '0'.
3. CG RAM data bits 0 - 4 correspond to the column position of
each character pattern bit 4 corresponding to the left most
column of the character pattern. CG RAM data bits 5 - 7 are
not used for displaying character patterns, but may be used as
a general purpose RAM area.
4. As shown in tables 4 and 5, character patterns in the CG RAM
are accessed by character codes with bits 4 - 7 equal to '0'. For
example, the character pattern 'R', shown in the first sample
character pattern of the table, is selected by the character code
'00' (HEX) or '08' (HEX), since bit 3 of the character code is a
don't care" bit (i.e., can take either value, '00' or '1').
5. CG RAM data '1' produces a dark dot, and data '0' produces a
light dot in the corresponding position on the display panel.
6.
*
= Signifies a "don't care" bit
LCD27-8
Table 6. Relationship Among Character Code
(DD RAM), CG RAM Address, and Character Pattern (CG RAM)
Dot-Matrix LCD Un its
10 Display Unit User’s Manual
Microprocessor Interface
The LCD unit performs either dual 4-bit or single
8-bit data transers, allowing the user to interface with
either a 4-bit or 8-bit mi croprocess or
4-Bit Microproce ssor Interfa ce.
Data lines DB4 - DB7 are used for data transfers.
Data transactions with the external microprocess or
take place in two 4-bit data transfer oper ations.
The high-order 4 bits (corresponding to DB4 - DB7
in an 8-bit transfer) are trans ferred first, followed by
the low-order 4 bits (corresponding to DB0 - DB3 in
an 8-bit transfer). The busy flag is to be checked on
completion of the second 4-bit data transfer. Busy
flag and address counter are output in two opera-
tions.
8-bit Microproce ssor Interfa ce
Each 8-bit piece of data is transferred in a single opera-
tion using the entire data bus DB0 - DB7.
IR
7
DB
7
DB
6
DB
5
DB
4
RS
R/W
E
IR
3
AC
3
DR
7
DR
3
BF
IR
6
IR
2
AC
2
DR
6
DR
2
AC
6
IR
5
IR
1
AC
1
DR
5
DR
1
AC
5
IR
4
IR
0
AC
0
DR
4
DR
0
AC
4
Write to
Instruction
Register (IR)
Read Busy
Flag (BF) and
Address
Counter (AC)
Read Data
Register (DR)
LCD27-9
Figure 2. 4-Bit Data Transfer
Dot-Matrix LCD Units
Display Unit User’s Manual 11
Reset Function
Initialization by Internal Reset Circuit
The LCD unit has an internal reset circuit for
implementing an automatic reset operation at
power-on. During the initalization operation, the
busy flag is set. The busy state lasts for 10 msec
after VDD reaches 4.5 V. The following instructions
are executed in initializing the LCD unit.
1. Clear Display
2. Function Set
DL = 1 . . . . 8-bit data length for interface
N = 0 . . . . Single-line display
F = 0 . . . . 5 × 7 dot-m atrix character font
3. Display ON/OFF Control
D = 0 . . . .Display OFF
C = 0 . . . .Cursor OFF
B = 0 . . . .Blink function OFF
4. Entry Mode Set
I/D = 1 . . . .Increment Mode
S = 0 . . . .Display shift OFF
CAUTION
If the power conditions stated in Table 11, "P ower condi-
tions applicable when internal reset circuit is used," are
not satisfied, then internal reset circuit will not operate
properly and the LCD unit will not be initalized. In this
case, the initialization procedure must be executed by the
extern al m i croprocess or.
Dot-Matrix LCD Un its
12 Display Unit User’s Manual
Initialization by Instructions
If the power conditions for the normal operation
of the internal reset circuit are not satisfied (see
Table 11), then LCD unit must be initialized by
executing a series of instructions. The procedure
for this initialization process is as follows :
Power ON
Wait 15 ms or more
after V
DD
reaches 4.5 V
RS R/W DB
7
DB
6
DB
5
DB
4
DB
3
DB
2
DB
1
DB
0
000011
****
Wait 4.1 ms or more
RS R/W DB
7
DB
6
DB
5
DB
4
DB
3
DB
2
DB
1
DB
0
000011
****
Wait 100 µs or more
End of Initialization
RS R/W DB
7
DB
6
DB
5
DB
4
DB
3
DB
2
DB
1
DB
0
000011
****
RS R/W DB
7
DB
6
DB
5
DB
4
DB
3
DB
2
DB
1
DB
0
000011NF
**
0000001000
0000000001
00000001I/DS
Busy flag can't be checked before execution of this
instruction
Function Set (8-Bit Interface)
Busy flag can't be checked before execution of this
instruction
Function Set (8-Bit Interface)
Busy flag can't be checked before execution of this
instruction
Function Set (8-Bit Interface)
(a) Busy flag can be checked after the following instructions
are completed. If the busy flag is not going to be checked,
then a wait time longer than the total execution time of
these instructions is required (See Table 7.)
Function Set
Display Off
Display Clear
Entry Mode Set
8-Bit Interface,
Single/Dual Line
Display, Display Font
Caution: At this point,
the display format
an't be changed.
LCD21-10
Figure 3. 8-Bit Interface
Dot-Matrix LCD Units
Display Unit User’s Manual 13
4-Bit Interface
Power ON
Wait 15 ms or more
after V
DD
reaches 4.5 V
RS R/W DB
7
DB
6
DB
5
DB
4
000011
Wait 4.1 ms or more
RS R/W DB
7
DB
6
DB
5
DB
4
000011
RS R/W DB
7
DB
6
DB
5
DB
4
000011
RS R/W DB
7
DB
6
DB
5
DB
4
000010
000010
00NF **
Wait 100 µs or more
End of Initialization
Busy flag can't be checked before execution of this
instruction
Function Set (8-Bit Interface)
Busy flag can't be checked before execution of this
instruction
Function Set (8-Bit Interface)
Busy flag can't be checked before execution of this
instruction
Function Set (8-Bit Interface)
(a) Busy flag can be checked after the following instructions
are completed. If the busy flag is not going to be checked,
then a wait time longer than the total execution time of
these instructions is required (See Table 7.)
This instruction signals the LCD unit to begin accepting and
sending data in dual 4-bit transfers for all subsequent
transfers for all subsequent transactions. This is the only
4-bit instruction recognized by the LCD unit.
II Function Set
III Display Off
IV Display Clear
V Entry Mode Set
4-Bit Interface,
Single/Dual Line
Display, Display Font
LCD21-11
000000
001000
00 0 0 0O
000001
000000
0 0 0 1 I/D S
I Function Set (4-Bit Interface)
I
II
III
IV
V
Caution: At this point,
the display format
can't be changed.
Figure 4. 4-Bit Interface
Dot-Matrix LCD Un its
14 Display Unit User’s Manual
INSTRUCTIONS
General In formation
When the LCD unit is controlled by an external
microprocessor, the only registers which can be
directly accessed by the microprocessor are the
instruction register (IR) and data register (DR). Con-
trol information is buffered to allow the LCD unit to
interface with various microprocessors and periph-
eral control devices with different operating speeds.
The internal operation of the LCD unit is determined
by the signals se nt from the external microproces-
sor. These signals include the register select (RS)
signal, the read/write (R/W) signal, and the data bus
(DB0 - DB7) signals.
Table 7 lists the instructions available to the LCD
unit, with their execution times. The instructions fall
into the following four categories.
1. Instructions for setting LCD unit functions, such
as display form at and data length
2. Instructions for address ing the internal RAM’ s
3. Instructions for transferring data to or from the
internal RAM’s
4. Other instructions
In normal operation, instructions from category
(3) are used most frequently. The internal RAM
address may be incremented or decremented auto-
matically after each data transaction, to reduce the
programming requirements of the microprocessor.
The display may also be shifted automatically after
each display data write (see Sample Instruction
Procedures sec t ion for examples). These features
facilitate the construction of ef ficient sy stems.
During the internal execution of an instruction, no
instruction other than the "busy flag/address counter
read" instruction will be accepted. During internal
operation the busy flag is set to " 1". It is neces sary
for the microproc essor to check that the busy flag is
reset to "0" before sending the next instr uction.
NOTE
Eith er the mi cr op ro ce ss or mus t c he ck th at th e bu sy flag
is not set to "1" before sending each instruction, or the
inter val wa ited bef ore send ing ea ch instr uction mu st be
made sufficiently longer than the execution time of the
previous instruction. For the execution time of each
inst ruct ion, se e Table 7.
Description of Instruction
Display Clear
The display data RAM is filled with the "space"
code, 20H. The address counter is reset to zer o. If
the display has been shifted, the original position is
restored. By execution of this instruction, the dis-
play goes off, and the cursor and character blink
functions, if activated, are moved to the upper, left-
most display position.
Display/Cursor Home
The address counter is reset to zero. If the dis-
play has been shifted, the original position is re-
stored. The content of the DD RAM is not affect ed.
The cursor and character blink functions, if acti-
vated, are moved to the upper, leftmost display
position.
Entry Mod e Set
I/D: The address counter is incremented (I/D = 1) or
decremented (I/D = 0) by one, following the
reading or writing of each display data RAM
character code. The cursor and charac ter blink
functions move one display position to the right
(I/D = 1) or left (I/D = 0). The same operation
takes place when data is written to or read from
the character generator RAM.
S: When S = 1, the entire display is shifted one
position to the left (I/D = 1) or right (I/D = 0)
following the writing of a display data RAM
character code. The cursor and charac ter blink
functions do not move relative to the display
position. When S = 0, the display is not shifted.
The display is not shifted when writing data to
the character generator RAM.
DB0
DB
7
RS R/W
0CODE 000000001
DB
0
DB
7
RS R/W
0CODE
NOTE:
*
= Don't Care
00000001
*
DB
0
DB
7
RS R/W
0CODE 0 0 0 0 0 0 0 I/D S
Dot-Matrix LCD Units
Display Unit User’s Manual 15
Display ON/OFF
D: When D = 1, the display is turned on.
When D = 0, the display is turned off with the
display data retained in the display data RAM.
C: When C = 1, the cursor is displayed in the
position specified by the address counter. When
C = 0, the cursor is not dis played. The cursor is
made up of five dots displayed across the 8th
display row , below the 5 × 7 dot-matrix character
block. For 5 × 10 dot- matrix character blocks , 5
dots are displayed acr oss the 11th row.
B: When B = 1, the character at the cursor position
blinks on and off. When this function is acti-
vated, at or fosc = 250 kHz, alternating
between all dots black, and the display charac-
ter, the character is alternately displayed for
409.6 ms and blanked for 409.6 ms. The cursor
may be used simultaneously with the charac ter
blink function. (Blink frequency varies in propor-
tion to the reciprocal of fCP or fOSC.
409.6 × 250/270 = 379.2 ms; fCP = 270 kHz. )
Display/Cursor Shift
The display and/or cursor are shifted to the right
or left. For two-line displays, the cursor moves from
the 40th position of the top line to the first position of
the second line. From the 40th position of the
second line, the cursor does not move back to the
home position, but rather to the first position of the
second line.
NOTE:W hen th e disp lay is shift ed , the ad dres s coun ter is
not affected.
Function Set
DL: Selects the interface data length. When DL = 1,
8-bit data transfers are used. When DL = 0, 4-bit
data transfers are us ed.
NOTE
When using a 4-bit data length, two transfer operations
are ne eded to tr ansfer a comp lete data wor d to or from
the ex te rnal micoprocessor.
N: Selects display format (single or dual line). See
Table 12 for the correct input value for each
model.
CAUTION
The function set instruction must be executed at the
beginning of the microprocessor program, before all other
instructions except the busy flag/address counter read
instruction. The function set instruction cannot be exe -
cuted again except to change the interface data length.
Once set, the display format cannot be changed.
DB
0
DB
7
RS R/W
0CODE 000001DCB
LCD27-16
Cursor
(A) Cursor Function (B) Character Blink Function
Character Font
5 x 7 dot Character Font
5 x 10 dot
DB
0
DB
7
RS R/W
0CODE
NOTE:
*
= Don't Care
0 0 0 0 1 S/C R/L
**
6& 5/

6KLIW WKH FXUVRU WR WKH OHIW $&
←
$&

6KLIW WKH FXUVRU WR WKH ULJKW $&
←
$&
6KLIW WKH HQWLUH GLVSOD\ ZLWK WKH FXUVRU WR WKH OHIW
6KLIW WKH HQWLUH GLVSOD\ ZLWK WKH FXUVRU WR WKH ULJKW
DB0
DB
7
RS R/W
0CODE
NOTE:
*
= Don't Care
0001DLN0
**
Dot-Matrix LCD Un its
16 Display Unit User’s Manual
CG RAM Address Set
The address counter is loaded with a character
generator RAM address, expressed as a 6-digit
binary number. Following the execution of this in-
struction, subsequent data transactions will be be-
tween the external microprocessor and the
character generator RAM.
DD RAM Address Set
The address counter is loaded with a display data
RAM address, expressed as a 7-digit binary num-
ber . Following the execution of this instruction, sub-
sequent data transactions will be between the
external microprocessor and the display data RAM.
For N = 0 (single line display), the binary number,
ADD may have a value ranging from 00H to 4FH. For
N = 1 (dual line display), the binary number, ADD,
may have a value ranging from 00H to 27H for the
first line, or 40H to 67H for the second line.
Busy Flag/Addre ss Coun te r Re ad
The busy flag (BF) is read out, and indicates
whether or not the LCD unit is still executing the
previous instruction. BF = 1 indicates the busy state
(internal operation), and the next instruction will not
be accepted until BF = 0. This instruction also reads
out the contents of the address counter, expressed
as a 7-digit binary number. The addr ess c ounter is
used for accessing both the character generator
RAM and the display data RAM. On read-out, the
address counter will contain either a character gen-
erator RAM address or a display data RAM address,
as determined by the most recently executed ad-
dress set inst ruction.
CG RAM/DD RAM Data Writ e
An 8-bit data word is written into either the char-
acter generator RAM or display data RAM, as de-
termined by the most recently executed address set
instruciton. The data is written into the RAM location
specified by the address counter. After the data is
written into the RAM, the address counter is either
incremented or decremented by one, as determined
by the current entry mode. A display shift may also
take place after the data is written.
CG RAM/DD RAM Data Read
An 8-bit data word is read from either the charac-
ter generator RAM or display data RAM, as deter-
mined by a previously executed address set
instruction. The data is read from the RAM location
specified by the address c ounter.
This instruction must be immediately preceded by
the CG RAM address set instruction, the DD RAM
address set instruction, the cursor shift instruction,
or a previous CG RAM/ DD RAM data r ead instr uc-
tion. Any other preceding instruction will cause in-
valid data to be read. The address set ins t ructions
cause the address counter to be loaded with a valid
data read address.
The cursor shift command allows selected DD
RAM data to be read without the necessity of reset-
ting the DD RAM address. Following the cursor shift
instruction, the CG RAM/DD RAM data read instruc-
tion will read data from the DD RAM.
After the execution of each data read instruction,
the address counter is either incremented or decre-
mented by one, as deter m ined by the current entry
mode. It is not necessary to reset the RAM address
before the execution of subsequent data read in-
structions if the same RAM is to be read. The
display is not shifted by the data read ins truction.
NOTE
Afte r the execut ion of the CG RA M/DD RAM data writ e
instruction, the address counter is incremented or decre-
mented automatically . However , the contents of the RAM
locati on sp ecifie d by the addres s coun ter ca nnot be re ad
by a subsequent CG RAM/DD RAM data read instruction.
The cor rect procedure f or reading data from the CG RAM
or D D RAM is to exe cute an ad dress s et or curs or shif t
instruction. Once a data read instruction has been exe-
cuted, successive data read instructions may be exe-
cuted, with no requirement for intervening instructions.
DB0
DB
7
RS R/W
0CODE 0 0 1 A A A A A A
DB
0
DB
7
RS R/W
0CODE 01AAAAAAA
DB
0
DB
7
RS R/W
0CODE 1BFA A AA A AA1
DB0
DB
7
RS R/W
1CODE 0DDDDDDDD
DB0
DB
7
RS R/W
1CODE 1DDDDDDDD
Dot-Matrix LCD Units
Display Unit User’s Manual 17