LT1126/LT1127
11267fa
1
FREQUENCY (Hz)
3
RMS VOLTAGE NOISE DENSITY (nV/ Hz)
10
30
100
0.1 10 100 1000
1126-7 TA01b
1
1.0
√
MAXIMUM
TYPICAL
V = 15V
T = 25°C
S
A
±
1/f CORNER
2.3Hz
GAIN = 1000, BANDWIDTH = 480kHz
INPUT REFERRED NOISE = 4.5nV/ Hz AT 1kHz, 6µV
RMS
OVER BANDWIDTH
+
–
1/4
LT1127
1126-7 TA01
OUTPUT
1/4
LT1127
10k
620
6.2k
200
6.2k
10k
√
Ω
– INPUT
Ω
620Ω
+ INPUT
1/4
LT1127
+
–
+
–
, LTC and LT are registered trademarks of Linear Technology Corporation. All other
trademarks are the property of their respective owners. Protected by U.S. Patents including
4775884, 4837496.
The LT
®
1126 dual and LT1127 quad are high perfor-
mance, decompensated op amps that offer higher slew
rate and bandwidth than the LT1124 dual and the LT1125
quad operational amplifiers. The enhanced AC perfor-
mance is available without degrading DC specs of the
LT1124/LT1125. Both LT1126/LT1127 are stable in a gain
of 10 or more.
In the design, processing and testing of the device, par-
ticular attention has been paid to the optimization of the
entire distribution of several key parameters. Slew rate,
gain-bandwidth and 1kHz noise are 100% tested for each
individual amplifier. Consequently, the specifications of
even the lowest cost grades (the LT1126C and the LT1127C)
have been enhanced.
Power consumption of the dual LT1126 is less than one
half of two OP-37s. Low power and high performance in an
8-pin SO package makes the LT1126 a first choice for
surface mounted systems and where board space is
restricted.
■
Two and Three Op Amp Instrumentation Amplifiers
■
Low Noise Signal Processing
■
Active Filters
■
Microvolt Accuracy Threshold Detection
■
Strain Gauge Amplifiers
■
Direct Coupled Audio Gain Stages
■
Tape Head Preamplifiers
■
Microphone Preamplifiers
■
Accelerometer Amplifiers
■
Infrared Detectors
■
100% Tested Low Voltage Noise: 2.7nV/√Hz Typ,
4.2nV/√Hz Max
■
Slew Rate: 11V/µs Typ
■
Gain-Bandwidth Product: 65MHz Typ
■
Offset Voltage, Prime Grade: 70µV Max
Low Grade: 100µV Max
■
High Voltage Gain: 5 Million Min
■
Supply Current Per Amplifier: 3.1mA Max
■
Common Mode Rejection: 112dB Min
■
Power Supply Rejection: 116dB Min
■
Available in 8-Lead SOIC, 8-Lead DIP, 16-Lead SO
and 14-Lead DIP Packages
APPLICATIO S
U
TYPICAL APPLICATIO
U
DESCRIPTIO
U
FEATURES
Dual/Quad
Decompensated Low Noise,
High Speed Precision Op Amps
Low Noise, Wide Bandwidth Instrumentation Amplifier Voltage Noise vs Frequency
2
LT1126/LT1127
11267fa
PACKAGE/ORDER I FOR ATIO
UUW
ABSOLUTE AXI U RATI GS
W
WW
U
(Note 1)
Operating Temperature Range
LT1126AM/LT1126M
LT1127AM/LT1127M (OBSOLETE) .. –55°C to 125°C
LT1126AC/LT1126C
LT1127AC/LT1127C ............................ –40°C to 85°C
Storage Temperature Range
All Grades ......................................... –65°C to 150°C
Supply Voltage ..................................................... ±22V
Input Voltage ............................ Equal to Supply Voltage
Output Short Circuit Duration .......................... Indefinite
Differential Input Current (Note 5) ......................±25mA
Lead Temperature (Soldering, 10 sec.)................. 300°C
J PACKAGE
14-LEAD CERAMIC DIP
TJMAX = 160°C, θJA = 80°C/W
1
2
3
4
5
6
7
TOP VIEW
N PACKAGE
14-LEAD PDIP
14
13
12
11
10
9
8
OUT A
–IN A
+IN A
V
+
+IN B
–IN B
OUT B
OUT D
–IN D
+IN D
V
–
+IN C
–IN C
OUT C
B
A
C
D
1
2
3
4
8
7
6
5
TOP VIEW
OUT A
–IN A
+IN A
V–
V+
OUT B
–IN B
+IN B
N8 PACKAGE
8-LEAD PDIP
A
B
1
2
3
4
5
6
7
8
TOP VIEW
SW PACKAGE
16-LEAD PLASTIC SO WIDE
16
15
14
13
12
11
10
9
OUT A
–IN A
+IN A
V
+
+IN B
–IN B
OUT B
NC
OUT D
–IN D
+IN D
V
–
+IN C
–IN C
OUT C
NC
B
A
C
D
LT1127ACN
LT1127CN
LT1126ACN8
LT1126CN8
ORDER PART
NUMBER
LT1127CSW
ORDER PART
NUMBER
LT1126CS8
1126
1
2
3
4
8
7
6
5
TOP VIEW
–IN A
OUT A
V
+
OUT B
+IN A
V
–
+IN B
–IN B
S8 PACKAGE
8-LEAD PLASTIC SO
A
B
T
JMAX
= 140°C, θ
JA
= 190°C/W
NOTE: THIS PIN CONFIGURATION DIFFERS FROM THE
8-PIN PDIP CONFIGURATION. INSTEAD, IT FOLLOWS
THE INDUSTRY STANDARD LT1013DS8 SO PACKAGE
PIN LOCATIONS
T
JMAX
= 140°C, θ
JA
= 130°C/W
T
JMAX
= 140°C, θ
JA
= 130°C
T
JMAX
= 140°C, θ
JA
= 110°C (N)
Consult LTC Marketing for parts specified with wider operating temperature ranges.
OBSOLETE PACKAGE
Consider the N8 for Alternate Source
LT1126AMJ8
LT1126MJ8
LT1126CJ8
J8 PACKAGE
8-LEAD CERAMIC DIP
TJMAX = 160°C, θJA = 100°C/W
LT1127AMJ
LT1127MJ
LT1127CJ
OBSOLETE PACKAGE
Consider the N for Alternate Source
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
S8 PART
MARKING
LT1126/LT1127
11267fa
3
V
OS
Input Offset Voltage LT1126 20 70 25 100 µV
LT1127 25 90 30 140 µV
∆V
OS
Long Term Input Offset 0.3 0.3 µV/Mo
∆Time Voltage Stability
I
OS
Input Offset Current LT1126 5 15 6 20 nA
LT1127 6 20 7 30 nA
I
B
Input Bias Current ±7±20 ±8±30 nA
e
n
Input Noise Voltage 0.1Hz to 10Hz (Notes 8, 9) 70 200 70 nVp-p
Input Noise Voltage Density f
O
= 10Hz (Note 5) 3.0 5.5 3.0 5.5 nV/√Hz
f
O
= 1000Hz (Note 3) 2.7 4.2 2.7 4.2 nV/√Hz
i
n
Input Noise Current Density f
O
= 10Hz 1.3 1.3 pA/√Hz
f
O
= 1000Hz 0.3 0.3 pA/√Hz
V
CM
Input Voltage Range ±12.0 ±12.8 ±12.0 ±12.8 V
CMRR Common Mode Rejection Ratio V
CM
= ±12V 112 126 106 124 dB
PSRR Power Supply Rejection Ratio V
S
= ±4V to ±18V 116 126 110 124 dB
A
VOL
Large Signal Voltage Gain R
L
≥ 10kΩ, V
O
= ±10V 5.0 17.0 3.0 15.0 V/µV
R
L
≥ 2kΩ, V
O
= ±10V 2.0 4.0 1.5 3.0 V/µV
V
OUT
Maximum Output Voltage Swing R
L
≥ 2kΩ±13.0 ±13.8 ±12.5 ±13.8 V
SR Slew Rate R
L
≥ 2kΩ (Notes 3, 7) 8.0 11 8.0 11 V/µs
GBW Gain-Bandwidth Product f
O
= 10kHz (Note 3) 45 65 45 65 MHz
Z
O
Open Loop Output Resistance V
O
= 0, I
O
= 0 75 75 Ω
I
S
Supply Current Per Amplifier 2.6 3.1 2.6 3.1 mA
Channel Separation f ≤ 10Hz (Note 9) 134 150 130 150 dB
V
O
= ±10V, R
L
= 2kΩ
The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at VS = ±15V,
−55°C ≤ TA ≤ 125°C, unless otherwise noted.
LT1126AM/AC LT1126M/C
LT1127AM/AC LT1127M/C
SYMBOL PARAMETER CONDITIONS (Note 2) MIN TYP MAX MIN TYP MAX UNITS
ELECTRICAL C CHARA TERISTICS
VS = ±15V, TA = 25°C, unless otherwise noted.
LT1126AM LT1126M
LT1127AM LT1127M
SYMBOL PARAMETER CONDITIONS (Note 1) MIN TYP MAX MIN TYP MAX UNITS
V
OS
Input Offset Voltage LT1126 ●50 170 60 250 µV
LT1127 ●55 190 70 290 µV
∆V
OS
Average Input Offset Voltage Drift (Note 5) ●0.3 1.0 0.4 1.5 µV/°C
∆Temp
I
OS
Input Offset Current LT1126 ●18 45 20 60 nA
LT1127 ●18 55 20 70 nA
I
B
Input Bias Current ●±18 ±55 ±20 ±70 nA
V
CM
Input Voltage Range ●±11.3 ±12 ±11.3 ±12 V
CMRR Common Mode Rejection Ratio V
CM
= ±11.3V ●106 122 100 120 dB
PSRR Power Supply Rejection Ratio V
S
= ±4V to ±18V ●110 122 104 120 dB
A
VOL
Large Signal Voltage Gain R
L
≥ 10kΩ, V
O
= ±10V ●3.0 10.0 2.0 10.0 V/µV
R
L
≥ 2kΩ, V
O
= ±10V ●1.0 3.0 0.7 2.0 V/µV
V
OUT
Maximum Output Voltage Swing R
L
≥ 2kΩ●±12.5 ±13.6 ±12.0 ±13.6 V
SR Slew Rate R
L
≥ 2kΩ (Notes 3, 7) ●7.2 10 7.0 10 V/µs
I
S
Supply Current Per Amplifier ●2.8 3.5 2.8 3.5 mA
4
LT1126/LT1127
11267fa
The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at VS = ±15V,
−40°C ≤ TA ≤ 85°C, unless otherwise noted. (Note 10)
LT1126AC LT1126C
LT1127AC LT1127C
SYMBOL PARAMETER CONDITIONS (Note 2) MIN TYP MAX MIN TYP MAX UNITS
V
OS
Input Offset Voltage LT1126 ●35 120 45 170 µV
LT1127 ●40 140 50 210 µV
∆V
OS
/∆T Average Input Offset Voltage Drift (Note 5) ●0.3 1.0 0.4 1.5 µV/°C
I
OS
Input Offset Current LT1126 ●625 735 nA
LT1127 ●735 845 nA
I
B
Input Bias Current ●±8±35 ±9±45 nA
V
CM
Input Voltage Range ●±11.5 ±12.4 ±11.5 ±12.4 V
CMRR Common Mode Rejection Ratio V
CM
= ±11.5V ●109 125 102 122 dB
PSRR Power Supply Rejection Ratio V
S
= ±4V to ±18V ●112 125 107 122 dB
A
VOL
Large Signal Voltage Gain R
L
≥ 10kΩ, V
O
= ±10V ●4.0 15.0 2.5 14.0 V/µV
R
L
≥ 2kΩ, V
O
= ±10V ●1.5 3.5 1.0 2.5 V/µV
V
OUT
Maximum Output Voltage Swing R
L
≥ 2kΩ●±12.5 ±13.7 ±12.0 ±13.7 V
SR Slew Rate R
L
≥ 2kΩ (Notes 3, 7) ●7.5 10.5 7.3 10.5 V/µs
I
S
Supply Current Per Amplifier ●2.7 3.3 2.7 3.3 mA
LT1126AC LT1126C
LT1127AC LT1127C
SYMBOL PARAMETER CONDITIONS (Note 2) MIN TYP MAX MIN TYP MAX UNITS
V
OS
Input Offset Voltage LT1126 ●40 140 50 200 µV
LT1127 ●45 160 55 240 µV
∆V
OS
/∆T Average Input Offset Voltage Drift (Note 5) ●0.3 1.0 0.4 1.5 µV/°C
I
OS
Input Offset Current LT1126 ●15 40 17 55 nA
LT1127 ●15 50 17 65 nA
I
B
Input Bias Current ●±15 ±50 ±17 ±65 nA
V
CM
Input Voltage Range ●±11.4 ±12.2 ±11.4 ±12.2 V
CMRR Common Mode Rejection Ratio V
CM
= ±11.4V ●107 124 101 121 dB
PSRR Power Supply Rejection Ratio V
S
= ±4V to ±18V ●111 124 106 121 dB
A
VOL
Large Signal Voltage Gain R
L
≥ 10kΩ, V
O
= ±10V ●3.5 12.0 2.2 12.0 V/µV
R
L
≥ 2kΩ, V
O
= ±10V ●1.2 3.2 0.8 2.3 V/µV
V
OUT
Maximum Output Voltage Swing R
L
≥ 2kΩ●±12.5 ±13.6 ±12.0 ±13.6 V
SR Slew Rate R
L
≥ 2kΩ (Note 7) ●7.3 10.2 7.1 10.2 V/µs
I
S
Supply Current Per Amplifier ●2.8 3.4 2.8 3.4 mA
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at VS = ±15V, 0°C ≤ TA ≤ 70°C, unless otherwise noted.
Note 7: Slew rate is measured in A
V
= –10; input signal is ±1V, output
measured at ±5V.
Note 8: 0.1Hz to 10Hz noise can be inferred from the 10Hz noise voltage
density test. See the test circuit and frequency response curve for 0.1Hz to
10Hz tester in the Applications Information section of the LT1007 or
LT1028 datasheets.
Note 9: This parameter is guaranteed but not tested.
Note 10: The LT1126/LT1127 are designed, characterized and expected to
meet these extended temperature limits, but are not tested at –40°C and at
85°C. Guaranteed I grade parts are available. Consult factory.
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: Typical parameters are defined as the 60% yield of parameter
distributions of individual amplifiers; i.e., out of 100 LT1127s (or 100
LT1126s) typically 240 op amps (or 120) will be better than the indicated
specification.
Note 3: This parameter is 100% tested for each individual amplifier.
Note 4: This parameter is sample tested only.
Note 5: This parameter is not 100% tested.
Note 6: The inputs are protected by back-to-back diodes. Current limiting
resistors are not used in order to achieve low noise. If differential input
voltage exceeds ±1.4V, the input current should be limited to 25mA.
LT1126/LT1127
11267fa
5
SUPPLY VOLTAGE (V)
0
0
SUPPLY CURRENT PER AMPLIFIER (mA)
1
2
3
5101520
1126-7 G06
± ± ± ±
25°C
125°C
–55°C
FREQUENCY (Hz)
80
COMMON MODE REJECTION RATIO (dB)
100
120
140
160
1k 100k 1M 10M
1126-7 G05
10k
60
40
20
0
TA = 25°C
VS = ±15V
VCM = ±10V
FREQUENCY (Hz)
VOLTAGE GAIN (dB)
40
100
120
1126-7 G04
10.01 100 10k 1M 100M
–20
0
20
60
140
160
180
80
VS = ±15V
TA = 25°C
A = –10, V = 15V
VCL S ±
1126-7 G03
+10V
0V
–10V
1126-7 G02
–50mV
A = –10, V = 15V OR 5V
C = 15pF
VCL S ± ±
L
0mV
50mV
FREQUENCY (MHz)
0.1
–10
VOLTAGE GAIN (dB)
10
30
40
50
1.0 10 100
1126-7 G01
0
20
180
140
100
80
60
160
120
PHASE SHIFT (DEGREES)
V = 15V
T = 25°C
C = 10pF
S
A
L
±
GAIN
Ø
CCHARA TERISTICS
UW
ATYPICALPER
FORCE
*See LT1115 data sheet for definition of CCIF testing
Gain, Phase Shift vs Frequency Small-Signal Transient Response Large-Signal Transient Response
Common Mode Rejection Ratio vs
Voltage Gain vs Frequency Frequency Supply Current vs Supply Voltage
The typical behavior of many LT1126/LT1127 parameters
is identical to the LT1124/LT1125. Please refer to the
LT1124/LT1125 data sheet for the following performance
characteristics:
0.1Hz to 10Hz Voltage Noise
0.01Hz to 1Hz Voltage Noise
Current Noise vs Frequency
Input Bias or Offset Current vs Temperature
Output Short Circuit Current vs Time
Input Bias Current Over the Common Mode Range
Voltage Gain vs Temperature
Input Offset Voltage Drift Distribution
Offset Voltage Drift with Temperature of Representative
Units
Output Voltage Swing vs Load Current
Common Mode Limit vs Temperature
Channel Separation vs Frequency
Warm-Up Drift
Power Supply Rejection Ratio vs Frequency
6
LT1126/LT1127
11267fa
LT1126AM/AC LT1126M/C
LT1127AM/AC LT1127M/C
PARAMETER 50% YIELD 98% YIELD 50% YIELD 98% YIELD UNITS
V
OS
Match, ∆V
OS
LT1126 20 110 30 130 µV
LT1127 30 150 50 180 µV
Temperature Coefficient Match 0.35 1.0 0.5 1.5 µV/°C
Average Non-Inverting I
B
618725 nA
Match of Non-Inverting I
B
722830 nA
CMRR Match 126 115 123 112 dB
PSRR Match 127 118 127 114 dB
APPLICATIO S I FOR ATIO
WUUU
FREQUENCY (Hz)
INTERMODULATION DISTORTION (IMD) (%)
3k 10k 20k
1126-7 G09
Z
L
= 2k/15pF
f (IM) = 1kHz
f
O
= 13.5kHz
V
O
= 20Vp-p
A
V
= –10
MEASUREMENT BANDWITH
= 10Hz TO 80kHz
LT1126
0.010
0.1
0.001
0.0001
FREQUENCY (Hz)
TOTAL HARMONIC DISTORTION + NOISE (%)
0.010
0.1
20 1k 10k 20k
1126-7 G08
100
0.001
0.0001
Z
L
= 2k/15pF
V
O
= 20Vp-p
A
V
= +10, +100
MEASUREMENT BANDWITH
= 10Hz TO 80kHz
A
V
= +10
A
V
= +100
FREQUENCY (Hz)
TOTAL HARMONIC DISTORTION + NOISE (%)
0.010
0.1
20 1k 10k 20k
1126-7 G07
100
0.001
0.0001
ZL = 2k/15pF
VO = 20Vp-p
AV = –10, –100
MEASUREMENT BANDWITH
= 10Hz TO 80kHz
AV = –10
AV = –100
Total Harmonic Distortion Total Harmonic Distortion
and Noise vs Frequency for and Noise vs Frequency for Intermodulation Distortion
Inverting Gain Non-Inverting Gain (CCIF Method)* vs Frequency
CCHARA TERISTICS
UW
ATYPICALPER
FORCE
*See LT1115 data sheet for definition of CCIF testing
Matching Specifications
In many applications the performance of a system de-
pends on the matching between two op amps, rather than
the individual characteristics of the two devices. The three
op amp instrumentation amplifier configuration shown in
this data sheet is an example. Matching characteristics are
not 100% tested on the LT1126/LT1127.
Expected Match
Some specifications are guaranteed by definition. For
example, 70µV maximum offset voltage implies that mis-
match cannot be more than 140µV. 112dB (= 2.5µV/V)
CMRR means that worst case CMRR match is 106dB
(5µV/V). However, the following table can be used to
estimate the expected matching performance between the
two sides of the LT1126, and between amplifiers A and D,
and between amplifiers B and C of the LT1127.
LT1126/LT1127
11267fa
7
–
+
OUTPUT
1126-7 AI01
RSCS
RF
CF
CIN
FREQUENCY (Hz)
GAIN ERROR (%)
0.01
0.1
1.0
0.1 10 100
1126-7 TA03
0.001 1
GAIN ERROR = CLOSED LOOP GAIN
OPEN LOOP GAIN
TYPICAL
PRECISION
OP AMP
LT1126/LT1127
–
+
OUTPUT
1126-7 TA02
365Ω
1%
INPUT
15k
5%
340k
1%
20k
TRIM
+15V
–15V
RN60C FILM RESISTORS
THE HIGH GAIN AND WIDE BANDWIDTH OF THE LT1126/LT1127 IS USEFUL IN LOW FREQUENCY HIGH CLOSED
LOOP GAIN AMPLIFIER APPLICATIONS. A TYPICAL PRECISION OP AMP MAY HAVE AN OPEN LOOP GAIN OF ONE
MILLION WITH 500kHz BANDWIDTH. AS THE GAIN ERROR PLOT SHOWS, THIS DEVICE IS CAPABLE OF 0.1%
AMPLIFYING ACCURACY UP TO 0.3Hz ONLY. EVEN INSTRUMENTATION RANGE SIGNALS CAN VARY AT A FASTER
RATE. THE LT1126/LT1127 “GAIN PRECISION — BANDWIDTH PRODUCT” IS 330 TIMES HIGHER, AS SHOWN.
LT1126
High Speed Operation
When the feedback around the op amp is resistive (R
F
), a
pole will be created with R
F
, the source resistance and
capacitance (R
S
, C
S
), and the amplifier input capacitance
(C
IN
≈ 2pF). In low closed loop gain configurations and
Gain Error vs Frequency
Closed Loop Gain = 1000
U
SA
O
PPLICATITYPICAL
Gain 1000 Amplifier with 0.01% Accuracy, DC to 5Hz
with R
S
and R
F
in the kilohm range, this pole can create
excess phase shift and even oscillation. A small capacitor
(C
F
) in parallel with R
F
eliminates this problem. With
R
S
(C
S
+ C
IN
) = R
F
C
F
, the effect of the feedback pole is
completely removed.
APPLICATIO S I FOR ATIO
WUUU
8
LT1126/LT1127
11267fa
J8 Package
8-Lead CERDIP (Narrow .300 Inch, Hermetic)
(Reference LTC DWG # 05-08-1110)
√3
1126-7 TA04
–
+
–
+
–
+
1.1k
1.1k
1.1k 2.4k
2.4k
2.4k 7.5k 500Ω
1/4
LT1127 OUTPUT
1/4
LT1127
1/4
LT1127
1/4
LT1127
120
120
120
INPUT
–3dB BANDWIDTH = 910 kHz
GAIN BANDWIDTH PRODUCT = 91.0MHz
WIDEBAND NOISE = = 1.85nV/√Hz REFERRED TO INPUT
RMS NOISE DC TO FULL BANDWIDTH = 21.2µV REFERRED TO INPUT
3.2nV/√Hz
–
+
U
SA
O
PPLICATITYPICAL
Low Noise, Wideband, Gain = 100 Amplifier with High Input Impedance
PACKAGE DESCRIPTIO
U
OBSOLETE PACKAGE
J8 0801
.014 – .026
(0.360 – 0.660)
.200
(5.080)
MAX
.015 – .060
(0.381 – 1.524)
.125
3.175
MIN
.100
(2.54)
BSC
.300 BSC
(7.62 BSC)
.008 – .018
(0.203 – 0.457) 0° – 15°
.005
(0.127)
MIN
.405
(10.287)
MAX
.220 – .310
(5.588 – 7.874)
1234
8765
.025
(0.635)
RAD TYP
.045 – .068
(1.143 – 1.650)
FULL LEAD
OPTION
.023 – .045
(0.584 – 1.143)
HALF LEAD
OPTION
CORNER LEADS OPTION
(4 PLCS)
.045 – .065
(1.143 – 1.651)
NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE OR TIN PLATE LEADS
LT1126/LT1127
11267fa
9
PACKAGE DESCRIPTIO
U
N8 Package
8-Lead PDIP (Narrow .300 Inch)
(Reference LTC DWG # 05-08-1510)
N8 1002
.065
(1.651)
TYP
.045 – .065
(1.143 – 1.651)
.130 ± .005
(3.302 ± 0.127)
.020
(0.508)
MIN
.018 ± .003
(0.457 ± 0.076)
.120
(3.048)
MIN 12 34
87 65
.255 ± .015*
(6.477 ± 0.381)
.400*
(10.160)
MAX
.008 – .015
(0.203 – 0.381)
.300 – .325
(7.620 – 8.255)
.325 +.035
–.015
+0.889
–0.381
8.255
()
NOTE:
1. DIMENSIONS ARE INCHES
MILLIMETERS
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)
.100
(2.54)
BSC
S8 Package
8-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
J Package
14-Lead CERDIP (Narrow .300 Inch, Hermetic)
(Reference LTC DWG # 05-08-1110)
.016 – .050
(0.406 – 1.270)
.010 – .020
(0.254 – 0.508)× 45°
0°– 8° TYP
.008 – .010
(0.203 – 0.254)
SO8 0303
.053 – .069
(1.346 – 1.752)
.014 – .019
(0.355 – 0.483)
TYP
.004 – .010
(0.101 – 0.254)
.050
(1.270)
BSC
1234
.150 – .157
(3.810 – 3.988)
NOTE 3
8765
.189 – .197
(4.801 – 5.004)
NOTE 3
.228 – .244
(5.791 – 6.197)
.245
MIN .160 ±.005
RECOMMENDED SOLDER PAD LAYOUT
.045 ±.005
.050 BSC
.030 ±.005
TYP
INCHES
(MILLIMETERS)
NOTE:
1. DIMENSIONS IN
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
OBSOLETE PACKAGE
J14 0801
.045 – .065
(1.143 – 1.651)
.100
(2.54)
BSC
.014 – .026
(0.360 – 0.660)
.200
(5.080)
MAX
.015 – .060
(0.381 – 1.524)
.125
(3.175)
MIN
.300 BSC
(7.62 BSC)
.008 – .018
(0.203 – 0.457) 0° – 15°
1234567
.220 – .310
(5.588 – 7.874)
.785
(19.939)
MAX
.005
(0.127)
MIN 14 11 891013 12
.025
(0.635)
RAD TYP
NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE
OR TIN PLATE LEADS
10
LT1126/LT1127
11267fa
PACKAGE DESCRIPTIO
U
N14 1103
.020
(0.508)
MIN
.120
(3.048)
MIN
.130 ± .005
(3.302 ± 0.127)
.045 – .065
(1.143 – 1.651)
.065
(1.651)
TYP
.018 ± .003
(0.457 ± 0.076)
.005
(0.127)
MIN
.255 ± .015*
(6.477 ± 0.381)
.770*
(19.558)
MAX
31 24567
8910
11
1213
14
.008 – .015
(0.203 – 0.381)
.300 – .325
(7.620 – 8.255)
.325 +.035
–.015
+0.889
–0.381
8.255
()
NOTE:
1. DIMENSIONS ARE INCHES
MILLIMETERS
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)
.100
(2.54)
BSC
N Package
14-Lead PDIP (Narrow .300 Inch)
(Reference LTC DWG # 05-08-1510)
LT1126/LT1127
11267fa
11
PACKAGE DESCRIPTIO
U
SW Package
16-Lead Plastic Small Outline (Wide .300 Inch)
(Reference LTC DWG # 05-08-1620)
S16 (WIDE) 0502
NOTE 3
.398 – .413
(10.109 – 10.490)
NOTE 4
16 15 14 13 12 11 10 9
1
N
2345678
N/2
.394 – .419
(10.007 – 10.643)
.037 – .045
(0.940 – 1.143)
.004 – .012
(0.102 – 0.305)
.093 – .104
(2.362 – 2.642)
.050
(1.270)
BSC .014 – .019
(0.356 – 0.482)
TYP
0° – 8° TYP
NOTE 3
.009 – .013
(0.229 – 0.330)
.005
(0.127)
RAD MIN
.016 – .050
(0.406 – 1.270)
.291 – .299
(7.391 – 7.595)
NOTE 4
× 45°
.010 – .029
(0.254 – 0.737)
INCHES
(MILLIMETERS)
NOTE:
1. DIMENSIONS IN
2. DRAWING NOT TO SCALE
3. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS.
THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS
4. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
.420
MIN
.325 ±.005
RECOMMENDED SOLDER PAD LAYOUT
.045 ±.005
N
1 2 3 N/2
.050 BSC
.030 ±.005
TYP
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However,
no responsibility is assumed for its use. Linear Technology Corporation makes no representation that
the interconnection of its circuits as described herein will not infringe on existing patent rights.
12
LT1126/LT1127
11267fa
1126-7 SS01
200µA 100µA 200 6k 200 6k 50
200µA
V
–
100µA
V
+
OUTPUT
Q12
Q11
Q15 Q16
Q22
Q23
Q24
Q2B
Q1BQ1A
INVERTING
INPUT (–)
NON-INVERTING
INPUT (+)
Q10
Q3Q9
Q7
21k 21k
200pF 3.6k
Q17
Q19 Q20
3.6k
Q18
360µA
V
+
V
+
20pF
5pF
400
67pF
Q2A
570µA
Q25
Q26
Q27
20
20
Q30
Q29
Q28
V
–
Q13
Q8
© LINEAR TECHNOLOGY CORPORATION 1992
S
W
A
W
CHETI ICDAGRA
(1/2 LT1126, 1/4 LT1127)
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
●
FAX: (408) 434-0507
●
www.linear.com
LT/LT 0705 REV A • PRINTED IN USA
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OS
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