1
dc1899af
DEMO MANUAL DC1899A
DESCRIPTION
LTC4228-1/LTC4228-2
Dual Ideal Diode and
Hot Swap Controller
Demonstration circuit 1899A controls two independent
power rail circuits each with Hot Swap™ and ideal diode
functionality provided by the LTC4228-1/LTC4228-2 dual
ideal diode and Hot Swap controller.
DC1899A facilitates evaluation of LTC4228 performance
in different operation modes such as supply ramp-up,
power supply switchover, steady state, and overcurrent
faults. Power supply switchover mode can be realized as
either an ideal diode or as a prioritizer.
Each DC1899A circuit is assembled to operate with a
12V supply and 9A maximum current load. The main
components of the board are the LTC4228 controller, two
MOSFETs operating as ideal diodes, two MOSFETs operat-
ing as Hot Swap devices, two current sense resistors, two
jumpers for independently enabling each rail, six LEDs to
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
Hot Swap is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners.
PERFORMANCE SUMMARY
indicate status, power good and fault conditions separately
for each channel, and input voltage snubbers. There are
pads for optional RC circuits for each Hot Swap MOSFET
gate in order to adjust output voltage slew rate. In addition
to this there are jumpers allowing monitoring of supply
undervoltage conditions at either IN or SENSE+ pins.
The standard configuration (as DC1899A populated by
default) places the ideal diode MOSFET ahead of the Hot
Swap MOSFET. The board also has pads for an alternative
configuration with the Hot Swap MOSFET located ahead
of the ideal diode MOSFET.
Design files for this circuit board are available at
http://www.linear.com/demo
Specifications are at TA = 25°C
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VIN Input Supply Range 2.9 18 V
VINTVCC(UVL) Internal VCC Undervoltage Lockout INTVCC Rising 2.1 2.2 2.3 V
VINTVCC(HYST) Internal VCC Undervoltage Lockout Hysteresis 30 60 90 mV
Ideal Diode Control
∆VFWD(REG) Forward Regulation Voltage (VIN – VOUT) 102540 mV
∆VDGATE External N-Channel Gate Drive
(VDGATE – VIN)
∆VFWD = 0.1V
IN < 7V
IN = 7V to 18V
5
10
7
12
14
14
V
V
ICPO(UP) CPO Pull-Up Current CPO = IN = 2.9V
CPO = IN = 18V
–60
–50
–95
–85
–120
–110
µA
µA
IDGATE(FPU) DGATE Fast Pull-Up Current ∆VFWD = 0.2V, ∆VDGATE = 0V, CPO = 17V –1.5 A
IDGATE(FPD) DGATEn Fast Pull-Down Current ∆VFWD = –0.2V, ∆VDGATE = 5V 1.5 A
Hot Swap Control
∆VSENSE(CB) Circuit Breaker Trip Sense Voltage
(VSENSEEn+ – VSENSEEn–)
47.5 50 52.5 mV
∆VSENSE(ACL) Active Current Limit Sense Voltage
(VSENSEEn+ – VSENSEEn–)
55 65 75 mV
IHGATE(UP) External N-Channel Gate Pull-Up Current Gate Drive On, HGATE = 0V –7 –10 –13 µA
IHGATE(DN) External N-Channel Gate Pull-Down Current Gate Drive Off, OUT = 12V, HGATE = OUT + 5V 150 300 500 µA
IHGATE(FPD) External N-Channel Gate Fast Pull-Down Current Fast Turn-Off, OUT = 12V, HGATE = OUT + 5V 100 200 300 mA
2
dc1899af
DEMO MANUAL DC1899A
OPERATING PRINCINPLES
The LTC4228 functions as an ideal diode with inrush
current limiting and overcurrent protection by controlling
two external back-to-back N-channel MOSFETs in a power
path. The LTC4228 has two ideal diode and two Hot Swap
controllers. Each ideal diode MOSFET is intended to oper-
ate with a defined Hot Swap MOSFET, because they are
tied by common on/off control, and ideal diode controller
sense voltage includes both MOSFETs and sense resistor
voltage drop. Therefore, LTC4228 provides independent
control for the two input supplies.
The LTC4228 gate drive amplifiers monitor the voltage
between the INn and OUTn pins and drive the DGATEn
pins. The amplifier quickly pulls up the DGATE pin, turning
on the MOSFET (Q1 or Q3), for ideal diode control when
it senses a large forward voltage drop. Pulling the ON pin
high and EN pins low initiates a 100ms debounce timing
cycle. After this timing cycle, a 10A current source from
the charge pump ramps up the HGATEn pin. When the Hot
Swap MOSFET (Q2 or Q4) turns on, the inrush current
is limited to a set level set by an external sense resistor
placed between IN and SENSE pins.
An active current limit amplifier servos the gate of the Hot
Swap MOSFET to 65mV across the current sense resistor.
Inrush current can be further reduced, if desired, by add-
ing a capacitor from HGATE to GND. When the MOSFET’s
gate overdrive (HGATE to OUT voltage) exceeds 4.2V, the
PWRGD pin pulls low. When both MOSFETs (Q1 and Q2 or
Q3 and Q4) are turned on, the gate drive amplifier controls
DGATE to servo the forward voltage drop (VIN – VOUT)
across the sense resistor and the back-to-back MOSFETs
to 25mV. If the load current causes more than 25mV of
voltage drop, the gate voltage rises to enhance the MOSFET
used for ideal diode control. For large output currents the
MOSFET’s gate is driven fully on and the voltage drop is
equal to the sum of the ILOAD • RDS(ON) of the two MOS-
FETs in series.
In the case of an input supply short-circuit when the
MOSFETs are conducting, a large reverse current starts
flowing from the load towards the input. The gate drive
amplifier detects this failure condition as soon as it ap-
pears and turns off the ideal diode MOSFET by pulling
down the DGATE pin.
PERFORMANCE SUMMARY
Specifications are at TA = 25°C
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Input/Output Pin
VON(TH) ONn On Pin Threshold Voltage ON Rising 1.21 1.235 1.26 V
VON(RESET) ONn Pin Fault Reset Threshold Voltage ON Falling 0.55 0.6 0.63 V
VEN(TH) EN Pin Threshold Voltage EN Rising 1.185 1.235 1.284 V
VTMR(TH) TMRn Pin Threshold Voltage TMR Rising
TMR Falling
1.198
0.15
1.235
0.2
1.272
0.25
V
V
ITMR(UP) TMRn Pin Pull-Up Current TMR = 1V, In Fault Mode –75 –100 –125 µA
ITMR(DN) TMRn Pin Pull-Down Current TMR = 2V, No Faults 1.4 2 2.6 µA
ITMR(RATIO) TMRn Current Ratio ITMR(DN)/ITMR(UP) 1.4 2 2.7 %
3
dc1899af
DEMO MANUAL DC1899A
QUICK START PROCEDURE
Demonstration circuit 1899A can be easily set up to evaluate
the performance of the LTC4228-1/LTC4228-2. Refer to
the Figure 1 for proper measurement equipment setup and
follow the procedure below. The DC1899A test includes
independent tests of the LTC4228 Hot Swap functionality,
ideal diode functionality and two power rails prioritizer
functionality with the channel 1 highest priority.
HOT SWAP FUNCTIONALITY TEST
This test is identical for each 12V rail and is performed
in the three steps by the measuring of the transient’s
parameters in the different operation modes.
Install the jumpers in the following positions:
JP4, RON1_SEL and JP5, RON2_SEL in position OFF;
JP1, EN1_SEL and JP2, EN2_SEL in position LOW.
Figure 1. Measurement Equipment Setup for Hot Swap Functionality Test
SW2
CL1
SW1
RL1
PSU
SW4
CL2
SW3
RL2
PSU
4
dc1899af
DEMO MANUAL DC1899A
dn1899a F03
OUTPUT VOLTAGE
DROPPING DUE
TO SHUTDOWN
CURRENT LIMIT AT 10A
CURRENT 2A/DIV
No-Load Rampup
Connect a 12V power supply to the board input turrets
IN1 (IN2) and GND. Do not load the output. Place current
probe on the 12V supply and voltage probes on the OUT1
(OUT2) turret. Provide ON1 (ON2) signal at the ON1 (ON2)
pin by moving the RON1_SEL (RON2_SEL) jumper from
OFF position to the 12V position. Observe the transient. The
output voltage rise time should be in the range of 12ms
to 29ms. PWRGD1 (PWRGD2) green LED should be lit.
Turn off the rail using the RON1_SEL (RON2_SEL) jumper.
Current Limit
Initially adjust an electronic resistive load to 10 to 12
and connect it to the OUT1 (OUT2) turret and GND. Turn
on the rail and slowly increase load current up to the
circuit breaker threshold level. The current limit range
should be between 9A and 12.3A. Turn off the rail using
the RON1_SEL (RON2_SEL) jumper.
Figure 2. Turn-On Output Transient Test
Figure 3. Current Limiting Test
QUICK START PROCEDURE
dn1899a F02
INPUT CURRENT
VOUT
5
dc1899af
DEMO MANUAL DC1899A
Figure 4. Short-Circuit Test (2A/Div)
Power-Up into Output Short
Short the output to ground with a wire. Place the current
probe on this wire. Turn on the rail and record the current
shape. The maximum current should be in the 11.6A to
16.9A range. The LTC4228-1 latches off after overcurrent
condition, but the LTC4228-2 automatically retries after
200ms to 450ms.
IDEAL DIODE FUNCTIONALITY TEST
Use an individual 12V power supply for each rail; connect
the two outputs together at a common load. Adjust each
input voltage to 12V with maximum possible accuracy.
In this test, both rails are active and small variations in
the input voltage will force one channel off and the other
channel on. Place a voltmeter between IN1 and IN2 turrets
to measure the difference between two input voltages.
Activate both rails and keep a load around 1A to 3A. Ad-
just the input voltage level of one supply such that IN1 is
QUICK START PROCEDURE
40mV more positive than IN2. Verify that only channel 1
is drawing current. Repeat this test with IN1 at –40mV
with respect to IN2. In this case channel only channel 2
is drawing current.
PRIORITIZER FUNCTIONALITY TEST
The DC1899A is assembled with components to implement
a power prioritizer with channel 1 having the higher priority.
Place JP7 PPR_SEL (power priority select) jumper in
position ON2 and JP5 RON2_SEL (ON2 select) in posi-
tion OFF.
Apply independent supply voltages (12V) to both inputs.
Channel 1 will be connected to load. Reduce channel 1
input voltage until it reaches an undervoltage condition
and D6 (PWRGD2) lights. At the same time channel 2
power supply will deliver power to the load.
dn1899a F04
CURRENT PROFILE DURING
SHORT-CIRCUIT TURN-ON
6
dc1899af
DEMO MANUAL DC1899A
PARTS LIST
ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER
Required Circuit Components
1 7 C1, C2, C3, C8, C9, C11, C14 CAP., X7R, 0.1µF, 50V, 0603 AVX, 06035C104KAT
2 2 C4, C5 CAP., X7R, 47nF, 50V, 0603 AVX, 06035C473KAT
3 2 C6, C7 CAP., X7R, 15nF, 50V, 0603 AVX, 06035C153KAT
4 0 C10, C12, C13, C15 CAP., ALUMINUM, 100µF 50V, OPT SANYO, 50CE100BS
5 2 D1, D2 DIODE, VOLTAGE SUPP. 19V 5%, SMA-DIODE VISHAY, SMAJ17A-E3
6 4 D3, D5, D6, D8 LED, SMT GREEN, J TYPE, LED-LN1351C-GREEN PANASONIC, LN1351C-TR
7 2 D4, D7 LED, SMT RED, GW TYPE, LED-LN1261C-RED PANASONIC, LN1261C-TR
8 1 D9 DIODE, SWITCHING, SOD80 VISHAY, LS4148-GS18
9 0 D10, D11, D12, D13 DIODE, CMHZ4706, SOD123 OPT
10 8 E1, E2, E3, E4, E5, E6, E7, E8 TP, 0.094" MILL-MAX, 2501-2-00-80-00-00-07-0
11 12 E9, E10, E11, E13-E16, E18-E22 TP, 0.064" MILL-MAX, 2308-2-00-80-00-00-07-0
12 5 JP1, JP2, JP3, JP6, JP7 JMP, HD1X3, 0.079CC SAMTEC, TMM-103-02-L-S
13 2 JP4, JP5 JMP, HD2X4, 0.079CC SAMTEC, TMM-104-02-L-D
14 8 J1, J2, J3, J4, J5, J6, J7, J8 JACK, BANANA KEYSTONE, 575-4
15 4 Q1, Q2, Q3, Q4 MOSFET, N-CH, 30-V, SO8-POWERPAK VISHAY, SiR158DP
16 0 Q5, Q6, Q7, Q8 MOSFET, N-CH, 30-V, SiR158DP, SO8-POWERPAK OPT
17 2 RS1, RS2 RES., CHIP, 0.005, 1/2W, 1%, 2010 VISHAY, WSL20105L000FEA
18 0 RS3, RS4 RES., CHIP, 0.005, 1/2W, 1%, 2010, OPT VISHAY, WSL20105L000FEA
19 4 R1, R3, R19, R20 RES., CHIP, 10, 1%, 0603 VISHAY, CRCW060310R0FKEA
20 2 R2, R4 RES., CHIP, 47, 1%, 0603 VISHAY, CRCW060347R0FKEA
21 6 R5, R6, R7, R8, R9, R10 RES., CHIP, 3k, 1%, 0805 VISHAY, CRCW08053K00FKEA
22 2 R11, R15 RES., CHIP, 20k, 1%, 0603 VISHAY, CRCW0060320K0FKEA
23 2 R12, R16 RES., CHIP, 137k, 1%, 0603 VISHAY, CRCW0603137KFKEA
24 2 R13, R17 RES., CHIP, 49.9k, 1%, 0603 VISHAY, CRCW060349K9FKEA
25 2 R14, R18 RES., CHIP, 28k, 1%, 0603 VISHAY, CRCW0060328K0FKEA
26 0 R21, R25 RES., CHIP, 10, 0603 OPT
27 0 R22, R26 RES., CHIP, 0, 0603 OPT
28 1 R23 RES., CHIP, 470, 1%, 0603 VISHAY, CRCW0603470RFKEA
29 1 R24 RES., CHIP, 41.2k, 1%, 0603 VISHAY, CRCW0060341K2FKEA
DC1899A-A Assembly
2 1 U1 I.C. LTC4228IUFD-1, QFN28UFD LINEAR TECH., LTC4228IUFD-1
DC1899A-A Assembly
2 1 U1 I.C. LTC4228IUFD-2, QFN28UFD LINEAR TECH., LTC4228IUFD-2
7
dc1899af
DEMO MANUAL DC1899A
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
SCHEMATIC DIAGRAM
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
U1
LTC4228IUFD-1
ASSY
-A
-B
*LTC4228IUFD-2
1. ALL RESISTORS ARE IN OHMS, 0603.
ALL CAPACITORS ARE IN MICROFARADS, 0603.
NOTE: UNLESS OTHERWISE SPECIFIED
12V
5V
3.3V
12V
5V
3.3V
OFF
OFF
THICK TRACE WIDTH > 500 MIL
THICK TRACE WIDTH > 500 MIL
ON2
ON2
IN1
DG1
OUT1
HG1
ON1
DG1
HG1
DG2
HG2
OUT2
IN2
DG2
HG2
SENSE1+
SENSE1-
SENSE2+
SENSE2-
IN1
SENSE1+
OUT1
INTVCC
INTVCC
SENSE2+
IN1SENSE1+
IN2
OUT2
SENSE1+
SENSE2+
IN2SENSE2+
REVISION HISTORY
DESCRIPTION DATEAPPROVEDECO REV
VLADIMIR O.1ST PROTOTYPE1 10-25-11
__
REVISION HISTORY
DESCRIPTION DATEAPPROVEDECO REV
VLADIMIR O.1ST PROTOTYPE1 10-25-11
__
REVISION HISTORY
DESCRIPTION DATEAPPROVEDECO REV
VLADIMIR O.1ST PROTOTYPE1 10-25-11
__
SIZE
DATE:
IC NO. REV.
SHEET OF
TITLE:
APPROVALS
PCB DES.
APP ENG.
TECHNOLOGY Fax: (408)434-0507
Milpitas, CA 95035
Phone: (408)432-1900
1630 McCarthy Blvd.
LTC Confidential-For Customer Use Only
CUSTOMER NOTICE
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A
CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;
HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO
VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL
APPLICATION. COMPONENT SUBSTITUTION AND PRINTED
CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT
PERFORMANCE OR RELIABILITY. CONTACT LINEAR
TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.
THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND
SCHEMATIC
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.
SCALE = NONE
www.linear.com
1
10/25/2011, 04:28 PM
11
DUAL IDEAL DIODE AND HOT SWAP CONTROLLER
KIM T.
VLADIMIR O.
B
LTC4228IUFD-1/-2
DEMO CIRCUIT 1899A
SIZE
DATE:
IC NO. REV.
SHEET OF
TITLE:
APPROVALS
PCB DES.
APP ENG.
TECHNOLOGY Fax: (408)434-0507
Milpitas, CA 95035
Phone: (408)432-1900
1630 McCarthy Blvd.
LTC Confidential-For Customer Use Only
CUSTOMER NOTICE
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A
CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;
HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO
VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL
APPLICATION. COMPONENT SUBSTITUTION AND PRINTED
CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT
PERFORMANCE OR RELIABILITY. CONTACT LINEAR
TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.
THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND
SCHEMATIC
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.
SCALE = NONE
www.linear.com
1
10/25/2011, 04:28 PM
11
DUAL IDEAL DIODE AND HOT SWAP CONTROLLER
KIM T.
VLADIMIR O.
B
LTC4228IUFD-1/-2
DEMO CIRCUIT 1899A
SIZE
DATE:
IC NO. REV.
SHEET OF
TITLE:
APPROVALS
PCB DES.
APP ENG.
TECHNOLOGY Fax: (408)434-0507
Milpitas, CA 95035
Phone: (408)432-1900
1630 McCarthy Blvd.
LTC Confidential-For Customer Use Only
CUSTOMER NOTICE
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A
CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;
HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO
VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL
APPLICATION. COMPONENT SUBSTITUTION AND PRINTED
CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT
PERFORMANCE OR RELIABILITY. CONTACT LINEAR
TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.
THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND
SCHEMATIC
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.
SCALE = NONE
www.linear.com
1
10/25/2011, 04:28 PM
11
DUAL IDEAL DIODE AND HOT SWAP CONTROLLER
KIM T.
VLADIMIR O.
B
LTC4228IUFD-1/-2
DEMO CIRCUIT 1899A
E14 EN1
E14 EN1
J3
ADJ., 9A
OUT2
J3
ADJ., 9A
OUT2
C6
15nF
50V
C6
15nF
50V
RS3
0.0050.5W
2010 OPT
RS3
0.0050.5W
2010 OPT
JP7
PPR_SEL
ON2
OFF
HD1X3-079
JP7
PPR_SEL
ON2
OFF
HD1X3-079
1
3
2
+
C13
100uF
50V
OPT
+
C13
100uF
50V
OPT
R10
3K
0805
R10
3K
0805
E21 PWRGD2
E21 PWRGD2
E13 EN2
E13 EN2
E4 GND
E4 GND
R16
137k
1%
R16
137k
1%
E11
GND E11
GND
D3
GREEN
LN1351C
D3
GREEN
LN1351C
12
E1 OUT1
E1 OUT1
R20
10
R20
10
E16 PWRGD1
E16 PWRGD1
R18
28k
1%
R18
28k
1%
JP1
EXT
LOW
EN1_SEL
JP1
EXT
LOW
EN1_SEL
1
3
2
J5
IN1
2.9V - 18V
J5
IN1
2.9V - 18V
DG2DG2
C8
0.1uF
50V
C8
0.1uF
50V
C2
0.1uF
50V
C2
0.1uF
50V R7
3K
0805
R7
3K
0805
Q6
SiR158DP
OPT
Q6
SiR158DP
OPT
E5
IN1 E5
IN1
+
C15
100uF
50V
OPT
+
C15
100uF
50V
OPT
D6
GREEN
LN1351C
D6
GREEN
LN1351C
1 2
D11
CMHZ4706
OPT
D11
CMHZ4706
OPT
12
E8
GND E8
GND
E20 STATUS2
E20 STATUS2
R25
10
OPT
R25
10
OPT
D8
GREEN
LN1351C
D8
GREEN
LN1351C
1 2
Q1
SiR158DP
Q1
SiR158DP
HG2HG2
C9
0.1uF
50V
C9
0.1uF
50V
R13
49.9k
1%
R13
49.9k
1%
J7
IN2
2.9V - 18V
J7
IN2
2.9V - 18V
Q5
SiR158DP
OPT
Q5
SiR158DP
OPT
J1 ADJ., 9A
OUT1
J1 ADJ., 9A
OUT1
D4
RED
LN1261C
D4
RED
LN1261C
12
U1 *
QFN28UFD-4X5
U1 *
QFN28UFD-4X5
IN1 3
TMR2 18
HGATE1 25
GND
5
DGATE2
9IN2
6
SENSE2+
7
CPO2
10
SENSE2-
8
STATUS2 11
FAULT2 15
HGATE2
12
OUT2
13
PWRGD2 14
TMR1 19
EN1 20
ON2
16
ON1
21
OUT1 24
FAULT1 22
SENSE1- 1
SENSE1+ 2
PWRGD1 23
EN2 17
STATUS1 26
EP
29
INTVCC
4
CPO1 27
DGATE1 28
R23
470
R23
470
JP5
HD2X4-079
RON2_SEL
JP5
HD2X4-079
RON2_SEL
1
3
5 6
4
2
7 8
J4 GND
J4 GND
E22 FAULT2
E22 FAULT2
R17
49.9k
1%
R17
49.9k
1%
E18
ON1 E18
ON1
R4
47
R4
47
R3
10
R3
10
D2
SMAJ17A
D2
SMAJ17A
12
RS4
0.0050.5W
2010 OPTRS4
0.0050.5W
2010 OPT
E10
ON2 E10
ON2
R1
10
R1
10
D9
LS4148
D9
LS4148
21
R6
3K
0805
R6
3K
0805
D10
CMHZ4706
OPT
D10
CMHZ4706
OPT
12
E2 GND
E2 GND
R2
47
R2
47
E15 FAULT1
E15 FAULT1
Q4
SiR158DP
Q4
SiR158DP
D7
RED
LN1261C
D7
RED
LN1261C
1 2
R11
20K
1%
R11
20K
1%
D13
CMHZ4706
OPT
D13
CMHZ4706
OPT
1 2
C14
0.1uF
50V
C14
0.1uF
50V
RS2
0.005
0.5W
2010
RS2
0.005
0.5W
2010
R22
0
OPT
R22
0
OPT
J6
GND J6
GND
C3
0.1uF
50V
C3
0.1uF
50V
D12
CMHZ4706
OPT
D12
CMHZ4706
OPT
1 2
R9
3K
0805
R9
3K
0805
+
C10
100uF
50V
OPT
+
C10
100uF
50V
OPT
+
C12
100uF
50V
OPT
+
C12
100uF
50V
OPT
C4
47nF 16V
C4
47nF 16V
R21
10
OPT
R21
10
OPT
D5
GREEN
LN1351C
D5
GREEN
LN1351C
12
J8
GND J8
GND
Q2
SiR158DP
Q2
SiR158DP
JP3
VS1+
VIN1
VON1_SEL
JP3
VS1+
VIN1
VON1_SEL
1
3
2
E6
GND E6
GND
R26
0
OPT
R26
0
OPT
R8
3K
0805
R8
3K
0805
JP2
EXT
LOW
EN2_SEL
JP2
EXT
LOW
EN2_SEL
1
3
2
E3 OUT2
E3 OUT2
R14
28k
1%
R14
28k
1%
Q8
SiR158DP
OPT
Q8
SiR158DP
OPT
Q3
SiR158DP
Q3
SiR158DP
E19 STATUS1
E19 STATUS1
JP6
VS2+
VIN2
VON2_SEL
JP6
VS2+
VIN2
VON2_SEL
1
3
2
C1
0.1uF
50V
C1
0.1uF
50V
JP4
HD2X4-079
RON1_SEL
JP4
HD2X4-079
RON1_SEL
1
3
5 6
4
2
7 8
R24
41.2k
R24
41.2k
RS1
0.005
0.5W
2010
RS1
0.005
0.5W
2010
DG1DG1
R12
137k
1%
R12
137k
1%
C11
0.1uF
50V
C11
0.1uF
50V
D1
SMAJ17A
D1
SMAJ17A
12
C5
47nF 16V
C5
47nF 16V
R5
3K
0805
R5
3K
0805
R19
10
R19
10 J2 GND
J2 GND
HG1HG1
C7
15nF
50V
C7
15nF
50V
E9
PROBE GND E9
PROBE GND
R15
20K
1%
R15
20K
1%
Q7
SiR158DP
OPT
Q7
SiR158DP
OPT
E7
IN2 E7
IN2
8
dc1899af
DEMO MANUAL DC1899A
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2012
LT 0812 • PRINTED IN USA
DEMONSTRATION BOARD IMPORTANT NOTICE
Linear Technology Corporation (LTC) provides the enclosed product(s) under the following AS IS conditions:
This demonstration board (DEMO BOARD) kit being sold or provided by Linear Technology is intended for use for ENGINEERING DEVELOPMENT
OR EVALUATION PURPOSES ONLY and is not provided by LTC for commercial use. As such, the DEMO BOARD herein may not be complete
in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including but not limited to product safety
measures typically found in finished commercial goods. As a prototype, this product does not fall within the scope of the European Union
directive on electromagnetic compatibility and therefore may or may not meet the technical requirements of the directive, or other regulations.
If this evaluation kit does not meet the specifications recited in the DEMO BOARD manual the kit may be returned within 30 days from the date
of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY THE SELLER TO BUYER AND IS IN LIEU
OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS
FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THIS INDEMNITY, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR
ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.
The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user releases LTC from all claims
arising from the handling or use of the goods. Due to the open construction of the product, it is the user’s responsibility to take any and all
appropriate precautions with regard to electrostatic discharge. Also be aware that the products herein may not be regulatory compliant or
agency certified (FCC, UL, CE, etc.).
No License is granted under any patent right or other intellectual property whatsoever. LTC assumes no liability for applications assistance,
customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind.
LTC currently services a variety of customers for products around the world, and therefore this transaction is not exclusive.
Please read the DEMO BOARD manual prior to handling the product. Persons handling this product must have electronics training and
observe good laboratory practice standards. Common sense is encouraged.
This notice contains important safety information about temperatures and voltages. For further safety concerns, please contact a LTC applica-
tion engineer.
Mailing Address:
Linear Technology
1630 McCarthy Blvd.
Milpitas, CA 95035
Copyright © 2004, Linear Technology Corporation
