FSTU32160A - Fairchild Semiconductor

June 1999

Revised March 2000

FSTU32160A 16-Bit to 32-Bit Multiplexer/Demultiplexer Bus Switch with −2V Undershoot Prot ection

FSTU32160A

16-Bit to 32-Bit Multiplexer/Demultiplexer Bus Switch

with −2V Undershoot Protection

General Descript ion

The Fairchild Switch FSTU32160A is a 16-bit to 32-bit

high-speed CMOS TTL-compatible multiplexer/demulti-

plexer bus switch. The low on resistance of the switch

allows inputs to be connected to outputs without adding

propagati on delay or generatin g additiona l ground boun ce

noise.

The device can be used in applications where two buses

need to be addressed simultaneously. The FSTU32160A is

designe d so that t he A Port demultiplexe s into B1 or B2 or

both. The A and B Ports are “undershoot hardened” with

UHC protection to support an extended range to 2.0V

below gr ound. F airchi ld’s integ rated U nde rshoot Hard ened

Circuit, UHC senses undershoot at the I/O’s, and responds

by preventing voltage differentials from developing and

turning on the switch.

Two select (SEL1, SEL2) inpu ts pr ovid e sw itch ena ble co n-

trol. When SEL1, SEL2 are HIGH, the device precharges

the B Port to a selectable bias vo ltag e (Bias V) to minimize

live insertion noise.

Features

■Undershoot h ardened to −2V (A and B Ports).

■4Ω switch connection between two ports.

■Minimal propagation delay through the switch.

■Low lCC.

■Zero bounce in flow-through mode.

■Control inputs compatible with TTL level.

■See Applications Note AN-5008 for details

Ordering Code:

Devices also available in Tape and R eel. Spe ci fy by append ing the suffix let t er “X” to the orderin g c ode.

UHC is a tradem ark of Fa irc hild Semic onduc to r C orporation.

Order Number Package Number Package Description

FSTU32160AMTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JED EC MO-153, 6.1m m Wide

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FSTU32160A

Connection Diagram Pin Descriptions

Truth Table

Logic Diagram

Pin Name Description

SEL1, SEL2Select Inputs

ABus A

B1, B2Bus B

Inputs Function

SEL1SEL2

LH x A = x B1

HL x A = x B2

LLx A = x B1 and x B2

H H x B1, x B2 = Bia s V

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FSTU32160A

Absolute Maximum Ratings(Note 1) Recommended Operating

Conditions (Note 4)

Note 1: The “Abso lute Maximum Ratings” ar e those value s beyond which

the safety of the device cannot be guaranteed. The device should not be

operated at these limits. The parametric values defined in the Electrical

Characteristics tables are not guaranteed at the absolute maximum rating.

The “Re comm ended Operat ing Co ndition s” table will de fine the cond itions

for actu al device operation.

Note 2: VS is the voltage observed/applied at either the A or B Ports across

the switch.

Note 3: The input and o utput nega tive volt age rati ngs may b e exceede d if

the inpu t and outpu t diode current ratings are obs erved .

Note 4: Unused cont rol inp uts mu st be he ld HIG H or L OW. They ma y not

float.

DC Electrical Characteristics

Note 5: Typical values are at VCC = 5.0V an d T A = +25°C

Note 6: M easure d by t he v oltage drop between A an d B pins at th e indicate d c urrent through the switch . O n resista nc e is determined by the lo w er of the

voltages on the tw o (A or B) pins.

Supply Voltage (VCC)−0.5 V to +7.0V

DC Switch Voltage (VS) (Note 2) −2.0V to +7.0V

BiasV Voltage Range −0.5V to +7.0V

DC Input Control Pin Voltage

(VIN) (Note 3) −0.5V to +7.0V

DC Input Diode Current (lIK) VIN < 0V −50 mA

DC Output Current (IOUT)128 mA

DC VCC/GND Current (ICC/IGND)+/− 100 mA

Storage Temperature Range (TSTG)−65°C to +150 °C

Power Supply Operating (VCC) 4.0V to 5.5V

Precharge Supply (BiasV) 1.5 to VCC

Input Voltage (VIN) 0V to 5.5V

Output Voltage (VOUT) 0V to 5.5V

Input Rise and Fall Time (tr, tf)

Switch Control Input 0nS/V to 5nS/V

Switch I/O 0nS/V to DC

Free Air Operating Temperature (TA)−40 °C to +85 °C

Symbol Parameter

TA = −40 °C to +85 °C

Units ConditionsVCC Min Typ Max

(V) (Note 5 )

VIK Clamp Diode Voltage 4.5 −1.2 V IIN = −18mA

VIH HIGH Level Input Voltage 4.0–5.5 2.0 V

VIL LOW Level Input Voltage 4.0–5.5 0.8 V

IIInput Leakage Current 5.5 ±1.0 µA0 ≤ VIN ≤ 5.5V

010µAV

IN = 5.5V

IOOutput Current 4.5 0.25 mA BiasV = 2.4V

BX = 0

IOZH, IOZL OFF-STATE Leakage Current 5.5 ±1.0 µA0 ≤ A ≤ VCC, V

BiasV1 = BiasV2 = 5.5V

IOZH, IOZL OFF-STATE Leakage Current 5.5 ±1.0 µA0 ≤ B ≤ VCC, V

BiasV1 = BiasV2 = Floating

RON Switch On Resistance 4.5 4 7 ΩVIN = 0V, IIN = 64 mA

(Note 6) 4.5 4 7 ΩVIN = 0V, IIN = 30 mA

4.5 8 14 ΩVIN = 2.4V, IIN = 15 mA

4.0 11 20 ΩVIN = 2.4V, IIN = 15 mA

ICC Quiescent Supply Current 5.5 3 µAV

IN = VCC or GND, IOUT = 0

∆ ICC Increase in ICC per Input 5.5 2.5 mA One input at 3.4V

Other inputs at VCC or GND

IBIAS Bias Pin Leakage Current 5.5 ±1.0 µASEL

1, SEL2 = 0V

BX = 0V, BiasVX = 5.5V

VIKU Voltage Undershoot 5.5 −2.0 V 0.0 mA ≥ IIN ≥ −50 mA

SEL1, SEL2 = 5.5V

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FSTU32160A

AC Electrical Characteristics

Note 7: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On

resist ance of th e s w it c h and the 50pF loa d c apacitan ce , wh en drive n by an ideal voltage so urc e (zero out put impe dance) .

Capacitance (Note 8)

Note 8: TA = +25°C, f = 1 Mhz, Capacitan c e is ch aracteriz ed but not te s te d.

Undershoot Characteristic (Note 9)

Note 9: This is intended to characterize the device’s protective capabilities by maintaining output signal integrity during an input tra ns ient voltage undersh oot

event.

FIGURE 1.

Device Test Conditions Transient

Input Voltage (VIN) Waveform

Symbol Parameter

TA = −40 °C to +85 °C,

CL = 50 pF, RU= RD = 500ΩUnits Conditions Figure No.

VCC = 4.5 − 5.5V VCC = 4.0V

Min Max Min Max

tPHL, tPLH A or B, to B or A (Note 7) 0.25 0.25 ns VI = OPEN Figure 2

Figure 3

tPZH Output Enable Time, 0.5 4.0 4.5 ns VI = OPEN for tPZH Figure 2

Figure 3

SEL to A, B BiasV = GND

tPZL Output Enable Time, 1.0 4.8 5.5 ns VI = 7V for tPZL Figure 2

Figure 3

SEL to A, B BiasV = 3V

tPHZ Output Disable Time, 1.0 5.9 6.9 ns VI = Open for tPHZ Figure 2

Figure 3

SEL to A, B BiasV = GND

tPLZ Output Disable Time, 1.0 7.4 7.0 ns VI = 7V for tPLZ Figure 2

Figure 3

SEL to A, B BiasV = 3V

Symbol Parameter Typ Max Units Conditions

CIN Control pin Input Capacitance 4 pF VCC = 5.0V

CI/O OFF Input/Output Capacitance “OFF State” 8 pF VCC = 5.0V, Switch OFF

Symbol Parameter Min Typ Max Units Conditions

VOUTU Output Voltage During Undershoot 2.5 VOH − 0.3 V Figure 1

Parameter Value Units

VIN See Waveform V

R1 - R2100K Ω

VTRI 11.0 V

VCC 5.5 V

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FSTU32160A

AC Loading and Waveforms

Note: Input driven b y 50Ω source terminated in 50Ω

Note: CL includes load and stray capacitance, CL = 50 pF

Note: Input PRR = 1.0 MH z, t W = 500 ns

FIGURE 2. AC Test Circuit

FIGURE 3. AC Waveforms

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FSTU32160A 16-Bit to 32-Bit Multiplexer/Demultiplexer Bus Switch with −2V Undershoot Protection

Physical Dimensions inches (millimeters) unless otherwise noted

56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Package Number MTD56

Technology Description

The Fairchild Switch fam ily derives from and embodies Fairchild’s proven switch technology us ed for several y ears in its

74LVX3L384 (FST3384) bus switch product.

Fairchild does no t assume any responsibility for use of any circuitry de scribed, no circuit patent licenses are imp lied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life suppor t de vices o r systems a re devices or syste ms

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical compon ent i n any compon ent of a life su pport

device or system whose failure to perform can be rea-

sonabl y ex pect ed to ca use the fa i lure of the life su pp ort

device or system, or to affect its safety or effectiveness.