AVAILABLE
Functional Diagrams
Pin Configurations appear at end of data sheet.
Functional Diagrams continued at end of data sheet.
UCSP is a trademark of Maxim Integrated Products, Inc.
For pricing, delivery, and ordering information, please contact Maxim Direct
at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com.
71M6103/71M6113/
71M6201/71M6203/
71M6601/71M6603
Isolated Sensor ICs
DATA SHEET
June 2011
GENERAL DESCRIPTION
The 71M6103/71M6113/71M6201/71M6203/71M6601/71M6603
(71M6xxx) isolated sensor ICs enable Teridian’s 4th-generation
polyphase-metering 71M654x systems-on-chips (SoCs) to use
nonisolating sensors such as resistive shunts without the need
for costly and nonlinear i sol ation transformers or CTs. Isolation is
provi ded by low-cost pulse transform ers that form a bidirecti onal
digital communication link between the 71M654x and the
isolated sensor ICs.
The 71M6xxx isolated sensor ICs contain a 22-bit delta-sigma
ADC, an amplifier with differential inputs, a precision voltage
ref erenc e, a temperat ure sensor, and a suppl y volt age generator
that is energized by power pulses prov ided by the 71M654x.
In conjunction with the 71M654x metering SoCs, the isolated
sensor ICs of fer unpr ec edented BOM cost reduc tion, immunity to
magnetic tampering, and enhanced reliability for single-phase
and poly phase appl icati ons.
MPU
RTC
TIMERS
IADC0
VADC8 (VA)
IADC2
VADC9 (VB)
XIN
XOUT
RX
TX
TX
RX
COM0...5
V3P3A V3P3SYS
VBAT
VBAT_RTC
IADC4
VADC10 (VC)
SEG
GNDA GNDD
SEG/DIO
DIO
ICE
C
B
A
NEUTRAL LOAD
8888.8888
PULSES,
DIO
IR
AMR
POWER FAULT
COMPARATOR
MODUL-
ATOR
SERIAL PORTS
OSCILLATOR/
PLL
MUX and ADC
LCD DRIVER
DIO, PULSES
COMPUTE
ENGINE
FLASH
MEMORY
RAM
32 kHz
REGULATOR
Shunt Current Sensors
POWER SUPPLY
TERIDIAN
71M6543F/
71M6543H
TEMPERATURE
SENSOR
VREF
IADC6
BATTERY
PWR MODE
CONTROL
WAKE-UP
NEUTRAL
I
2
C or µWire
EEPROM
9/17/2010
IADC1
IADC3
IADC5
IADC7
RTC
BATTERY
V3P3D
BATTERY
MONITOR
SPI INTERFACE
HOST
LCD DISPLAY
Resistor Dividers
Pulse Transformers
3x TERIDIAN
71M6xx3
Note: This system is referenced to Neutral
71M6xx3
71M6xx3
71M6xx3
}IN*
}IA
}IB
}IC
*IN = Neutral Current
FEATURES
0.1% Acc ur ac y Ov er 2000:1 Cur r ent
Range
Exceeds IEC 62053/ANSI C12.20
Standards
Compatible with Shunt Resistor s a s Low
as 50µΩ
On-Chip Temperature Sensor Enables
Localized D igita l Temperature
Compensat ion by the 71M654x
22-Bit ADC
Powered fr om the 71M654x Usi ng P ulses
Sent Through the Transfor mer
3.3mW Typical Consumption
On-Chip Power Monitoring
Industrial Te mperature Range
8-Pin Lead( P b) -Free S O Package
19-5704; Rev 6/11
PDS_6xxx_010 71M6xxx Data Sheet
v1.2 © 20082011 Teridian Semiconduct or Cor por ation 2
Table of Contents
1 Hardware Descriptio n ............................................................................................................ 4
2 Functio nal Description .......................................................................................................... 4
3 Applications Information ....................................................................................................... 5
3.1 Product Selection.................................................................................................................. 5
3.2 Ext ernal Co mponents for t he 71M6xxx ................................................................................ 6
3.2.1 Current Sensor Side .................................................................................................... 6
3.2.2 Pulse Transf ormer ....................................................................................................... 6
3.3 Co nn ect ions to Sensors and to th e 71M654x ...................................................................... 7
3.4 PCB Layout Considerations ................................................................................................. 9
3.5 Co mpatibility wi t h the 71M 654x.......................................................................................... 10
4 Specifications ...................................................................................................................... 11
4.1 Absolute Maximum Rat ings................................................................................................ 11
4.2 Reco mmended External Components ............................................................................... 11
4.3 Reco mmended Operating Conditions ................................................................................ 11
4.4 Perf ormance Speci f ications ............................................................................................... 12
4.4.1 Supply Cur r ent .......................................................................................................... 12
4.4.2 Power and Data Pulses ............................................................................................. 12
4.4.3 VCC Voltage Monitor ................................................................................................. 12
4.4.4 Temperat ur e S ensor.................................................................................................. 12
4.4.5 VREF Perfor mance Specifications ............................................................................. 13
4.4.6 ADC Converter .......................................................................................................... 14
4.5 Typical Perf orman ce Dat a .................................................................................................. 15
4.6 Package Outl in e Drawi ng ................................................................................................... 16
4.7 IC Pinout .............................................................................................................................. 17
4.8 Pin Descript io n.................................................................................................................... 17
5 Orderin g I nformation ........................................................................................................... 18
6 Related In format ion ............................................................................................................. 18
7 Contact Information ............................................................................................................. 18
PDS_6xxx_010 71M6xxx Data Sheet
v1.2 © 20082011 Teridian Semiconduct or Cor por ation 3
Figures
Figure 1: Block Diagr am .......................................................................................................................... 4
Figure 2: External Components Connec ted to the 71M 6xxx ..................................................................... 7
Figure 3: Current Sensors Connected to the 71M 6541D/F Usi ng One 71M6x 01 ....................................... 8
Figure 4: Current Sensors Connected to the 71M 6543F/ H or 71M 6545/H with Three 71M6xx3 ................ 9
Figure 5: Copper Separation and Signal Trac es for a Polyphase PCB .................................................... 10
Figure 6: Wh Error at Room Temper ature ( 71M 6203, 100A /0.1A, 60Hz/240V A C) ................................. 15
Figure 7: VARh Error at Room Temper ature ( 71M 6203, 100A/0. 1A , 60Hz/240V AC) ............................. 15
Figure 8: SOIC-8 Package O utline ......................................................................................................... 16
Figure 9: Pinout for 8-Pin SO Package .................................................................................................. 17
Tables
Table 1: Remote Interface Commands ..................................................................................................... 5
Table 2: Product Variations ...................................................................................................................... 6
Table 3: Absolute M aximum Ratings ...................................................................................................... 11
Table 4: Recom mended External Components ...................................................................................... 11
Table 5: Recom mended Oper ating Conditions ....................................................................................... 11
Table 6: Supply Current Performance Specif ic ations .............................................................................. 12
Table 7: Timing Specifications for Power and Data Pulses ..................................................................... 12
Table 8: VCC V oltage Monitor S pecifications ......................................................................................... 12
Table 9: Temperature S ensor Spec ifications .......................................................................................... 12
Table 10: VREF Perf ormance S pecifications .......................................................................................... 13
Table 11: ADC Convert er Specifications ................................................................................................ 14
Table 12: Pin Description ....................................................................................................................... 17
Table 13: Product Var iations .................................................................................................................. 18
Table 14: Packaging I nformation, Corr espondi ng CE Codes, and Order ing Numbers ............................. 18
PDS_6xxx_010 71M6xxx Data Sheet
v1.2 © 20082011 Teridian Semiconduct or Cor por ation 4
1 HARDWARE DESCRIPTIO N
The 71M6103/71M6113/71M6201/71M6203/71M6601/71M6603 (71M6xxx) remote sensor ICs integrate
all functional blocks required to implement an isolated front-end with digital communication capability.
Figure 1 shows the 71M6x x x IC block diagram . The chip includes the following:
Preamplifier with a fixed gain
22-bit delta-sigma ADC
ADC volt age r ef er enc e
Temperature sensor
VCC monitor
Power-on reset circuitry
Bidir ec tional pulse i nterface
Active rectifiers for supply-voltage generation from the power pulses provided by t he 71M654x
Digit al c ontrol section providing cont r ol r egister s for the selection of operation modes
SP
SN
PLL
PULSEIO
Secondary
ACTIVE
RECTI-
FIERS
GND VCC
RD_DATA
DIGITAL SECTION
INP
INN
ADC
ADC_CLK ADC_OUT
BAND
GAP
CHOP
+
IBIAS TEMP/VCC
MONITOR
OTP MEMORY
BUFFER
VREF
VBIAS
TEST
DATA_IN[15:0]
CROSS
VCC
WR_DATA
POWER
ON
RESET RESET
RD_CLK
VDD
RD_DATA
PREAMP
+
-
-
Primary
1:1.1
To
71M654X
SHUNT
Figure 1: Block Diagram
2 FUNCTIONAL DESCRIPTION
During normal operation, the SP and SN pins of the 71M6xxx are connected to the pulse transformer.
When PLL_FAST = 1 in the 71M654x, power pulses generated by the 71M654x arrive every 610.35ns.
The PLL in the 71M6xxx locks to these incoming power pulses. The communication between the
71M654x and the 71M6xxx is synchronized to the multiplexer frames of the 71M654x. The
communication protocol is Teridian-proprietary, and details are not described in this data sheet. All
aspects of the communication between the 71M654x and the 71M6xxx are managed on the hardware
lev el and they are compl etely transparent to the user.
The communication interface can run at two different data rates. Power pulses are generated every
610.35ns if the PLL_FAST register i n t he 71M 654x is set to 1, and ev ery 1. 905µs i f PLL_FAST i s set to 0.
The power pulse s are 101. 7ns wide with PLL_FAST = 1, and 160ns wide with PLL_FAST = 0.
PDS_6xxx_010 71M6xxx Data Sheet
v1.2 © 20082011 Teridian Semiconduct or Cor por ation 5
The 71M6xxx isolated sensors prov ide a continuous data stream of ADC data plus an independent dat a
stream that contains auxiliary information as requested by the 71M654x. The ADC data is processed by
CE code in the 71M654x and stored in CE RAM. Auxiliary information is processed by the MPU of the
71M654x using I/O RAM regi ster s.
Basic settings and functions of the 71M6xxx can be controlled by various I/O RAM registers in the
71M654x. The comm and sent towards the 71M6xxx is plac ed in t he RCMD[4:2] register of t he 71M654x,
with further specification contained in the TMUXRn[2:0] register. Refer to the 71M654x data sheets for
details.
Table 1 shows the all owabl e combinat ions of v alues in RCMD[4:2] and TMUXRn[2:0] , and the achiev ed
operation al ong with t he type and format of data sent bac k by the 71M6xxx isolated sensors.
Table 1: Remo t e Interface Commands
RCMD[4:2] TMUXRn[2:0]
Read
Operation/Command
R6K_RD [15:0]
00X
Chip-characteristic
temper ature data
TRIMT (see note), use bits [8:1]
01X
TRIMBGC (see note), use bits [15:6]
10X
TRIMBGA (see note), use bits [15:8]
001 11X
TRIMBGB bits [15:8], TRIMBGD bits [7:0]
(see note)
00X
Temperature
Out put of the temperature sensor, bit s [10:0]
01X
Supply voltage
Suppl y v oltage measurem ent , bits [7:0]
10X
Chip version
Chip version code, use bits [15:8]
111
Reset
Note: TRIMBGA
to TRIMBGD and TRIMT are values used for characterizing the individual 71M6xxx over temperature. Availability
of TRIMBGA to TRIMBGD and TRIMT depends on the part number (see Table 10 for d et a ils ).
The rem ote i nterfac e commands li sted in Table 1 enabl e the 71M 654x t o gather the f oll owing i nform ation
from the 71M6 xxx:
Output of the temperature sensor
Information on how the device is characteri z ed ov er tem per ature
Supply voltage
Chip version c ode
The control commands listed in Table 1 enable the 71M654x to initiate the following actions in the
71M6xxx:
Read the 71M6xx x temperature sensor
Read the 71M6xx x V CC sensor
Hardware reset
With hardwar e and temperature characterization informat ion on each connected 71M6xxx isolated sensor
available to the 71M654x host MPU, temperature compensation of the energy measurement can be
implemented based on the individual temperature characteristics of the 71M6xxx isolated sensors. For
example, when the 71M6xxx are used in a polyphase meter containing three shunt resistors, the
temperature increase in each 71M6xxx can be monitored and used to compensate for the temperature
coeffici ent of the 71M 6xxx V REF and the cor r espondi ng shunt resistor.
3 APPLICATIONS INFORMATION
3.1 Product Selection
A l ow-noi se dif f erenti al-input pr eam plif i er appli es gain to t he signal f rom the cur rent sen sor to the opt im al
input range of the ADC. T he c ur r ent sensor is connected to the inputs of the pream plifier through INP and
INN. The output of the pr eam plif i er connect s direc tly t o the input of the A DC. See 5 Ordering Information
for available part types. Shunt resistances from 736µΩ to as low as 50µΩ can be accommodated,
depending on desi r ed c ur r ent range and part type.
PDS_6xxx_010 71M6xxx Data Sheet
v1.2 © 20082011 Teridian Semiconduct or Cor por ation 6
The shunt resistance must be balanced with the maximum current range of the part type, as shown in
Table 2. Various combinations of current ranges and shunt resi st ance values are possible. Howev er, the
shunt resistance for a given current has to be chosen carefully as not to exceed the maximum RMS
voltage at the INP/INN pins of the 71M6xxx. The maximum wattage of the shunt resistor is another
consideration that applies to the resistance r ange of t he shunt.
Table 2: Product Variations
Part Application1 Maximum
Current
(A)
Accuracy
Class2
(%)
Maximum
RMS
Voltage at
INP/INN
(mV)
Maximum
Shunt
Resistance3
(
µΩ)
Shunt
Power4
(W)
Typical
Shunt
Resistance5
(
µΩ)
71M6601
S
60
1
44 736 1.44 400
71M6603 P 1
71M6103 P 100
1
19.6 196 1.2 120
71M6113
0.5
71M6201 S 200 0.2 12.6 63 2.0 50
71M6203
P
0.2
Not e 1: S = single phase, P = polyphase .
Not e 2: Accuracy over temperature (-40°C to +85°C for 71M620x par ts, -20°C t o +60° f or all ot h er p arts ) , w h en c om bi ned with
71M654x or 71M654xH IC.
Not e 3: Maximum re sistance at maximum current.
Not e 4: Power at maximum current and typical shunt resistance.
Not e 5: Typical resistance values provide room for over h ead w hil e m ain tain in g opt im um dynamic r an g e.
The i nputs of the pream plif ier are ref erenced to l ocal ground (the GND pi n of the 71M6xxx). This means
that in an isolated system, the INP and INN pins have to be biased towards this local GND. See 3.2.1
Current S ensor Side for details.
3.2 External Components for the 71M6xxx
3.2.1 Current Se nsor Side
Figure 2 shows the external components required for the 71M6xxx. It is recommended to use the
following components:
1.0µF capacitor between the GND and VCC pins. This capacitor minimizes the VCC ripple
voltage.
One 1k resi stor eac h fr om the sensor output pins to GND. These r esistors h elp to bias the input
v oltage at the INP and INN pins towards GND.
In envi ronment s where E MC i s a concern, fer rite beads c an be plac ed between the sense pins of
the shunt resi stor and the INP/INN pins of the 71M6xxx.
3.2.2 Pulse Tra nsformer
A low-cost pulse transformer is used for the link between the 71M654x and the 71M6xxx. It is the
responsibili ty of the meter system designer to qualify the transformer used in the system ov er the required
operating temperature range. The following commercially available transformer is suitable for this
application:
Wü rth Elec tronics Midcom Inc., P/N 750-11-0056 REV 2 (www.midcom-inc.com)
PDS_6xxx_010 71M6xxx Data Sheet
v1.2 © 20082011 Teridian Semiconduct or Cor por ation 7
Current Shunt
Sensor
Pulse
Transformer
TERIDIAN
71M654x
TERIDIAN
71M6xxx
VCC
GND
INP
INN
SP
SN
1 k
1 k
1.0 µF
V3P3A
VA
IAP
IAN
Load
Voltage
Sensing
8 2 34
5671
R1
R2
C1
TEST
NC
Figure 2: External Componen t s Connect ed to the 71M 6xxx
3.3 Connections to Sensors and to the 71M 654x
Figure 3 shows the sensor connections for single-phase meter application using a 71M6541D/F and
71M6x01. This single-phase conf iguration uses one local shunt and one shunt isolated with a 71M6x01
device. Since the local shunt is connected to the LINE circuit, the meter is also referenced to the LINE
circuit.
Figure 4 shows the sensor connections for a polyphase meter application using a 71M6543F/H or
71M6545/H. This polyphase conf igurati on use s three 71M6xx3 to isolate the shunt sensors f or the t hree
phases, while a locally connected fourth shunt sensor can be optionally used to sense neutral current.
Si nc e the local shunt is connected to t he neutral circuit, the meter is also refer enc ed to the neutral circuit.
PDS_6xxx_010 71M6xxx Data Sheet
v1.2 © 20082011 Teridian Semiconduct or Cor por ation 8
MPU
RTC
TIMERS
IAP
VA
IBP
XIN
XOUT
RX
TX
TX
RX
COM0...5
V3P3A V3P3SYS
VBAT
VBAT_RTC
SEG
GNDA GNDD
SEG/DIO
DIO
ICE
LINE
NEUTRAL
LOAD
8888.8888
PULSES,
DIO
IR
AMR
POWER FAULT
COMPARATOR
MODUL-
ATOR
SERIAL PORTS
OSCILLATOR/
PLL
MUX and ADC
LCD DRIVER
DIO, PULSES
COMPUTE
ENGINE
FLASH
MEMORY
RAM
32 kHz
REGULATOR
Shunt
POWER SUPPLY
TERIDIAN
71M6541D/F
TEMPERATURE
SENSOR
VREF
BATTERY
PWR MODE
CONTROL
WAKE-UP
NEUTRAL
I
2
C or µWire
EEPROM
IAN
IBN
RTC
BATTERY
V3P3D
BATTERY
MONITOR
SPI INTERFACE
HOST
LCD DISPLAY
Resistor Divider
Pulse
Trans-
former
TERIDIAN
71M6x01
Shunt
LINE
LINE
Note:
This system is referenced to LINE
11/5/2010
Figure 3: Current Senso rs Connect ed to the 71M 6541D/F Using One 71M6x01
PDS_6xxx_010 71M6xxx Data Sheet
v1.2 © 20082011 Teridian Semiconduct or Cor por ation 9
MPU
RTC
TIMERS
IADC0
VADC8 (VA)
IADC2
VADC9 (VB)
XIN
XOUT
RX
TX
TX
RX
COM0...5
V3P3A V3P3SYS
VBAT
VBAT_RTC
IADC4
VADC10 (VC)
SEG
GNDA GNDD
SEG/DIO
DIO
ICE
C
B
A
NEUTRAL
LOAD
8888.8888
PULSES,
DIO
IR
AMR
POWER FAULT
COMPARATOR
MODUL-
ATOR
SERIAL PORTS
OSCILLATOR/
PLL
MUX and ADC
LCD DRIVER
DIO, PULSES
COMPUTE
ENGINE
FLASH
MEMORY
RAM
32 kHz
REGULATOR
Shunt Current Sensors
POWER SUPPLY
TERIDIAN
71M6543F/
71M6543H
TEMPERATURE
SENSOR
VREF
IADC6
BATTERY
PWR MODE
CONTROL
WAKE-UP
NEUTRAL
I2C or µWire
EEPROM
9/17/2010
IADC1
IADC3
IADC5
IADC7
RTC
BATTERY
V3P3D
BATTERY
MONITOR
SPI INTERFACE
HOST
LCD DISPLAY
Resistor Dividers
Pulse Transformers
3x TERIDIAN
71M6xx3
Note: This system is referenced to Neutral
71M6xx3
71M6xx3
71M6xx3
}
IN*
}
IA
}
IB
}
IC
*IN = Neutral Current
Figure 4: Current Senso rs Connect ed to the 71M 6543F/H or 71M6545/H w it h Thr e e 71M6xx3
3.4 PCB Layout Considerations
To limi t em issions and susceptibility to electrom agnetic and magnet ic fields, the signal wir ing between the
shunt re sistor s and t he 71M 6xxx shoul d be as sh ort a s pos sibl e and shoul d con sist of t ightl y t wi sted pai r
cable. Similarly, the PCB traces between the 71M6xxx and the 71M654x should be routed as short as
possible and should be surrounded by grounded copper structures. The trace pairs should be routed as
cl ose to eac h other as perm itted by t he PCB manufac turer .
The copper separation (gap) between the shunt side and the 71M654x side of the signal transformer
should be as wide as permitt ed by the f ootprint of the transform er , as sho wn in Figure 5.
PDS_6xxx_010 71M6xxx Data Sheet
v1.2 © 20082011 Teridian Semiconduct or Cor por ation 10
Figure 5: Copper Separati on and Signal Traces for a P olyphase PCB
3.5 Compatibility with the 71M654x
The 71M6xxx isolated sensor IC s are designed t o be operated in conjunction with t he 71M654x energy-
metering ICs. Operation of the 71M6xxx isolated sensor ICs requires a 71M654x IC with CE code
capable of interfacing with the 71M6xxx. CE codes written for operation with CTs do not work with the
71M6xxx.
The 71M6xxx isolated sen sor ICs are not arbitrarily interchangeabl e. Each t ype of t he 71M6xxx m ust be
matched with its corresponding CE code in the 71M654x per Table 14. A 71M6xxx remote sensor IC
generates unpredictable results when paired with a CE code for a different part number. All 71M6xxx
isolated sensor ICs used i n a polyphase system m ust be of the same part number.
Signal traces
Isola tion ga p
Transformers
PDS_6xxx_010 71M6xx x Data S heet
v1.2 © 20082011 Teridian S emi c onduc tor Corporati on 11
4 SPECIFICATIONS
4.1 Absolute Maximum Ratings
Table 3 shows the absolute maximum ranges for the device. Stresses beyond Absolute Maximum
Ratings may cause permanent damage to the device. These are stress ratings only and functional
operation at these or any other conditions beyond those indicated under recommended operating
conditions (4.3 Recommended Operating Conditions) is not implied. Exposure to absolute maximum
ratings conditions for extended peri ods may affect device reliabilit y. All voltages are with r espect to GND.
Table 3: Absolu t e Maximum Ratings
SUPPLIES AND GR OUND PINS:
VCC
-0.5V to 4.6V
GND
-0.1V to +0.1V
ANALOG INPUT P INS:
INP, INN, SP, SN -10mA to +10mA,
-0.5V to (VCC + 0.5V)
TEMPERATURE:
Operating Junction Temperature (Peak, 100ms) +140°C
Operating Junction Temperature (Continuous) +125°C
Sto rage Temperat ure Ra nge -45°C to +165°C
Soldering Temperature (10s dur ation) +250°C
4.2 Recommended External Component s
Table 4: Reco mmend ed Ext ernal Components
NAME FROM TO FUNCTION VALUE UNITS
C1 VCC GND Bypass capacitor for supply 1.0 µF
R1, R2 Sensor GND To establish prope r bias for INP/INN pins 1 k
4.3 Recommended Operating Conditions
Table 5: Reco mmend ed Operat ing Conditions
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VCC Supply Voltage
2.5 3.6 V
Operating Temperature Range
-40 +85 C
PDS_6xxx_010 71M6xx x Data S heet
v1.2 © 20082011 Teridian S emi c onduc tor Corporati on 12
4.4 Performance Specifications
Unless otherwise specified, all parameters listed in this section are valid over the Recommended
Operating Conditions pr ov ided in Table 5.
4.4.1 Supply Current
Table 6: Supply Current Performance Specifications
PARAMETER CONDITIONS MIN TYP MAX UNITS
VCC Curre nt, Norma l Operation VCC = 3.3V 0.77 1.05 mA
4.4.2 Power and Data Pulses
Table 7: Timin g Speci f ications for Power and Data Pul ses
PARAMETER CONDITIONS MIN TYP MAX UNITS
Pulse Frequency
Normal operation
1.638
MHz
71M654x (PLL_FAST = 0)
0.5249
4.4.3 VCC Voltage Monitor
Table 8: VCC Vo lt a ge Monitor S pe c ifica tions
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
BN OM : N omin al Valu e, TA = +2 2°C VCC = 3.2V 138 LSB
VCC Volt a g e (Note: This is a de f inition
it i s not a mea sured quantity.) VCC = 3.1 95 + (BSENSE - 138) x 0.0246 + STEMP x
0.000104 V
BE: Measur ement Error
VCC = 3.195 + (BSENSE - 138) x 0.0246
+ STEMP x 0. 000104
VCC = 2.5V -5 +5 %
VCC = 2.8V to 3.6V -5 +5
4.4.4 Te mperature Sensor
Table 9: T emperature Sensor Specificat ions
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
TNO M : Nom inal V alu e, TA = +22
°
C
VCC = 3.2V
870
LSB
Temperature E quat ion for:
71M6601, 71M6603, 71M6103 and
71M6113
(Note: This is a definitionit is not a
m easured quantity.)
TEMP = STEMP x 0. 33 - STEMP2 x 3E-5 + 2 2 ºC
Temperature E quat ion f or:
71M6201 and 71M6203
(Note: This is a definitionit is not a
m easured quantity.)
If STEMP < 0:
TEMP = STEMP x 0. 33 - STEMP2 x 3E-5 + 2 2
If STEMP 0:
TEMP = STEMP x (63 / TRIMBGA) + 22
C
Temperature Error (Note 1) Temp erature =
-40°C, -10°C,
+55°C, +85°C
VCC =
2.8V to
3.6V
-5 +5
ºC
VCC =
2.5V to
2.79V -6.5 +6.5
TETIME: Duration of Temperature
Measurement
VCC = 3.0V 15 30 ms
Not e 1: Guaranteed by design; not production tested.
PDS_6xxx_010 71M6xx x Data S heet
v1.2 © 20082011 Teridian S emi c onduc tor Corporati on 13
4.4.5 VREF Performance Specifications
Table 10 shows the performance specifi c ations for the ADC reference voltage (VREF).
Table 10: VREF Performance Specifications
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VREF Out put Volt age
71M6201, 71M6203,
71M6113: TA = + 22
°
C
1.193 1.195 1.197 V
71M6601, 71M6603,
71M6103: TA = + 22
°
C
1.180 1.195 1.210
VREF Out put Im pedance ILOAD = 10µA, -10µA
on TMUXO UT 8 k
VREF Power-Supply Sensitivity:
ΔVREFVCC
VC C = 2.8 V to 3.6V
-1.5
+1.5
mV/V
VC C = 2.5 V to 3.6V
-2
+2
VREF Chop Step (Trimm ed)
VREF(CROSS = 1) -
VREF(CROSS = 0)
-22 0 +22 mV
VNOM Defin ition
VNOM(T) = VREF (2 2 ) + ( T - 22)TC1 + (T - 22)2TC2
V
71M6201 AND 7 1M6 2 03 ( 0.2 % ACCURACY CLASS)
VN OM Temperature Coefficien ts:
TC1, TC2
TC1 = 0.0538 x TRIMT + 1.587( TRI MBG B - TRI MBG D ) +
27.279
µV/°C
TC2 = -0.433 - TRIMT x 0.000854
µ
V/
°
C2
VR EF(T ) Deviatio n f rom VNOM( T) (Note 1)
62
10
)( )()( 6
TVNOM TVNOMTVREF
-15 +15 ppm/°C
71M 6 113 (0.5 % ACCURACY CLASS)
VN OM Temperature Coefficien ts:
TC1, TC2
TC1 = 251 - TRIMT x 4.60
µV/°C
TC2 = -0.433 - TRIMT x 0.000854 µV/°C
2
VR EF(T ) Deviatio n f rom VNOM( T) (Note 1)
62
10
)( )()( 6
TVNOM TVNOMTVREF
-50 +50 ppm/°C
71M6601, 71M6603, AND 71M6103 (1% ACCURACY CLASS)
VN OM Temperature Coefficien ts:
TC1, TC2
TC1 = -34.8
µV/°C
TC2 = -0.599
µ
V/
°
C2
VR EF(T ) Deviatio n f rom VNOM( T) (Note 1)
45
10
)( )()( 6
TVNOM TVNOMTVREF
-100 +100 ppm/°C
Not e 1: Guaranteed by design; not production tested.
PDS_6xxx_010 71M6xx x Data S heet
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4.4.6 ADC Converter
Table 11: ADC Con vert er S pecifications
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Input Cur r ent I NP and INN at
GND pot ential INP 22 µA
INN 22
THD (First 10 Harmonic s)
VIN = 65Hz, 64kpts
F F T, Blackma n -Harris
window
-85 dB
PDS_6xxx_010 71M6xx x Data S heet
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4.5 Typical Performance Data
Figure 6: Wh Error at R oom Temperature (71M6203, 100A/0.1A, 60Hz/240V AC)
Figure 7: VARh E rror at Room Temperature ( 71M6203, 100A/0.1A, 60Hz/240V AC)
-
0.5
-
0.4
-
0.3
-
0.2
-
0.1
0
0.1
0.2
0.3
0.4
0.5
0.1
1
10
100
90
°
150
°
VARh Polyphase Load Line with 150
µΩ
Shunt
-
0.5
-
0.4
-
0.3
-
0.2
-
0.1
0
0.1
0.2
0.3
0.4
0.5
0.1
1
10
100
0
°
60
°
300
°
180
°
Wh Polyphase Load Line with 50
µΩ
Shunts
PDS_6xxx_010 71M6xx x Data S heet
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DETAIL A
PARTING
LINE
5
+3°
-5° 0.64
+0.25
-0.23
4.6 Package Outline Drawing
Controlli ng dim ensi ons are in mm .
Figure 8: SOIC-8 Package Outline
BOTTOM VIEW
SIDE VIEW
SEE
DETAIL A
END VIEW
TOP VIEW
5.99
+0.21
-0.05
1.97
2.465
COO
10
4.93 -0.13
+0.05
4
0.41
+0.08
-0.06
9
1.27 BSC 0.33
±0.08
x 45°
1.63 +0.10 -0.08
0.15
+0.1 -
0.023
SEATING
PLANE
1.47
+0.08
-0.07
3.94
+0.05
-0.13
0.20
+0.05
-0.01
4
8
3
LENGTH OF TERMINAL FOR SOLDERING TO SUBSTRATE
5
FORMED LEADS ARE PLANAR WITH RESPECT TO EACH OTHER
WITHIN 0.735 mm AT SEATING PLANE.
8
10
COUNTRY OF ORIGIN LOCATION ON PACKAGE BOTTOM IS
OPTIONAL AND DEPENDS ON ASSEMBLY LOCATION.
PACKAGE IS COMPLIANT WITH JEDEC STANDARD MS-012.
REFERENCE DATUM
3
LENGTH AND WIDTH ARE REFERENCE DATUMS AND DO NOT
INCLUDE MOLD FLASH OR PROTRUSIONS, BUT INCLUDE MOLD
MISMATCH. MEASURED AT THE MOLD PARTING LINE.
PROTRUSIONS DO NOT EXCEED 0.1524 mm AT END AND 0.254
mm AT WINDOW.
4
9
THE APPEARANCE OF PIN #1 I.D. IS OPTIONAL.
DIMENSIONING AND TOLERANCES PER ANSI Y14.5 M - 1982
NOTES:
PDS_6xxx_010 71M6xx x Data S heet
v1.2 © 20082011 Teridian S emi c onduc tor Corporati on 17
4.7 IC Pinout
VCC TEST
SP
SN
GND NC
INP
INN
1
2
3
45
6
7
8
Figure 9: Pinout for 8-Pin SO Package
4.8 Pin Description
Table 12: Pin Description
Pin Name Function
1 VCC Supply Voltage Output. A 1.0µF capacitor to GND should be provided.
2 SP Posit ive Bidir ectional Communication Port for the Connecti on of t he Pul se
Transformer
3 SN Negative Bidirectional Communi c ation P or t f or the Connection of the P ulse
Transformer
4 GND Ground (Local Ground). The voltage at the INP and INN pins references to
this pin.
5 NC No Connection. No connect ions must be made to this pin.
6 INP Pos itive Analog Input from Sensor. This input must be biased tow ards
GND wit h a 1k resistor.
7 INN Negat ive Analog I nput f r om Sensor. This input m ust be biased toward s
GND with a 1k resistor.
8 TEST Input Used in F actor y for Test Pur poses. This pin must be connect ed to
GND.
PDS_6xxx_010 71M6xx x Data S heet
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5 ORDERING INFORMATION
Table 13: P rod uct Variations
Part Application Rated Current
(A)
Max Input
Voltage at
INP-IN N P i ns
(mV)
Temp Range
(
°
C)
Typ Operating
Temp Range
(
°
C)
Recommended
Meter Accuracy
Class
(%)
Max Shunt
Resistance
(
µΩ
)
71M6601 1-phase 60 44
-40 t o +85
-20 to +60 1 736
71M6603 3-phase
71M6103 3-phase 100 19.6 -20 to +60 1 196
71M6113 3-phase 0.5
71M6201 1-phase 200 12.6 -40 to +85 0.2 63
71M6203 3-phase
Table 14: P ackaging Informati on, Co rresponding CE Codes, and Ordering Numbers
Part
Packaging
71M654x CE Co de
Ord erin g Nu mber
71M6601 bulk EQU0-60 71M6601-IL/F
71M6601 tape and reel 71M6601-ILR/F
71M6603 bulk EQU5-60 71M6603-IL/F
71M6603 tape and reel 71M6603-ILR/F
71M6103 bulk EQU5-100 71M6103-IL/F
71M6103 tape and reel 71M6103-ILR/F
71M6113 bulk EQU5-100 71M6113-IL/F
71M6113 tape and reel 71M6113-ILR/F
71M6201* bulk EQU1-200, EQU2-200 71M6201-IL/F
71M6201* tape and reel 71M6201-ILR/F
71M6203* bulk EQU5-200 71M6203-IL/F
71M6203* tape and reel 71M6203-ILR/F
Note: All devices ar e lead(Pb) -free/RoHS-compliant packages.
*Future productc o nt ac t f ac tory f or av a il a b ility .
6 RELATED INFORMATION
The follow ing docu ments rela ted to the 71M6xxx are availab le fro m Teridian:
71M6543F/H Data Sheet
71M6541D/F-71M6542F Dat a S heet
71M6545/H Data Sheet
7 CONTACT INFORMATION
For technical support or more information about Maxim products, contact technical support at
www.maxim-ic.com/support.
PDS_6xxx_010 71M6xxx Data Sheet
REVISION HISTORY
REVISION
NUMBER REVISION
DATE DESCRIPTION PAGES
CHANGED
1.0 12/10 Initial release
1.1 3/11
Figure 1, page 4 (transformer turns ratio 1:1.1)
Table 9, page 12
Table 14, page 18 4, 12, 18
1.2 6/11
Removed future status from the 71M6113 parts in
Table 14 18

Maxim Integrated 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-1000
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.
Maxim reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical
Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
© 2011 Maxim Integrated The Maxim logo and Maxim Integrated are trademarks of Maxim Integrated Products, Inc.