CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper ESD Handling Procedures.
Copyright © Harris Corporation 1995 4-57
SEMICONDUCTOR
December 1995
RFG60P05E
60A, 50V, ESD Rated, Avalanche Rated, P-Channel
Enhancement-Mode Power MOSFET
Features
• 60A, 50V
•r
DS(ON) = 0.030Ω
•
Temperature Compensating
PSPICE Model
• 2kV ESD Rated
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• +175oC Operating Temperature
Description
The RFG60P05E P-Channel power MOSFET is manufac-
tured using the MegaFET process. This process, which uses
feature sizes approaching those of LSI circuits gives opti-
mum utilization of silicon, resulting in outstanding perfor-
mance. They were designed for use in applications such as
switching regulators, switching converters, motor drivers and
relay drivers. These transistors can be operated directly
from integrated circuits.
Formerly developmental type TA09835.
PACKAGE AVAILABILITY
PART NUMBER PACKAGE BRAND
RFG60P05E TO-247 RFG60P05E
NOTE: When ordering use the entire part number.
Absolute Maximum Ratings TC = +25oCRFG60P05E UNITS
Drain Source Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS -50 V
Drain Gate Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDGR -50 V
Gate Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS ±20 V
Drain Current
RMS Continuous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .IDM
60
Refer to Peak Current Curve A
Single Pulse Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS Refer to UIS Curve
Electrostatic Discharge Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ESD
MIL-STD-883, Category B(2) 2KV
Power Dissipation
TC = +25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD
Derate above +25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 215
1.43 W
W/oC
Operating and Storage Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG -55 to +175 oC
Soldering Temperature of Leads for 10s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL260 oC
Package
JEDEC STYLE TO-247
Symbol
DRAIN (BOTTOM SIDE METAL)
GATE
SOURCE
DRAIN
D
G
S
File Number 2745.4
4-58
Specifications RFG60P05E
Electrical Specifications TC = +25oC, Unless Otherwise Specified
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Drain-Source Breakdown Voltage BVDSS ID = 250µA, VGS = 0V -50 - - V
Gate Threshold Voltage VGS(TH) VGS = VDS, ID = 250µA -2 - -4 V
Zero Gate Voltage Drain Current IDSS VDS = -50V,
VGS = 0V TC = +25oC---1µA
T
C
= +150oC - - -50 µA
Gate-Source Leakage Current IGSS VGS = ±20V - - 100 nA
On Resistance rDS(ON) ID = 60A, VGS = -10V - - 0.030 Ω
Turn-On Time tON VDD = -25V, ID = 30A
RL = 0.83Ω, VGS = -10V
RGS = 2.5Ω
- - 125 ns
Turn-On Delay Time tD(ON) -20- ns
Rise Time tR-60- ns
Turn-Off Delay Time tD(OFF) -65- ns
Fall Time tF-20- ns
Turn-Off Time tOFF - - 125 ns
Total Gate Charge QG(TOT) VGS = 0 to -20V VDD = -40V,
ID = 60A,
RL = 0.67Ω
- 450 nC
Gate Charge at -10V QG(-10) VGS = 0 to -10V - 225 nC
Threshold Gate Charge QG(TH) VGS = 0 to -2V - 15 nC
Input Capacitance CISS VDS = -25V, VGS = 0V
f = 1MHz - 7200 - pF
Output Capacitance COSS - 1700 - pF
Reverse Transfer Capacitance CRSS - 325 - pF
Thermal Resistance
Junction to Case RθJC - - 0.70 oC/W
Thermal Resistance
Junction to Ambient RθJA --80
o
C/W
Source-Drain Diode Specifications
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Forward Voltage VSD ISD = -60A - - -1.75 V
Reverse Recovery Time tRR ISD = -60A, dISD/dt = -100A/µs - - 200 ns
4-59
RFG60P05E
Typical Performance Curves
FIGURE 1. SAFE OPERATING AREA CURVE FIGURE 2. NORMALIZED MAXIMUM TRANSIENT THERMAL
IMPEDANCE
FIGURE 3. MAXIMUM CONTINUOUS DRAIN CURRENT vs
TEMPERATURE FIGURE 4. PEAK CURRENT CAPABILITY
FIGURE 5. TYPICAL SATURATION CHARACTERISTICS FIGURE 6. TYPICAL TRANSFER CHARACTERISTICS
-500
-100
-10
-1-1 -10 -100
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
TC= +25oC
ID, DRAIN CURRENT (A)
VDSS MAX = -50V
OPERATION IN THIS
AREA MAY BE
LIMITED BY rDS(ON)
1ms
10ms
100ms
DC
100µs
2
1
0.1
0.0110-5 10-4 10-3 10-2 10-1 100101
t, RECTANGULAR PULSE DURATION (s)
THERMAL RESPONSE
ZθJC, NORMALIZED
SINGLE PULSE
0.01
0.02
0.05
0.1
0.2
0.5
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC + TC
PDM
t1
t2
-50
-40
-30
-20
-10
025 50 75 100 125 150 175
ID, DRAIN CURRENT (A)
TC, CASE TEMPERATURE (oC)
-60
-70
10-5 10-4 10-3 10-2 10-1 100101
-100
-500
t, PULSE WIDTH (s)
TC = +25oC
IDM, PEAK CURRENT CAPABILITY (A)
-50
FOR TEMPERATURES ABOVE +25oC
DERATE PEAK CURRENT
CAPABILITY AS FOLLOWS:
II25
175 TC
–
150
--------------------



=
TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
VGS = -10V
0
0.0 -2 -4 -6 -8
ID, DRAIN CURRENT (A)
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
PULSE DURATION = 250µs, TC = +25oC
VGS = -8V VGS = -7V
VGS = -10V
-40
-80
-120
-160 VGS = -20V
VGS = -6V
VGS = -5V
VGS = -4.5V
0.0 -2.0 -4.0 -6.0 -8.0 -10.0
VGS, GATE-TO-SOURCE VOLTAGE (V)
ID(ON), ON-STATE DRAIN CURRENT (A)
0
VDD = -15V
+175oC
+25oC
-40
-80
-160
-120
PULSE TEST
PULSE DURATION = 250µs
DUTY CYCLE = 0.5% MAX
-55oC
4-60
RFG60P05E
FIGURE 7. NORMALIZED rDS(ON) vs JUNCTION
TEMPERATURE FIGURE 8. NORMALIZED GATE THRESHOLD VOLTAGE vs
TEMPERATURE
FIGURE 9. NORMALIZED DRAIN SOURCE BREAKDOWN
VOLTAGE vs TEMPERATURE FIGURE 10. NORMALIZED POWER DISSIPATION vs
TEMPERATURE DERATING CURVE
FIGURE 11. TYPICAL CAPACITANCE vs VOLTAGE FIGURE 12. NORMALIZED SWITCHING WAVEFORMS FOR
CONSTANT GATE CURRENT. REFER TO
APPLICATION NOTE AN7254 AND AN7260
Typical Performance Curves
(Continued)
PULSE DURATION = 250µs, VGS = -10V, ID = -60A
2.0
1.5
1.0
0.5
0.0-80 -40 0 40 80 120 160 200
TJ, JUNCTION TEMPERATURE (oC)
rDS(ON), NORMALIZED ON RESISTANCE
VGS = VDS, ID = -250µA
2.0
1.5
1.0
0.5
0.0
-80 -40 0 40 80 160120 200
THRESHOLD VOLTAGE
TJ, JUNCTION TEMPERATURE (oC)
VGS(TH), NORMALIZED GATE
ID = -250µA
2.0
1.5
1.0
0.5
0.0-80 -40 0 40 80 120 160 200
BVDSS, NORMALIZED DRAIN-TO-SOURCE
BREAKDOWN VOLTAGE
TJ, JUNCTION TEMPERATURE (oC)
1.2
1.0
0.8
0.6
0.4
0.2
0.0 0 25 50 75 100 125 150 175
POWER DISSIPATION MULTIPLIER
TC, CASE TEMPERATURE (oC)
VGS = 0V, f = 1MHz
CISS
COSS
CRSS
6000
4000
2000
00 -10 -15 -20 -25
C, CAPACITANCE (pF)
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
8000
-5
-50.0
-37.5
-25.0
-12.5
0
-10.0
-7.5
-5.0
-2.5
0.0
VDD = BVDSS VDD = BVDSS
VDS, DRAIN-SOURCE VOLTAGE (V)
VGS, GATE-SOURCE VOLTAGE (V)
20IGREF()
I
GACT()
--------------------------- t, TIME (µs) 80IG REF()
I
GACT()
---------------------------
RL = 0.83Ω
IG(REF) = -4mA
VGS = -10V
0.75 BVDSS
0.50 BVDSS
0.25 BVDSS
0.75 BVDSS
0.50 BVDSS
0.25 BVDSS
4-61
RFG60P05E
FIGURE 13. UNCLAMPED INDUCTIVE SWITCHING
Test Circuits and Waveforms
FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 15. UNCLAMPED ENERGY WAVEFORMS
FIGURE 16. RESISTIVE SWITCHING TEST CIRCUIT FIGURE 17. RESISTIVE SWITCHING WAVEFORMS
Typical Performance Curves
(Continued)
-200
-100
-10
0.01 0.1 1 10
tAV, TIME IN AVALANCHE (ms)
IAS, AVALANCHE CURRENT (A)
If R = 0
tAV = (L) (IAS) / (1.3RATED BVDSS - VDD)
If R ≠ 0
tAV = (L/R) ln [(IAS*R) / (1.3 RATED BVDSS - VDD) + 1]
STARTING TJ = +150oC
STARTING TJ = +25oC
tP
-VGS 0.01Ω
L
IL
+
-
VDS
VDD
RG
DUT
VARY tP TO OBTAIN
REQUIRED PEAK IAS
0V
VDD
VDS
BVDSS
tP
IAS
tAV
VDD
VDS
-VGS
0V
RGS DUT
RL
tD(ON)
tR
90%
10%
VDS 90%
tF
tD(OFF)
tOFF
90%
50%
50%
10%
PULSE WIDTH
VGS
tON
10%
4-62
Temperature Compensated PSPICE Model for the RFG60P05E
.SUBCKT RFG60P05E 2 1 3; REV 9/20/94
CA 12 8 1.01e-8
CB 15 14 1.05e-8
CIN 6 8 6.9e-9
DBODY 5 7 DBDMOD
DBREAK 7 11 DBKMOD
DPLCAP 10 6 DPLCAPMOD
EBREAK 5 11 17 18 -76.35
EDS 14 8 5 8 1
EGS 13 8 6 8 1
ESG 5 10 8 6 1
EVTO 20 6 8 18 1
IT 8 17 1
LDRAIN 2 5 1e-9
LGATE 1 9 7.9e-9
LSOURCE 3 7 4.18e-9
MOS1 16 6 8 8 MOSMOD M = 0.99
MOS2 16 21 8 8 MOSMOD M = 0.01
RBREAK 17 18 RBKMOD 1
RDRAIN 5 16 RDSMOD 12.83e-3
RGATE 9 20 1.5
RIN 6 8 1e9
RSOURCE 8 7 RDSMOD 3.25e-3
RVTO 18 19 RVTOMOD 1
S1A 6 12 13 8 S1AMOD
S1B 13 12 13 8 S1BMOD
S2A 6 15 14 13 S2AMOD
S2B 13 15 14 13 S2BMOD
VBAT 8 19 DC 1
VTO 21 6 -0.83
.MODEL DBDMOD D (IS = 1.24e-12 RS = 4.72e-3 TRS1 = 1.43e-3 TRS2 = -4.91e-7 CJO = 6.98e-9 TT = 1.5e-7)
.MODEL DBKMOD D (RS = 1.11e-1 TRS1 = 1.34e-3 TRS2 = 4.46e-12)
.MODEL DPLCAPMOD D (CJO = 15e-10 IS = 1e-30 N = 10)
.MODEL MOSMOD PMOS (VTO = -3.71 KP = 31.5 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u)
.MODEL RBKMOD RES (TC1 = 9.42e-4 TC2 = 0)
.MODEL RDSMOD RES (TC1 = 5.85e-3 TC2 = 7.69e-6)
.MODEL RVTOMOD RES (TC1 = -3.39e-3 TC2 = 1.07e-6)
.MODEL S1AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 4.6 VOFF = 2.6)
.MODEL S1BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 2.6 VOFF = 4.6)
.MODEL S2AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 1.16 VOFF = -3.84)
.MODEL S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -3.84 VOFF = 1.16)
.ENDS
For further discussion of the PSPICE model, consult A New PSPICE Sub-circuit for the Power MOSFET Featuring Global Temperature
Options; written by William J. Hepp and C. Frank Wheatley.
MOS1
10
DPLCAP
RDRAIN
DBREAK
LDRAIN
DRAIN
SOURCE
LSOURCE
DBODY
RBREAK
RVTO
VBAT
+
-
19
IT
RSOURCE
EBREAK
MOS2
EDSEGS
RIN CIN
VTO
ESG
S1A S2A
S2BS1B
CBCA
EVTO
RGATE
GATE
LGATE
52
1817
7
11
21
8
6
16
2091
12 15
14
13
13
814
13
+
-
+
-
+
-
+
-
+
-
+
-
3
8
6
17
18
5
8
6
8
18
8
RFG60P05E